Index: anr/section-dissemination.tex
===================================================================
--- anr/section-dissemination.tex	(revision 324)
+++ anr/section-dissemination.tex	(revision 356)
@@ -23,21 +23,20 @@
 The COACH project will bring new scientific results in various fields, such as high level synthesis,
 hardware/software codesign, virtual prototyping, hardware oriented compilation techniques,
-automatic parallelisation, etc. These results will be published in relevant International
+automatic parallelization, etc. These results will be published in relevant International
 Conferences, namely DATE, DAC, or ICCAD. 
-
+\\
 More generally, the COACH infrastructure and the design flow supported by the COACH
 tools and libraries will be promoted by proposing tutorials on FPGA oriented system level synthesis
-in various worshops and conferences (DATE, DAC, CODES+ISSS...).
-
+in various workshops and conferences (DATE, DAC, CODES+ISSS...).
+\parlf
 Several COACH partners being members of the HiPEAC European Network of Excellence 
 (High Performance and Embedded Architecture and Compilation), courses will be proposed for the
 HiPEAC summer school on Advanced Computer Architecture and Compilation for Embedded Systems.
-
-Following the general policy of the SoCLib platform, the COACH project will be an 
-open infrastructure, and the COACH tools and libraries will be available in the framework 
-of the SoCLib WEB server. This server will be maintened by the UPMC/LIP6 laboratory.
-
+\parlf
+The COACH project will be an open infrastructure, and the COACH tools and libraries will be available via
+a WEB server. This server will be maintained by the UPMC/LIP6 laboratory.
+\\
 On the standardization side, some effort will be made for analysing how the work around IP-XACT 
-could be donated for the evolution of the IEEE 1685 standard. Magillem is board member of
+could be donated for the evolution of the IEEE 1685 standard. \mds is board member of
 Accellera, TRT, TIMA and LIP6 are members, so we'll try to have some influence and at least
 communicate on the fact that our solutions will be compatible with the standard.
@@ -56,5 +55,5 @@
 All software tools supporting the COACH design flow will be available as free software.
 All academic partners contributing to the COACH project agreed to distribute the ESL software
-tools under the same GPL license as the SoCLib tools.  
+tools under the same GPL license.
 \item
 The SystemC simulation models for the hardware components
@@ -75,6 +74,9 @@
 synthesis tools developed in the COACH project.
 \item
-\mds will propose a commercial version of COACH, integrated into Magillem tool suite and compatible with a standard IP-XACT flow.
-This version will integrate some generic features, already available for production (some of them from standard Magillem pack, some other developped in COACH). Other COACH features will have to be tailored for the specifics of the customer framework and will generate service business.
+\mds will propose a commercial version of COACH, integrated into \mds tool suite and compatible with a standard IP-XACT flow.
+This version will integrate some generic features, already available for
+production (some of them from standard \mds pack, some other developed in
+COACH). Other COACH features will have to be tailored for the specifics of the
+customer framework and will generate service business.
 \end{itemize}
 
@@ -88,17 +90,29 @@
 The interest for \mds in this project is multiple. 
 \begin{itemize}
-\item We will collaborate in experiments for the integration of High Level Synthesis engines into IP-XACT based flow. 
-This point will be very valuable because more and more system integrators are using or considering to use
-HLS in their flow (e.g. Astrium, Airbus, etc.)
-\item \mds has already a leading position in the usage of IP-XACT standard for managing innovative SoC design
-methodologies. This project will allow to keep the advance in regards with competition by anticipating 
-the next generation platforms hosting mutli cores and programmable logic for coprocessors.
-\item HPC is a topic that was not covered yet by \mds with its customers. Thanks to this project, \mds will 
-collaborate with BULL on this point and this will open us doors for new customers market.
-\item This project has been set up for maximizing the industrial exploitation of results. The role of \mds will
-be to ensure this objective and after the project, we expect a growing contribution for rising the turnover (2015: 2 new customers = 100keuros, 
-2016: 4 new customers = 250keuros, 2017: 5 new customers = 400Keuros). These numbers are not high but we tried to keep them realistic. 
-The return on investment is nevertheless important and we can also expect side effects of this project on sales with existing 
-customers and prospects interrested in the global magillem solution.
+\item
+We will collaborate in experiments for the integration of High Level Synthesis
+engines into IP-XACT based flow.  This point will be very valuable because more
+and more system integrators are using or considering to use HLS in their flow
+(e.g. Astrium, Airbus, etc.).
+\item
+\mds has already a leading position in the usage of IP-XACT standard for
+managing innovative SoC design methodologies. This project will allow to keep
+the advance in regards with competition by anticipating the next generation
+platforms hosting multi-cores and programmable logic for coprocessors.
+\item
+HPC is a topic that was not covered yet by \mds with its customers. Thanks to
+this project, \mds will collaborate with BULL on this point and this will open
+us doors for new customers market.
+\item
+This project has been set up for maximizing the industrial exploitation of results.
+The role of \mds will be to ensure this objective and after the project, we
+expect a growing contribution for rising the turnover
+(2015: 2 new customers = 100 k\euro,
+ 2016: 4 new customers = 250 k\euro,
+ 2017: 5 new customers = 400 k\euro).
+These numbers are not high but we tried to keep them realistic. 
+The return on investment is nevertheless important and we can also expect side
+effects of this project on sales with existing customers and prospects
+interested in the global \mds solution.
 \end{itemize}
 
@@ -108,15 +122,4 @@
 HPC solutions. The main expectation from COACH is to derive a new component (fine-grain
 FPGA parallelism) to add to existing Bull HPC solutions.
-
-%\subsubsection*{Partner: \textit{\xilinx}}
-%Computing power potential of our FPGA architectures
-%growing very quickly on one side, and complexity of designs implemented
-%using our FPGAs dramatically increasing on the other side, it is very
-%interesting for us to get high level design methodologies progressing
-%quickly and targetting our FPGAs in the most possible efficient way.
-%\parlf
-%\xilinx goal is to get COACH to generate bitstream optimized as much as possible for
-%\xilinx FPGAs in order to both, validate the methodology on our FPGA families, and ease
-%future work of our customers.
 
 \subsubsection*{Partner: \textit{\thales}}
