Index: /anr/annexe-cv.tex
===================================================================
--- /anr/annexe-cv.tex	(revision 366)
+++ /anr/annexe-cv.tex	(revision 367)
@@ -87,5 +87,5 @@
 \begin{cvenv}
   {{Alias}{Christophe}{33}}
-  {Permanent Researcher (CR2), INRIA}
+  {INRIA researcher (CR2)}
   {PhD (2005)}
   {{11}{\cite{bee}} \cite{ca:nuca} \cite{ca:chuba} \cite{ca:arc}}
Index: /anr/anr.bib
===================================================================
--- /anr/anr.bib	(revision 366)
+++ /anr/anr.bib	(revision 367)
@@ -907,5 +907,5 @@
 @InProceedings{ca:arc,
   author = 	 {Christophe Alias and Bogdan Pasca and Alexandru Plesco},
-  title = 	 {Automatic Generation of FPGA-Specific Pipelined Accelerators},
+  title = 	 {Automatic Generation of {FPGA}-Specific Pipelined Accelerators},
   booktitle =    {7th International Symposium on Applied Reconfigurable Computing (ARC)},
   year = 	 {2011},
Index: /anr/section-consortium-people.tex
===================================================================
--- /anr/section-consortium-people.tex	(revision 366)
+++ /anr/section-consortium-people.tex	(revision 367)
@@ -53,5 +53,5 @@
   \let\VPnote\relax       \def\VP{\doAbre{4}{V.P.}\gdef\VPnote{\doNote{4}{Virtual prototyping.}}}
   \let\ARCHnote\relax   \def\ARCH{\doAbre{5}{ARCH}\gdef\ARCHnote{\doNote{5}{Architecture \& micro-architecture.}}}
-  \let\MMnote\relax       \def\MM{\doAbre{6}{M.M.}\gdef\MMnote{\doNote{6}{Memory management \& FIFO construction \& irregular extensions.}}}
+  \let\MMnote\relax       \def\MM{\doAbre{6}{M.M.}\gdef\MMnote{\doNote{6}{Process scheduling \& memory management}}}
   \let\AUPAnote\relax   \def\AUPA{\doAbre{7}{A.P.}\gdef\AUPAnote{\doNote{7}{Process scheduling \& automatic parallelization.}}}
   \noindent\hspace{-0.5cm}\begin{minipage}{\linewidth}\small\begin{tabular}{|c|p{1.4cm}|p{1.7cm}|p{2.3cm}|p{4.4cm}|p{.5cm}|p{4.5cm}|}\hline
Index: /anr/task-demonstrator.tex
===================================================================
--- /anr/task-demonstrator.tex	(revision 366)
+++ /anr/task-demonstrator.tex	(revision 367)
@@ -74,5 +74,5 @@
         \setMacroInAuxFile{trtSpearde}
         Adaptation of SPEAR-DE for COACH framework.
-        \OtherPartner{0}{12}{\Slip}   {0.5:0.5:0}
+        \OtherPartner{0}{12}{\Slip}   {0.5:0.5:0.5}
     \end{livrable}
 %
Index: /anr/task-frontend.tex
===================================================================
--- /anr/task-frontend.tex	(revision 366)
+++ /anr/task-frontend.tex	(revision 367)
@@ -89,5 +89,5 @@
     Conversion of the input and output of Bee to the \xcoach format.
     At this step, only local memory optimization will be available.
-    \itemL{18}{30}{d+x}{\Slip}{Arrays and FIFO}{1.5:2.0:1.5}
+    \itemL{18}{30}{d+x}{\Slip}{Arrays and FIFO}{1.5:2.0:1}
     Final assessment of the method and improved version of the specification.
 %