Index: /anr/section-project-description.tex
===================================================================
--- /anr/section-project-description.tex	(revision 378)
+++ /anr/section-project-description.tex	(revision 379)
@@ -58,5 +58,5 @@
 This will allow on the one hand to insure that all the tools will
 accept the same C++ description and on the other hand make possible
-their chaining. The front-end tools read a \xcoach description and generate
+their chaining. The front-end tools read an \xcoach description and generate
 a new \xcoach description that exhibits more parallelism or implement
 specific instructions for ASIP. The back-end tools read an \xcoach
@@ -64,5 +64,5 @@
 description annotated with hardware information (scheduling, binding) required by
 the VHDL and systemC drivers.
-Furthermore, the back-end tools uses a macro-cell library (functional and memory
+Furthermore, the back-end tools use a macro-cell library (functional and memory
 unit).
 \parlf
@@ -153,6 +153,6 @@
 planned at the beginning of the project we will be able to react fast and take
 decisions for possible workaround and enable the continuation of the work with
-other tasks. Nevertheless, we are confident because upfront to this project,
-academic partners are already working close togother and know well each other's
+other tasks. Nevertheless, we are confident becausein preparation to this project,
+academic partners are already working close together and know well each other's
 technologies, and also a lot of face to face meeting are planned at the
 beginning of the project in task $T2$ in order to define the \xcoach format which is