Index: /anr/Makefile =================================================================== --- /anr/Makefile (revision 51) +++ /anr/Makefile (revision 52) @@ -10,5 +10,7 @@ dependence-task-h.pdf \ section-4.2.tex section-5.tex \ - section-6.1.tex section-6.2.tex + section-6.1.tex section-6.2.tex section-7.tex + +TABLES= table_upmc.tex # PROGRAMS @@ -19,5 +21,5 @@ @$(FIG2DEV) -L pdf -p aaa $< $@ -anr.pdf: $(SOURCES) gantt1.tex gantt2.tex gantt +anr.pdf: $(SOURCES) gantt1.tex gantt2.tex gantt $(TABLES) @echo "Generating pdf file" @pdflatex anr.tex @@ -30,5 +32,5 @@ bibtex anr || true -anr.aux gantt1.tex gantt2.tex: +anr.aux gantt1.tex gantt2.tex $(TABLES): touch $@ @@ -36,2 +38,5 @@ @flex gantt.l && gcc -g lex.yy.c -o gantt @rm lex.yy.c + +clean: + rm -f $(TABLES) anr.aux gantt1.tex gantt2.tex anr.pdf anr.gantt Index: /anr/anr.sty =================================================================== --- /anr/anr.sty (revision 51) +++ /anr/anr.sty (revision 52) @@ -84,5 +84,5 @@ \newcount\subtaskcnt \newcount\livrablecnt -\newenvironment{workpackage}[1]% +\newenvironment{workpackage}% {\global\advance\taskcnt1 \global\subtaskcnt0 @@ -97,8 +97,29 @@ %%%%%%%%%%%%%%%%%%%%%%%%%%%%%% +\def\writeganttinfo#1#2#3#4#5{{% + \let\xcoach\relax + \let\xcoachplus\relax + \let\irisa\relax \let\Sirisa\relax + \let\lip\relax \let\Slip\relax + \let\tima\relax \let\Stima\relax + \let\ubs\relax \let\Subs\relax + \let\upmc\relax \let\Supmc\relax + \let\altera\relax \let\Saltera\relax + \let\xilinx\relax \let\Sxilinx\relax + \let\bull\relax \let\Sbull\relax + \let\thales\relax \let\Sthales\relax + \let\zied\relax \let\Szied\relax + \let\navtel\relax \let\Snavtel\relax + \immediate\write\ganttdata{% + T=\the\taskcnt\space S=\the\subtaskcnt\space% + D=\the\livrablecnt\space V=\vers\space% + BM=#1 EM=#2 R=#3 PART={#4} TITLE=#5% + } +}} \newenvironment{livrable}% {% + \newcount\verscnt\verscnt=-1 + \newif\ifIsLivrableStarted\IsLivrableStartedfalse \newif\ifLivrableTopLine\LivrableTopLinetrue - \newif\ifLivrableStart\LivrableStarttrue \def\livrableTableDef{\begin{tabular}{|c|c|c|c|p{.625\linewidth}|}\hline} \def\livrableTableLine##1##2##3##4{% @@ -113,49 +134,54 @@ \livrablecnt-1 \ifvmode\else\vspace{.75ex}\\\fi - \def\item##1##2##3##4##5##6{% - \def\tmpa{##1}\def\vers{} - \def\tmp{} \ifx\tmp\tmpa\global\advance\livrablecnt1\def\vers{VF}\global\LivrableStarttrue\fi% - \def\tmp{1} \ifx\tmp\tmpa\global\advance\livrablecnt1\def\vers{V1}\global\LivrableStarttrue\fi% - \def\tmp{V1}\ifx\tmp\tmpa\global\advance\livrablecnt1\def\vers{V1}\global\LivrableStarttrue\fi% - \def\tmp{2} \ifx\tmp\tmpa\def\vers{V2}\fi% - \def\tmp{V2}\ifx\tmp\tmpa\def\vers{V2}\fi% - \def\tmp{3} \ifx\tmp\tmpa\def\vers{V3}\fi% - \def\tmp{V3}\ifx\tmp\tmpa\def\vers{V3}\fi% - \def\tmp{F} \ifx\tmp\tmpa\def\vers{VF}\fi% - \def\tmp{VF}\ifx\tmp\tmpa\def\vers{VF}\fi% - %\gdef\name{D-\the\taskcnt\the\subtaskcnt\the\livrablecnt-##1}% + + \def\itemV##1##2##3##4##5{% + \ifIsLivrableStarted + \global\advance\verscnt1 + \else + \global\advance\livrablecnt1 + \global\verscnt1 + \fi + \def\vers{V\the\verscnt} \global\edef\name{D\the\taskcnt\the\subtaskcnt\the\livrablecnt-\vers}% - { - \let\xcoach\relax - \let\xcoachplus\relax - \let\irisa\relax \let\Sirisa\relax - \let\lip\relax \let\Slip\relax - \let\tima\relax \let\Stima\relax - \let\ubs\relax \let\Subs\relax - \let\upmc\relax \let\Supmc\relax - \let\altera\relax \let\Saltera\relax - \let\xilinx\relax \let\Sxilinx\relax - \let\bull\relax \let\Sbull\relax - \let\thales\relax \let\Sthales\relax - \let\zied\relaxe \let\Szied\relax - \let\navtel\relax \let\Snavtel\relax - \immediate\write\ganttdata{% - T=\the\taskcnt\space S=\the\subtaskcnt\space% - D=\the\livrablecnt\space V=##1 BM=##2 EM=##3 TITLE=##6% - } - } + \writeganttinfo{##1}{##2}{none}{##4}{##5} \\\hline \ifLivrableTopLine - \ifLivrableStart\hline\hline\fi + \ifIsLivrableStarted\else\hline\hline\fi \else - \ifLivrableStart\end{tabular}\\\livrableTableDef\fi + \ifIsLivrableStarted\else\end{tabular}\\\livrableTableDef\fi \fi \global\LivrableTopLinefalse - \global\LivrableStartfalse + \global\IsLivrableStartedtrue + %\global\LivrableStartfalse \livrableTableLine% {\textsc{\name}}% - {\textsc{T0+##3}}% + {\textsc{T0+##2}}% + {\textsc{##3}}% {\textsc{##4}}% - {\textsc{##5}}% + } + \def\itemL##1##2##3##4##5##6{% + \ifIsLivrableStarted + %\global\advance\verscnt1 + \else + \global\advance\livrablecnt1 + %\global\verscnt1 + \fi + \def\vers{VF} + \global\edef\name{D\the\taskcnt\the\subtaskcnt\the\livrablecnt-\vers}% + \writeganttinfo{##1}{##2}{##6}{##4}{##5} + \\\hline + \ifLivrableTopLine + \ifIsLivrableStarted\else\hline\hline\fi + \else + \ifIsLivrableStarted\else\end{tabular}\\\livrableTableDef\fi + \fi + \global\LivrableTopLinefalse + \global\IsLivrableStartedfalse + %\global\LivrableStartfalse + \livrableTableLine% + {\textsc{\name}}% + {\textsc{T0+##2}}% + {\textsc{##3}}% + {\textsc{##4}}% } % \begin{small} Index: /anr/anr.tex =================================================================== --- /anr/anr.tex (revision 51) +++ /anr/anr.tex (revision 52) @@ -292,7 +292,5 @@ Chaque partenaire justifiera les moyens qu'il demande en distinguant les différents postes de dépenses.} - -\subsection{Partner 1: XXX} -\anrdoc{\begin{itemize} +\def\ressourcehelp{\anrdoc{\begin{itemize} \item Equipment: 1) Préciser la nature des équipements* et justifier le choix des équipements. 2) Si nécessaire, préciser la part de financement @@ -319,7 +317,6 @@ \item Other working costs. Toute dépense significative relevant de ce poste devra être justifiée. -\end{itemize}} - -\subsection{Partner 2: XXX} +\end{itemize}}} +\input{section-7} %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% Index: /anr/gantt.l =================================================================== --- /anr/gantt.l (revision 51) +++ /anr/gantt.l (revision 52) @@ -39,4 +39,19 @@ 0 }; +struct partner_def { char *key, *name, *file; } partner_table[] = { + { "UNKNOW", "relax", 0, }, + { "irisa", "irisa", "table_irisa.tex" }, + { "lip", "lip", "table_lip.tex" }, + { "tima", "tima", "table_tima.tex" }, + { "ubs", "ubs", "table_ubs.tex" }, + { "upmc", "upmc", "table_upmc.tex" }, + { "altera", "altera", "table_altera.tex" }, + { "xilinx", "xilinx", "table_xilinx.tex" }, + { "bull", "bull", "table_bull.tex" }, + { "thales", "thales", "table_thales.tex" }, + { "zied", "zied", "table_zied.tex" }, + { "navtel", "navtel", "table_navtel.tex" }, + { 0, 0, 0 }, +}; typedef struct _Tlivrable { @@ -44,9 +59,12 @@ char v; // 0, 1, 2, ..., F char* title; - int bm,em; // mois de bebut et de fin + int bm,em; // mois de bebut et de fin + double hman[3]; // nombre de mh par an + int partner; // index dans partner_table // these fields are filled by the program for data[tn][0][0][0] double task_y; // top of task double task_dy; // bot of task is task_y+task_dy double task_y_del; // delivrables start at task_y+task_y_del + double nbma[3]; // durée en mois par annee // these fields are filled by the program for data[tn][stn][dn][0] struct _Tlivrable @@ -106,5 +124,5 @@ *l = *data_org.ls[tn][stn][dn][v]; data->ls[tn][stn][dn][v] = l; -fprintf(stderr,"selected: [tn][stn][dn][v]=%d,%d,%d,%d\n",tn,stn,dn,v); +//fprintf(stderr,"selected: [tn][stn][dn][v]=%d,%d,%d,%d\n",tn,stn,dn,v); } return data; @@ -196,11 +214,12 @@ %% int tn,stn,dn,v,bm,em; char* title; + double an[3]; + char* an_comment; + int partner; #.*\n ; -T=[0-9]+ { tn=atoi(yytext+2); } -T=D[0-9]+ { tn=atoi(yytext+3); } -S=[0-9]+ { stn=atoi(yytext+2); } -D=[0-9]+ { dn=atoi(yytext+2); } -V=V. { v=yytext[3]; } -V= { v='F'; } +T=[0-9]+ { tn=atoi(yytext+2); } +S=[0-9]+ { stn=atoi(yytext+2); } +D=[0-9]+ { dn=atoi(yytext+2); } +V=V[1-8F] { v=yytext[3]; } ML=[0-9]+ { int i; @@ -208,7 +227,34 @@ milestones[i] = atoi(yytext+3); } - BM=[0-9]+ { bm=atoi(yytext+3); } EM=[0-9]+ { em=atoi(yytext+3); } +R=none { an[0]=0; an[1]=0; an[2]=0; an_comment=0; } +R=[0-9:.]+ { + char tmp[1000]; + int status = sscanf(yytext+2,"%lf:%lf:%lf:%s",an+0,an+1,an+2,tmp); + if (status<3) { + fprintf(stderr,"%s: is not resource definition, expected format \"N:N:N\" (near D%d%d%d-V%c)\n", + yytext+2,tn,stn,dn,v); + an[0]=0; an[1]=0; an[2]=0; an_comment=0; + } else if (status==3) { + an_comment = 0; + } else + an_comment = strdup(tmp); + } +PART="{"[^}]+"}" { + int i; + partner=-1; + for (i=0; partner_table[i].key!=0 ; i++) { + if (strstr(yytext,partner_table[i].key)!=0 ) { + partner=i; + break; + } + } + if ( partner==-1 ) { + fprintf(stderr,"%s: does not contains a partner key (near D%d%d%d-V%c)\n", + yytext+5,tn,stn,dn,v); + partner=0; + } + } TITLE=.*\n { char* pc=yytext+6; @@ -221,4 +267,8 @@ p->dn = dn; p->v = v; + p->hman[0] = an[0]; + p->hman[1] = an[1]; + p->hman[2] = an[2]; + p->partner = partner; p->title = title; p->bm = bm; @@ -228,8 +278,9 @@ for (v=0; data_org.ls[tn][stn][dn][v]!=0 ; v++); data_org.ls[tn][stn][dn][v] = p; -fprintf(stderr,"ADDED: %d %d %d %d\n",tn,stn,dn,v); -//{int i,tn=0; fprintf(stderr,"CURR:t=%d:: ",tn); for (i=0; ivers[p->nbvers-1]->nbTitleLines-1)*(DELIVRABLE_TITLEHEIGHT/5.); if ( h>p->height) p->height=h; + } + Tlivrable* lu= p->vers[p->nbvers-1]; + int i; +fprintf(stderr,"--------------------\n"); + for (i=0 ; inbvers ; i++) { + Tlivrable* l= p->vers[i]; + double bm= l->bm; + double em= l->em; +//fprintf(stderr," %d%d%d-V%c: bm=%2.f em=%2.f --> %2.1f %2.1f %2.1f\n",l->tn,l->stn,l->dn,l->v,bm,em, lu->nbma[0],lu->nbma[1],lu->nbma[2]); + if (bm<12 && em>0) { + lu->nbma[0] += (em>12?12:em)-bm; + bm=12; + } + if (bm<24 && em>12) { + lu->nbma[1] += (em>24?24:em)-bm; + bm=24; + } + if (bm<36 && em>24) { + lu->nbma[2] += em-bm; + } +//fprintf(stderr," %d%d%d-V%c: bm=%2.f em=%2.f --> %2.1f %2.1f %2.1f %p\n",l->tn,l->stn,l->dn,l->v,bm,em, lu->nbma[0],lu->nbma[1],lu->nbma[2], lu); } } @@ -536,4 +608,72 @@ print_milestones(gantt_x,0,gantt_dx,gantt_dy+gantt_y); fprintf(curr->os,"\\end{picture}\n"); + fclose(curr->os); + curr->os=0; +} + +void do_partner_table(int partner) +{ + struct partner_def* part = partner_table+partner; + if ( (curr->os=fopen(part->file,"w"))==0 ) { + fprintf(stderr,"can not open %s file for writing.\n",part->file); + fprintf(stderr,"generation of %s partner table is skipped.\n",part->file); + return; + } + fprintf(curr->os,"\\begin{tabular}{|c|p{3.5cm}||r|r|r||r|}\\hline\n"); + fprintf(curr->os, + "number & \\multicolumn{1}{c||}{title} & \\multicolumn{3}{c||}{years } & total \\\\\\cline{3-5}\n"); + fprintf(curr->os, + " & & \\multicolumn{1}{c|}{1} & \\multicolumn{1}{c|}{2} & " + "\\multicolumn{1}{c||}{3} & \\\\\\hline\\hline\n"); + int tn,stn,dn,v=0; + double an1=0,an2=0,an3=0,an=0; + int newlineadded=1; + for (tn=0 ; tnls[tn][0][0][0]==0) break; + if (tn!=0 && newlineadded==0 ) { + newlineadded = 1; + fprintf(curr->os,"\\hline "); + } + for (stn=0; stnls[tn][stn][dn][v]; + if (top==0) continue; + Tlivrable* last=top->vers[top->nbvers-1]; + if (last->partner!=partner) continue; + double sum1,sum2,sum3,sum=0; + sum1 = last->hman[0]; sum +=sum1; + sum2 = last->hman[1]; sum +=sum2; + sum3 = last->hman[2]; sum +=sum3; + char label[1000],title[1000]; + gen_label_base(label,last); + sprintf(title,"\\resstablestyletitle{%s}",last->title); + fprintf(curr->os,"%s & %s & %2.1f & %2.1f & %2.1f & %2.1f \\\\\\hline\n", + label,title,sum1,sum2,sum3,sum); + an1 += sum1 ; + an2 += sum2 ; + an3 += sum3 ; + an += sum ; + newlineadded=0; + if ( (sum1!=0 && sum1>last->nbma[0] ) || (sum1==0 && last->nbma[0]!=0) ) + fprintf(stderr,"ERROR: %s:%s probleme sur l'an 1 (in table=%2.1f, in gantt=%2.1f\n", + part->name,label,sum1,last->nbma[0]); + if ( (sum2!=0 && sum2>last->nbma[1]) || (sum2==0 && last->nbma[1]!=0) ) + fprintf(stderr,"ERROR: %s:%s probleme sur l'an 2 (in table=%2.1f, in gantt=%2.1f\n", + part->name,label,sum2,last->nbma[1]); + if ( (sum3!=0 && sum3>last->nbma[2]) || (sum3==0 && last->nbma[2]!=0) ) + fprintf(stderr,"ERROR: %s:%s probleme sur l'an 3 (in table=%2.1f, in gantt=%2.1f\n", + part->name,label,sum3,last->nbma[2]); + } + } + } + if ( an!=(an1+an2+an3) ) { + fprintf(stderr,"bad computation in %s table.\n",part->file); + } + fprintf(curr->os,"%s & %s & %2.1f & %2.1f & %2.1f & %2.1f \\\\\\hline\n", + "","total",an1,an2,an3,an); + + fprintf(curr->os,"\\end{tabular}\n"); + fclose(curr->os); + curr->os=0; } @@ -548,4 +688,12 @@ do_gantt("gantt2.tex",0,tnmoins); + curr = data_new(0,0); + prepare0(curr); + prepare1(curr); + prepare2(curr); + prepare3(curr); + do_partner_table(4); + do_partner_table(5); + return 0; } Index: /anr/section-1.tex =================================================================== --- /anr/section-1.tex (revision 51) +++ /anr/section-1.tex (revision 52) @@ -61,5 +61,5 @@ re-engineering by the designer. \item[Targeted hardware architecture and technology] - COACH will handle both \altera and \xilinx FPGA devives. + COACH will handle both \altera and \xilinx FPGA devices. COACH will define architectural templates that can be customized by adding dedicated coprocessors and ASIPs and by fixing template parameters such as Index: /anr/task-0.tex =================================================================== --- /anr/task-0.tex (revision 51) +++ /anr/task-0.tex (revision 52) @@ -19,18 +19,18 @@ \end{objectif} % -\begin{workpackage}{D0} +\begin{workpackage} \item This \ST consists of the writing of the consortium agreement and of having the partners sign it. \begin{livrable} - \item{}{0}{6}{d}{\Supmc}{Consortium agreement} A document describing the - consortium agreement, signed by all the partners. + \itemL{0}{6}{d}{\Supmc}{Consortium agreement}{1:0:0} + A document describing the consortium agreement, signed by all the partners. \end{livrable} \item This \ST consists of the global management of deliverables and of the global organization of the project at all the levels. \begin{livrable} - \item{}{0}{12}{d}{\Supmc}{First progress report} - \item{}{12}{24}{d}{\Supmc}{Second progress report} - \item{}{24}{36}{d}{\Supmc}{Final report} - \item{}{0}{36}{}{\Supmc}{Global management} + \itemL{0}{12}{d}{\Supmc}{First progress report}{1:0:0} + \itemL{12}{24}{d}{\Supmc}{Second progress report}{0:1:0} + \itemL{24}{36}{d}{\Supmc}{Final report}{0:0:1} + \itemL{0}{36}{}{\Supmc}{Global management}{1:1:1} This deliverable corresponds to the global management of the project at all the levels: progress monitoring, record keeping, meeting organization, review @@ -41,5 +41,5 @@ project meetings and the communication with the project leader and other partner. \begin{livrable} - \item{}{0}{36}{}{\Supmc}{\upmc management} Project management at the partner level. + \itemL{0}{36}{}{\Supmc}{\upmc management}{1:1:1} Project management at the partner level. \end{livrable} \item This \ST consists firstly in the building and maintenance of the @@ -47,8 +47,8 @@ distributing the COACH releases. \begin{livrable} - \item{V1}{0}{6}{}{\Supmc}{development infrastructure setup} + \itemV{0}{6}{}{\Supmc}{development infrastructure setup} This deliverable consists of the setup of development infrastructure (version control system configuration, wiki). - \item{VF}{7}{36}{}{\Supmc}{development infrastructure} + \itemL{7}{36}{}{\Supmc}{development infrastructure}{1:.5:.5} This deliverable corresponds to the standard management of a development infrastructure (adding \& suppressing account, retrieving forgotten passwords, @@ -56,3 +56,3 @@ \end{livrable} \end{workpackage} - +% Index: /anr/task-1.tex =================================================================== --- /anr/task-1.tex (revision 51) +++ /anr/task-1.tex (revision 52) @@ -11,5 +11,5 @@ \end{objectif} % -\begin{workpackage}{D1} +\begin{workpackage} \item This \ST specifies COACH for the system designer. At this level COACH is a black box. The deliverables are documents allowing the system @@ -18,5 +18,5 @@ MPSoC and its 3 targets hardware mapping). \begin{livrable} - \item{V1}{0}{6}{d}{\Supmc}{COACH user manual} \setMacroInAuxFile{specGenManualI} + \itemV{0}{6}{d}{\Supmc}{COACH user manual} \setMacroInAuxFile{specGenManualI} It is the first milestone of the COACH user manual that will allow the demonstrator \STs to start. @@ -26,8 +26,8 @@ to the CSG manual (delivrable \specCsgManual) for the COACH input descriptions. - \item{VF}{6}{12}{d}{\Supmc}{COACH user manual} \setMacroInAuxFile{specGenManual} + \itemL{6}{12}{d}{\Supmc}{COACH user manual}{1:0:0} \setMacroInAuxFile{specGenManual} The COACH user manual of the {\specGenManualI} delivrable updated with the feed-backs of the demonstrator \STs. - \item{V1}{0}{6}{d}{\Stima}{CSG user manual} \setMacroInAuxFile{specCsgManualI} + \itemV{0}{6}{d}{\Stima}{CSG user manual} \setMacroInAuxFile{specCsgManualI} It is the first milestone of the CSG (COACH System Generator) user manual that will allow the demonstrator \STs to start. @@ -38,8 +38,8 @@ Nevertheless, these basic schemes will be enhanced to allow more efficent synthesis. - \item{VF}{6}{12}{d}{\Stima}{CSG user manual} \setMacroInAuxFile{specCsgManual} + \itemL{6}{12}{d}{\Stima}{CSG user manual}{1:0:0} \setMacroInAuxFile{specCsgManual} The CSG user manual of the {\specGenManualI} delivrable updated with the feed-backs of the demonstrator \STs. - \item{V1}{0}{6}{d}{\Subs}{HAS user manual} \setMacroInAuxFile{specHasManualI} + \itemV{0}{6}{d}{\Subs}{HAS user manual} \setMacroInAuxFile{specHasManualI} It is the first milestone of the HAS (Hardware Accelerator Synthesis) user manual that will allow the demonstrator \STs to start. @@ -47,5 +47,5 @@ communication schemes defined in the {\specCsgManual} delivrable must be described for coprocessor synthesis. - \item{VF}{6}{12}{d}{\Subs}{HAS user manual} \setMacroInAuxFile{specHasManual} + \itemL{6}{12}{d}{\Subs}{HAS user manual}{0:0:0} \setMacroInAuxFile{specHasManual} The HAS user manual of the {\specGenManualI} delivrable updated with the feed-backs of the demonstrator \STs. @@ -54,53 +54,53 @@ document listing all the COACH software components and how they cooperate. \begin{livrable} - \item{}{0}{6}{d}{\Supmc}{decription of \ganttlf software architecture} + \itemL{0}{6}{d}{\Supmc}{decription of \ganttlf software architecture}{1:0:0} It contains the software list and the data flow among them. \end{livrable} \item This \ST specifies the \xcoach format. \begin{livrable} - \item{V1}{0}{6}{d+x}{\Slip}{specification of \xcoach format} + \itemV{0}{6}{d+x}{\Slip}{specification of \xcoach format} \setMacroInAuxFile{specXcoachDocI} First release of the XML specification of the \xcoach format (DTD) and its associated documentation allowing to start HLS tools development. - \item{V2}{6}{12}{d+x}{\Slip}{specification of \xcoach format} + \itemV{6}{12}{d+x}{\Slip}{specification of \xcoach format} \setMacroInAuxFile{specXcoachDocII} Second release of XML specification of the \xcoach format taking into account the corrections and modifications that the developers of HAS tools suggested. - \item{VF}{12}{18}{d+x}{\Slip}{specification of \xcoach format} + \itemL{12}{18}{d+x}{\Slip}{specification of \xcoach format}{0:0:0} \setMacroInAuxFile{specXcoachDoc} Last release of XML specification of the \xcoach format enhanced with the expression of loop potential parallelism. - \item{V1}{6}{12}{x}{\Subs}{C++ to/from \xcoach format (1)} + \itemV{6}{12}{x}{\Subs}{C++ to/from \xcoach format (1)} \setMacroInAuxFile{specXcoachToCAI} Proposition of a GCC plugin that generates a \xcoach description (defined in {\specXcoachDocI} deliverable) from a C++ task description (defined in {\specHasManual} deliverable). - \item{VF}{12}{18}{x}{\Subs}{C++ to/from \xcoach format step 1} - \setMacroInAuxFile{specXcoachToCA} + \itemL{12}{18}{x}{\Subs}{C++ to/from \xcoach format (1)}{0:0:0} + \setMacroInAuxFile{specXcoachToCA}{::} The same software as the former (\specXcoachToCAI) but for \xcoach format defined in the {\specXcoachDoc} deliverable and HAS input defined in the {\specHasManual} deliverable. - \item{V1}{7}{12}{x}{\Subs}{C++ to/from \xcoach format (2)} + \itemV{7}{12}{x}{\Subs}{C++ to/from \xcoach format (2)} \setMacroInAuxFile{specXcoachToCBI} This second tool regenerates a C description from a \xcoach description. - \item{VF}{12}{18}{x}{\Subs}{C++ to/from \xcoach format (2)} + \itemL{12}{18}{x}{\Subs}{C++ to/from \xcoach format (2)}{0:0:0} \setMacroInAuxFile{specXcoachToCB} The same software as the former (\specXcoachToCBI) but for the \xcoach format as defined in the {\specXcoachDoc} deliverable and HAS input as defined in the {\specHasManual} deliverable. - \item{V1}{12}{18}{x}{\Supmc}{\xcoachplus format to SystemC} + \itemV{12}{18}{x}{\Supmc}{\xcoachplus format to SystemC} \setMacroInAuxFile{specXcoachToSystemCI} The first release of a program that translates \xcoachplus description to CABA and TLM-DT SystemC module. - \item{VF}{18}{24}{x}{\Supmc}{\xcoachplus format to SystemC} + \itemL{18}{24}{x}{\Supmc}{\xcoachplus format to SystemC}{0:2:0} \setMacroInAuxFile{specXcoachToSystemC} Maintenance work of the former software (\specXcoachToSystemCI). - \item{V1}{12}{18}{x}{\Subs}{\xcoachplus format to VHDL} + \itemV{12}{18}{x}{\Subs}{\xcoachplus format to VHDL} \setMacroInAuxFile{specXcoachToVhdlI} The first release of a program that translates \xcoachplus description to synthesizable VHDL description. - \item{VF}{18}{24}{x}{\Subs}{\xcoachplus format to VHDL} + \itemL{18}{24}{x}{\Subs}{\xcoachplus format to VHDL}{0:0:0} \setMacroInAuxFile{specXcoachToVhdl} Maintenance work of the former software (\specXcoachToVhdlI). @@ -112,7 +112,7 @@ and by extracting their delays. This is done by using RTL synthesis. \begin{livrable} - \item{}{0}{6}{d}{\Subs}{macro-cell definition} + \itemL{0}{6}{d}{\Subs}{macro-cell definition}{0:0:0} The document define the macro cell and the file format describing them. - \item{}{6}{12}{x}{\Subs}{macro-cell library generator} + \itemL{6}{12}{x}{\Subs}{macro-cell library generator}{0:0:0} A program that generates automatically the characterized macro-cell library for a FPGA device. Index: /anr/task-2.tex =================================================================== --- /anr/task-2.tex (revision 51) +++ /anr/task-2.tex (revision 52) @@ -23,11 +23,11 @@ \end{objectif} % -\begin{workpackage}{D2} +\begin{workpackage} \item This \ST corresponds to the Coach System Generator (CSG) software. \begin{livrable} - \item{V1}{0}{12}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgCoachArch} + \itemV{0}{12}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgCoachArch} The first milestone that will allow demonstrators to start working using the COACH hardware architecture template. - \item{V2}{12}{18}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgPrototypingOnly} + \itemV{12}{18}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgPrototypingOnly} This milestone adds to CSG the support to the XILINX and ALTERA architectural templates and to the enhanced communication system. @@ -35,8 +35,9 @@ and ALTERA architectural template. HAS is available. - \item{V3}{18}{24}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgAllArch} + \itemV{18}{24}{x}{\Supmc}{CSG} \setMacroInAuxFile{csgAllArch} This milestone extends CSG (\csgPrototypingOnly) to FPGA-SoC generation for the XILINX and ALTERA architectural template. - \item{VF}{24}{36}{x}{\Supmc}{CSG} Maintenance work of CSG. + \itemL{24}{36}{x}{\Supmc}{CSG}{6:6:5} + Maintenance work of CSG. \end{livrable} \item This \ST deals with the components of the architectural template. @@ -51,23 +52,23 @@ application. \begin{livrable} - \item{}{0}{12}{h}{\Supmc}{COACH architecture} The VHDL synthesizable descriptions - of the SocLib MWMR, TokenRing components. - \item{V1}{6}{18}{x}{\Stima}{XILINX architecture} + \itemL{0}{12}{h}{\Supmc}{COACH architecture}{1:0:0} + The VHDL synthesizable descriptions of the SocLib MWMR, TokenRing components. + \itemV{6}{18}{x}{\Stima}{XILINX architecture} \setMacroInAuxFile{csgXilinxSystemC} The SystemC simulation module of the MWMR component with a PLB bus interface plus the SystemC modules of the components of the XILINX architectural template not available in the SocLib component library. - \item{VF}{18}{24}{h}{\Stima}{XILINX architecture} + \itemL{18}{24}{h}{\Stima}{XILINX architecture}{0:0:0} The synthesizable VHDL description of the MWMR component corresponding to the SystemC module of the former delivrable (\csgXilinxSystemC). - \item{V1}{6}{18}{x}{\Sirisa}{ALTERA architecture} + \itemV{6}{18}{x}{\Sirisa}{ALTERA architecture} \setMacroInAuxFile{csgAlteraSystemC} The SystemC simulation module of the MWMR component with an AVALON bus interface plus the SystemC modules of the components of the ALTERA architectural template not available in the SocLib component library. - \item{VF}{18}{24}{h}{\Sirisa}{ALTERA architecture} + \itemL{18}{24}{h}{\Sirisa}{ALTERA architecture}{0:0:0} The synthesizable VHDL description of the MWMR component corresponding to the SystemC module of the former delivrable (\csgAlteraSystemC); - \item{V1}{6}{12}{d}{\Subs}{UBS architecture} + \itemV{6}{12}{d}{\Subs}{UBS architecture} \mustbecompleted{FIXME:UBS ARGH!!!!! 1) Attention si vous touchez au MWMR, ils y a 3 composants MWMR. @@ -77,8 +78,8 @@ Specification of an optimized MWMR component to handle data interleaving (space and time). This evolution aims to solve out of order communication weakness of the classical MWMR. - \item{V2}{12}{24}{x}{\Subs}{UBS architecture} + \itemV{12}{24}{x}{\Subs}{UBS architecture} Release of the tool that generates the VHDL description of the optimized MWMR component and its corresponding SystemC module. - \item{VF}{24}{30}{x}{\Subs}{UBS architecture} + \itemL{24}{30}{x}{\Subs}{UBS architecture}{0:0:0} Final release of the tool that generates the VHDL description of the optimized MWMR component and its corresponding SystemC module (\gautMWMRoptimization). @@ -90,17 +91,19 @@ the NIOS2 and MICROBLAZE processors. \begin{livrable} - \item{V1}{6}{8}{x}{\Supmc}{MUTEK OS} The drivers required for the first CSG - milestone (delivrable \csgCoachArch). - \item{V2}{8}{18}{x}{\Supmc}{MUTEK 0S} The drivers required for the - second CSG milestone ({\csgPrototypingOnly}). - \item{VF}{18}{33}{x}{\Supmc}{MUTEK OS} Maintenance work. - \item{}{6}{18}{x}{\upmc}{Port of MUTEK OS} + \itemV{6}{8}{x}{\Supmc}{MUTEK OS} + The drivers required for the first CSG milestone (delivrable \csgCoachArch). + \itemV{8}{18}{x}{\Supmc}{MUTEK 0S} + The drivers required for the second CSG milestone ({\csgPrototypingOnly}). + \itemL{18}{33}{x}{\Supmc}{MUTEK OS}{1:1:2} + Maintenance work. + \itemL{6}{18}{x}{\Supmc}{Port of MUTEK OS}{1.0:1:0} Port of MUTEK OS on the NIOS2 and MICROBLAZE processors. - \item{V1}{6}{8}{x}{\tima}{DNA OS} The drivers required for the first CSG - milestone (delivrable \csgCoachArch). - \item{V2}{8}{18}{x}{\Stima}{DNA 0S} The drivers required for the - second CSG milestone ({\csgPrototypingOnly}). - \item{VF}{18}{33}{x}{\Stima}{DNA OS} Maintenance work. - \item{}{6}{18}{x}{\tima}{Port of DNA OS} + \itemV{6}{8}{x}{\Stima}{DNA OS} + The drivers required for the first CSG milestone (delivrable \csgCoachArch). + \itemV{8}{18}{x}{\Stima}{DNA 0S} + The drivers required for the second CSG milestone ({\csgPrototypingOnly}). + \itemL{18}{33}{x}{\Stima}{DNA OS}{0:0:0} + Maintenance work. + \itemL{6}{18}{x}{\Stima}{Port of DNA OS}{0:0:0} Port of MUTEK OS on the NIOS2 and MICROBLAZE processors. \end{livrable} Index: /anr/task-3.tex =================================================================== --- /anr/task-3.tex (revision 51) +++ /anr/task-3.tex (revision 52) @@ -16,28 +16,31 @@ \end{objectif} % -\begin{workpackage}{D3} -\item Extraction de motifs et regénération au format COACH annoté +\begin{workpackage} + \item Extraction de motifs et regénération au format COACH annoté \mustbecompleted{FIXME:IRISA ........} \begin{livrable} - \item{V1}{0}{18}{d}{\Sirisa}{Interation manuelle des motifs} \mustbecompleted{FIXME .....} - \item{VF}{18}{24}{d}{\Sirisa}{Integration manuelle des motifs} \mustbecompleted{FIXME ......} + \itemV{0}{18}{d}{\Sirisa}{Interation manuelle des motifs} + \mustbecompleted{FIXME .....} + \itemL{18}{24}{d}{\Sirisa}{Integration manuelle des motifs}{0:0:0} + \mustbecompleted{FIXME ......} \end{livrable} -\item \mustbecompleted{FIXME: la liste des ST est dans wp.txt} + \item \mustbecompleted{FIXME: la liste des ST est dans wp.txt} \begin{livrable} - \item{V1}{0}{18}{d}{\Sirisa}{Intégration manuelle des motifs} \mustbecompleted{FIXME ......} + \itemL{0}{18}{d}{\Sirisa}{Intégration manuelle des motifs}{0:0:0} + \mustbecompleted{FIXME ......} \end{livrable} -\item Extraction of parallelism in polyhedral loops and conversion into a process network. + \item Extraction of parallelism in polyhedral loops and conversion into a process network. \begin{livrable} - \item{V1}{0}{6}{d}{\Slip}{Method, Preliminary Definition} + \itemV{0}{6}{d}{\Slip}{Method, Preliminary Definition} Description of the process network construction method. User manual. - \item{VF}{30}{36}{d}{\Slip}{Method} + \itemL{30}{36}{d}{\Slip}{Method}{0:0:0} Final assessment of the method and improved version of the user manual. - \item{V1}{6}{12}{x}{\Slip}{Process Construction)} + \itemV{6}{12}{x}{\Slip}{Process Construction)} Preliminary implementation in the Syntol framework. At this step the sofware will just implement a single constructor. - \item{V2}{12}{24}{x}{\Slip} {Arrays and FIFO} + \itemV{12}{24}{x}{\Slip} {Arrays and FIFO} Implementation of the array contraction and FIFO construction algorithm. Conversion of the imput and output to the \xcoach format. - \item{VF}{24}{30}{x}{\Slip} {Process ans FIFO Construction} + \itemL{24}{30}{x}{\Slip} {Process ans FIFO Construction} {0:0:0} Final release taking into account the feedbacks from the demonstrator \STs. \end{livrable} Index: /anr/task-4.tex =================================================================== --- /anr/task-4.tex (revision 51) +++ /anr/task-4.tex (revision 52) @@ -27,14 +27,15 @@ \end{objectif} % -\begin{workpackage}{D4} +\begin{workpackage} \item The goal of this \ST is to integrate the UGH HLS tool to the COACH framework. It consists of suppressing the C commpiler and the SystemC and VHDL drivers and replacing them by \xcoach and \xcoachplus drivers. \begin{livrable} - \item{V1}{6}{12}{x}{\Stima}{UGH integration} The UGH software that is able to read - \xcoach format. - \item{V2}{12}{18}{x}{\Supmc}{UGH integration} The UGH software that is able to read - \xcoach format and to write \xcoachplus format. - \item{VF}{18}{33}{x}{\Supmc}{UGH integration} Maintenance work of the UGH software. + \itemL{6}{12}{x}{\Stima}{UGH integration} + The UGH software that is able to read \xcoach format. + \itemV{12}{18}{x}{\Supmc}{UGH integration} + The UGH software that is able to read \xcoach format and to write \xcoachplus format. + \itemL{18}{33}{x}{\Supmc}{UGH integration}{0:2:4.0} + Maintenance work of the UGH software. \end{livrable} \item The goal of this \ST is to integrate the GAUT HLS tool to the COACH framework. It @@ -42,9 +43,10 @@ them by \xcoach and \xcoachplus drivers. \begin{livrable} - \item{V1}{6}{12}{x}{\Subs}{GAUT integration} The GAUT software that is able to read - \xcoach format. - \item{VF}{12}{18}{x}{\Subs}{GAUT integration} The GAUT software that is able to read - \xcoach format and to write \xcoachplus format. - \item{VF}{18}{33}{x}{\Subs}{GAUT integration} Maintenance work of the GAUT software. + \itemV{6}{12}{x}{\Subs}{GAUT integration} + The GAUT software that is able to read \xcoach format. + \itemV{12}{18}{x}{\Subs}{GAUT integration} + The GAUT software that is able to read \xcoach format and to write \xcoachplus format. + \itemL{18}{33}{x}{\Subs}{GAUT integration}{0:0:0} + Maintenance work of the GAUT software. \end{livrable} \item The goal of this \ST is to improve the UGH and GAUT HLS tools. @@ -52,16 +54,19 @@ usefull enhancements \begin{livrable} - \item{}{18}{24}{x}{\Stima}{UGH enhancement 1} The UGH software whith support for treating - automatically data dominated sections included into a control dominated application. - \item{}{21}{27}{x}{\Stima}{UGH enhancement 2} The UGH software that is able to - generate a micro-architecture without the variable binding currently done by the - designer. - \item{}{6}{18}{x}{\Subs}{GAUT enhancement 1} Release of the GAUT software that supports the control - and data flow formal model. + \itemL{18}{24}{x}{\Stima}{UGH enhancement 1}{0:0:0} + The UGH software whith support for treating automatically data dominated sections + included into a control dominated application. + \itemL{21}{27}{x}{\Stima}{UGH enhancement 2}{0:0:0} + The UGH software that is able to generate a micro-architecture without the + variable binding currently done by the designer. + \itemL{6}{18}{x}{\Subs}{GAUT enhancement 1}{0:0:0} + Release of the GAUT software that supports the control and data flow formal model. \mustbecompleted{FIXME:USB ca ne va pas avec l'intro de la tache, UGH n'a plus aucune utilite si ceci reste} - \item{}{18}{30}{x}{\Subs}{GAUT enhancement 2} Release of the GAUT software that supports the control - and data flow formal model and also supports new constraints and objectives defined in \ST1-1 \mustbecompleted{FIXME:UBS: quel - delivrable ??}. + \itemL{18}{30}{x}{\Subs}{GAUT enhancement 2}{0:0:0} + Release of the GAUT software that supports the control and data flow formal model + and also supports new constraints and objectives defined in + \mustbecompleted{FIXME:USB utilise une macro svp: \ST1-1} + \mustbecompleted{FIXME:UBS: quel delivrable ??}. % FIXME:USB redondant avec le delivrable "GAUT integration" ou alors % c'est en enhancement et il faut le decrire. @@ -77,11 +82,11 @@ synthesis. \begin{livrable} - \item{V1}{0}{6}{d}{\Supmc}{frequency calibration} A document describing the set up of - the coprocessor frequency calibration. - \item{V2}{6}{12}{x}{\Supmc}{frequency calibration} A VHDL description of hardware - added to the coprocessor to enable the calibration. - \item{VF}{12}{24}{x}{\Supmc}{frequency calibration} The frequency calibration software - consists of a driver in the FPGA-SoC operating system and of a control software on - a PC. + \itemV{0}{12}{d}{\Supmc}{frequency calibration} + A document describing the set up of the coprocessor frequency calibration. + \itemV{12}{24}{x}{\Supmc}{frequency calibration} + A VHDL description of hardware added to the coprocessor to enable the calibration. + \itemL{24}{33}{x}{\Supmc}{frequency calibration}{2:.5:3.5} + The frequency calibration software consists of a driver in the FPGA-SoC operating + system and of a control software on a PC. \end{livrable} \end{workpackage} Index: /anr/task-5.tex =================================================================== --- /anr/task-5.tex (revision 51) +++ /anr/task-5.tex (revision 52) @@ -24,11 +24,12 @@ \end{objectif} % -\begin{workpackage}{D5} +\begin{workpackage} \item This \ST is the definition of the communication schemes as a software API (Application Programing Interface) between the application part running on the PC and the application part running on the FPGA-SoC. \begin{livrable} - \item{}{0}{6}{d}{\Supmc}{HPC communication API} User refernce manual describing the API. - \global\edef\hpcCommApi{\name} + \itemL{0}{6}{d}{\Supmc}{HPC communication API}{1.0:0:0} + \setMacroInAuxFile{hpcCommApi} + User refernce manual describing the API. \end{livrable} \item This \ST consists in helping to partition the application. @@ -36,23 +37,28 @@ the partitioned application. \begin{livrable} - \item{}{6}{12}{x}{\Supmc}{HPC partionning helper} A library implementing the communication - API defined in the {\hpcCommApi} delivrable. + \itemL{6}{12}{x}{\Supmc}{HPC partionning helper}{1:0:0} + A library implementing the communication API defined in the {\hpcCommApi} delivrable. \end{livrable} \item This \ST deals with the implementation of the communication API on the both sides (PC part and FPGA-SoC). \begin{livrable} - \item{}{12}{21}{x}{\Supmc}{HPC API for Linux PC} The PC part of the HPC communication API - that comminicates with the FPGA-SOC, a library and probably a LINUX module. - \item{}{12}{21}{x}{\Supmc}{HPC API for MUTEK OS} The FPGA-SoC part of the communication API, a - driver.\global\edef\hpcMutekDriver{\name} - \item{}{21}{24}{x}{\Stima}{HPC API for DNA OS} Port of the {\hpcMutekDriver} driver on the DNA OS. + \itemL{12}{21}{x}{\Supmc}{HPC API for Linux PC}{0:3:0} + The PC part of the HPC communication API that comminicates with the FPGA-SOC, a + library and probably a LINUX module. + \itemL{12}{21}{x}{\Supmc}{HPC API for MUTEK OS}{0:3:0} + \setMacroInAuxFile{hpcMutekDriver} + The FPGA-SoC part of the communication API, a driver. + \itemL{21}{24}{x}{\Stima}{HPC API for DNA OS}{0:0:0} + Port of the {\hpcMutekDriver} driver on the DNA OS. + \itemL{24}{33}{x}{\Supmc}{HPC API}{0:0:1} + Maintenance work of HPC API for both Lunix PC and MUTEK OS. \end{livrable} \item This \ST deals with the implementation of hardware required by the COACH architectural template for using the PCI/X IP of \altera and \xilinx. \begin{livrable} - \item{}{9}{18}{h}{\Stima}{HPC hardware \xilinx} + \itemL{9}{18}{h}{\Stima}{HPC hardware \xilinx}{0:0:0} \setMacroInAuxFile{hpcPlbBridge} The synthesizable VHDL description of a PLB/VCI bridge and its corresponding SystemC model. - \item{}{9}{18}{h}{\Saltera}{HPC hardware \altera} + \itemL{9}{18}{h}{\Saltera}{HPC hardware \altera}{0:0:0} \setMacroInAuxFile{hpcAvalonBridge} The synthesizable VHDL description of an AVALON/VCI bridge and its corresponding SystemC model. @@ -60,12 +66,12 @@ \item This \ST deals with the dynamic reconfiguration of an FPGA. \begin{livrable} - \item{}{18}{30}{x}{\Stima}{dynamic reconfiguration \ganttlf DNA drivers} - \global\edef\hpcDynconfDriver{\name} + \itemL{18}{30}{x}{\Stima}{dynamic reconfiguration \ganttlf DNA drivers}{0:0:0} + \setMacroInAuxFile{hpcDynconfDriver} \mustbecompleted{FIXME:TIMA ....} - \item{}{30}{36}{x}{\Supmc}{dynamic reconfiguration \ganttlf MUTEK drivers} + \itemL{30}{36}{x}{\Supmc}{dynamic reconfiguration \ganttlf MUTEK drivers}{0:0:1} Port of the {\hpcDynconfDriver} \mustbecompleted{FIXME:TIMA driver} on the MUTEK OS. - \item{}{24}{36}{x}{\Supmc}{CSG support for \ganttlf dynamic reconfiguration} + \itemL{24}{36}{x}{\Supmc}{CSG support for \ganttlf dynamic reconfiguration}{0:0:2} \mustbecompleted{FIXME:TIMA ....} - \item{}{18}{36}{x}{\Stima}{PC support for \ganttlf dynamic reconfiguration} + \itemL{18}{36}{x}{\Stima}{PC support for \ganttlf dynamic reconfiguration}{0:0:0} \mustbecompleted{FIXME:TIMA ....} \end{livrable} @@ -74,5 +80,5 @@ They are based on \mustbecompleted{FIXME:stratix4} FPGA device of 400,000 LUT. \begin{livrable} - \item{}{0}{6}{m}{\Saltera}{HPC development boards} Two PCI/X FPGA boards. + \itemL{0}{6}{m}{\Saltera}{HPC development boards}{0:0:0} Two PCI/X FPGA boards. \end{livrable} \end{workpackage} Index: /anr/task-6.tex =================================================================== --- /anr/task-6.tex (revision 51) +++ /anr/task-6.tex (revision 52) @@ -13,5 +13,5 @@ \end{objectif} % -\begin{workpackage}{D6} +\begin{workpackage} \item This \ST relies to the COACH use by \navtel. The application is A-COMPLETER-1-A-3-LIGNE .... .... .... .... .... @@ -20,16 +20,16 @@ ... ... \begin{livrable} - \item{V1}{0}{6}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification} + \itemV{0}{6}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification} Choice of the demonstrator and its implementation as a PC C/C++ program. - \item{VF}{7}{12}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification} + \itemL{7}{12}{x}{\Snavtel}{\navtel \ganttlf demonstrator specification}{0:0:0} The demonstrator is described as a communicating task graph using the specification defined in the milestone T0+12. - \item{V1}{13}{15}{d}{\Snavtel}{\navtel \ganttlf demonstrator} + \itemV{13}{15}{d}{\Snavtel}{\navtel \ganttlf demonstrator} This deliverable is a report that describes the experimentation done with the T0+12 COACH milestone. - \item{V2}{25}{27}{d}{\Snavtel}{\navtel \ganttlf demonstrator} + \itemV{25}{27}{d}{\Snavtel}{\navtel \ganttlf demonstrator} This deliverable is a report that describes the experimentation done with the T0+24 COACH milestone. - \item{VF}{30}{36}{d}{\Snavtel}{\navtel \ganttlf demonstrator} + \itemL{30}{36}{d}{\Snavtel}{\navtel \ganttlf demonstrator}{0:0:0} This deliverable is a report that describes the experimentation done with the pre-final COACH release. Index: /anr/task-7.tex =================================================================== --- /anr/task-7.tex (revision 51) +++ /anr/task-7.tex (revision 52) @@ -19,18 +19,18 @@ \end{objectif} % -\begin{workpackage}{D1} +\begin{workpackage} \item This \ST relies to the management of the WEB site and to the distribution of the COACH releases. \begin{livrable} - \item{V1}{0}{6}{d}{\Supmc}{dissemination WEB site} + \itemV{0}{6}{d}{\Supmc}{dissemination WEB site} This deliverable consists firstly in providing a WEB site (name, HTTP server setup, wiki) and secondly in defining the site map and finally in writting and installing the pages. - \item{VF}{6}{36}{}{\Supmc}{dissemination WEB site} + \itemL{6}{36}{}{\Supmc}{dissemination WEB site}{1:.5:.5} This deliverable corresponds to the standard management of a WEB site (modifying, adding, suppressing, replacing pages). Especialy the user reference manuals provided in the other tasks will be published in this site. The published articles will be also be installed in this site. - \item{}{6}{36}{}{\Supmc}{release handling} + \itemL{6}{36}{}{\Supmc}{release handling}{1:.5:.5} This deliverable deals with the elaboration of the COACH software milestones and final releases with their installation manuals and to publish then into the WEB @@ -44,7 +44,7 @@ planets, or a database management system. \begin{livrable} - \item{V1}{0}{6}{x}{\Supmc}{tutorial specification} + \itemV{0}{6}{x}{\Supmc}{tutorial specification} Choice of the application and its implementation as a C/C++ program. - \item{V2}{6}{12}{d+x}{\Supmc}{tutorial} + \itemV{6}{12}{d+x}{\Supmc}{tutorial} The application is split into two communicating parts, the PC part and FPGA-SoC part. Using the features the T0+12 milestone provides, @@ -52,9 +52,9 @@ The FPGA-SoC part is described as communicating task graph. The tutorial also describes how a promising task graph can be obtained. - \item{V3}{18}{24}{d}{\Supmc}{tutorial} + \itemV{18}{24}{d}{\Supmc}{tutorial} This tutorial shows how a task can be migrated to coprocessor using HAS tools and how FPGA-SoC can be generated and run to FPGA. This for HAS tools and and architectural template available in T0+24 milestone. - \item{VF}{30}{36}{d}{\Supmc}{tutorial} + \itemL{30}{36}{d}{\Supmc}{tutorial}{2:1:1} The final release of the tutorial. \end{livrable}