| 1 | [[PageOutline]] |
| 2 | |
| 3 | = A) Goals = |
| 4 | |
| 5 | DSX stands for ''Design Space eXplorer''. It helps the system designer to map a multi-threaded software application |
| 6 | on a multi-processor hardware architecture (MP-SoC) modeled with the SoCLib components. |
| 7 | |
| 8 | It supports the hardware software codesign approach, and allows the designer to define successively : |
| 9 | * the hardware architecture : number of processors, number of memory banks, peripherals, etc. |
| 10 | * the software application structure : Task & Communication Graph |
| 11 | * the mapping of the software objects on the hardware components |
| 12 | |
| 13 | The software application must be statically defined as a '''Task & Communications Graph'''. |
| 14 | The number of tasks (defining the coarse grain parallelism), and the communication channels between |
| 15 | tasks should not change during execution. The two targeted application domains are the telecommunication |
| 16 | applications (where the tasks are handling packets or packet descriptors), and multi-media applications |
| 17 | (where the tasks are handling audio or video streams). |
| 18 | |
| 19 | A specific goal of DSX is to allow the system designer to control not only the the placement of the |
| 20 | tasks on the processors, but also to control precisely the placement of the software objects (execution stacks, |
| 21 | communication buffers, synchronization locks, etc.) on the memory banks. In shared memory multi-processors |
| 22 | architectures with several physically distributed memory banks, such control is mandatory to optimize |
| 23 | both the performances and the power consumption. |
| 24 | |
| 25 | = B) General Principles = |
| 26 | |
| 27 | The general principles are the following: |
| 28 | * The coarse grain parallelism is |
| 29 | * The software tasks are supposed to be written in C or C++. |
| 30 | * |
| 31 | * [https://www-asim.lip6.fr/trac/mutekh Mutek] : OS kernel for embedded MPSoCs |
| 32 | |
| 33 | == B1) API SRL (System Ressources Layer) == |
| 34 | |
| 35 | We want to map the multi-threaded software application on several hardware platforms, |
| 36 | without any modification of the task code. One important platform is a POSIX compliant |
| 37 | workstation, as we want to validate the multi-threaded application by running it on a |
| 38 | the workstation before starting the mapping on the MPSoC architecture. |
| 39 | |
| 40 | DSX defines a '''system Ressource Layer''' API (SRL), that is an abstraction of the synchronization |
| 41 | and communication services provided by the various target platforms. The SRL API helps |
| 42 | the programmer to distinguish the embedded application code from the system code used for |
| 43 | inter-tasks communications and synchronizations. |
| 44 | |
| 45 | Three platforms are supported : |
| 46 | * Any Linux (or Unix) workstation supporting the POSIX threads, |
| 47 | * MP-SoC architecture using the MUTEK/D operation system, |
| 48 | * MP-SoC architecture using the MUTEK/S operating system, |
| 49 | |
| 50 | MUTEK/D is an embedded, POSIX compliant, distributed, operating system for MP-SoCs, |
| 51 | while MUTEK/S is an optimized version: the performances are improved, and the memory |
| 52 | footprint is reduced, at the cost of loosing the POSIX compatibility. |
| 53 | |
| 54 | == B2) DSX/L language == |
| 55 | |
| 56 | DSX/L is a language based on PYTHON, that allows the system designer to describe : |
| 57 | * the Task & Communication Graph (TCG) |
| 58 | * the MP-SoC hardware architecture (using the hardware components available in SoCLib). |
| 59 | * the mapping of the TCG on the MP-Soc architecture. |
| 60 | |
| 61 | The DSX/L script execution generates the binary code executable on the workstation, the |
| 62 | SystemC model of the ''top cell'' correspondint to the MP-SoC architecture, and the binary |
| 63 | code that will be uploaded in the MP-Soc embedded memory. |
| 64 | |