| 1 | [[PageOutline]] |
| 2 | |
| 3 | There may be some different mapping possibilities. |
| 4 | |
| 5 | Mapping directive always takes at least one argument: the object to map. Following arguments |
| 6 | are keyword arguments (i.e. they are named) that may be specified in any order. |
| 7 | Their meaning is tied to what kind of object you are mapping, and how you are mapping it. |
| 8 | |
| 9 | Some mapping arguments may be optional. |
| 10 | |
| 11 | Let's explore mappable objects, and how they may be deployed. |
| 12 | |
| 13 | = Tasks = |
| 14 | |
| 15 | == as Software Task == |
| 16 | |
| 17 | * Mandatory arguments: |
| 18 | * `run`: |
| 19 | A Cpu to run task on |
| 20 | * `stack`: |
| 21 | A memory Segment to put stack in. Stack does not grow dynamically. This should be |
| 22 | a segment of cacheable memory for performance reasons. |
| 23 | * `desc`: |
| 24 | A memory Segment to put the task's description in. This description won't be written to. |
| 25 | Segment may be read-only memory. |
| 26 | * `status`: |
| 27 | A memory Segment to put dynamic status on. This must be uncached in order to be |
| 28 | able to use inter-cpu communications. |
| 29 | * Optional arguments: |
| 30 | * `code`: |
| 31 | A memory segment to copy task code in. This won't be written to. If not specified, |
| 32 | code will be placed in global code segment, specified when mapping OS objects. |
| 33 | * Example: |
| 34 | {{{ |
| 35 | mapper.map( "cons0", |
| 36 | run = mapper.hard.processor, |
| 37 | stack = mapper.hard.cram0, |
| 38 | desc = mapper.hard.cram0, |
| 39 | status = mapper.hard.uram0, |
| 40 | code = mapper.hard.cram0) |
| 41 | }}} |
| 42 | |
| 43 | == as Coprocessor == |
| 44 | |
| 45 | An `HwTask()` implementation must exist for the task in order to be able to map it as |
| 46 | a coprocessor. |
| 47 | |
| 48 | * Mandatory arguments: |
| 49 | * `vci`: |
| 50 | A VCI interconnect to connect MwMr controller to. |
| 51 | * Example: |
| 52 | {{{ |
| 53 | mapper.map( "cons0", |
| 54 | vci = mapper.hard.vgmn) |
| 55 | }}} |
| 56 | |
| 57 | = MwMr channels = |
| 58 | |
| 59 | * Mandatory arguments: |
| 60 | * `lock`: |
| 61 | A Locks dedicated hardware component, like SocLib's Locks component. Uses one lock. |
| 62 | * `desc`: |
| 63 | A memory Segment to put the channel's description in. This description won't be written to. |
| 64 | Segment may be read-only memory. |
| 65 | * `status`: |
| 66 | A memory Segment to put dynamic status and buffer in. This must be cacheable. Software Mwmr |
| 67 | protocol implémentations do explicit cachelines flushing. |
| 68 | * Example: |
| 69 | {{{ |
| 70 | mapper.map( "fifo", |
| 71 | lock = mapper.hard.locks, |
| 72 | status = mapper.hard.cram1, |
| 73 | desc = mapper.hard.cram1) |
| 74 | }}} |
| 75 | |
| 76 | = Processor = |
| 77 | |
| 78 | * Mandatory arguments: |
| 79 | * `desc`: |
| 80 | A memory Segment to put the processor's description in. This description won't be written to. |
| 81 | Segment may be read-only memory. |
| 82 | * `status`: |
| 83 | A memory Segment to put dynamic status in. This must be uncached as it is used to implement |
| 84 | inter-cpu communication. |
| 85 | * `priv`: |
| 86 | A memory Segment to put the processor's private data in. This should be cacheable. |
| 87 | * Example: |
| 88 | {{{ |
| 89 | mapper.map("processor", |
| 90 | desc = mapper.hard.cram0, |
| 91 | priv = mapper.hard.cram0, |
| 92 | status = mapper.hard.uram0) |
| 93 | }}} |
| 94 | |
| 95 | = OS objects = |
| 96 | |
| 97 | * Mandatory arguments: |
| 98 | * `desc`: |
| 99 | A memory Segment to put the os' description in. This description won't be written to. |
| 100 | Segment may be read-only memory. |
| 101 | * `shared`: |
| 102 | A memory Segment to put os' global data in. This must be uncached as it is used to implement |
| 103 | inter-process communication. |
| 104 | * `code`: |
| 105 | A memory Segment to put all unplaced executable code in. This should be cacheable and may be |
| 106 | read-only. If you specify a list of segments here, code will be replicated on each segment and |
| 107 | closest copy will be used by CPUs. |
| 108 | * Example: |
| 109 | {{{ |
| 110 | mapper.map(mapper.tcg, |
| 111 | desc = mapper.hard.cram1, |
| 112 | shared = mapper.hard.uram1, |
| 113 | code = mapper.hard.cram1) |
| 114 | }}} |
| 115 | |