| 1 | = Task models = |
| 2 | |
| 3 | A task model is a definition of an instanciable task, ie |
| 4 | * a name |
| 5 | * a list of ports accepting resources from different [wiki:DsxResource resource types] |
| 6 | * a list of available implementations |
| 7 | |
| 8 | = Task implementations = |
| 9 | |
| 10 | == Software Task == |
| 11 | |
| 12 | A software task implementation is defined by: |
| 13 | * a function to call |
| 14 | * a list of C source files (even if some files are shared between tasks, you must redeclare them in each using task implementation definition) |
| 15 | |
| 16 | {{{ |
| 17 | tg = TaskModel( |
| 18 | 'tg', |
| 19 | outfifos = ['output'], |
| 20 | impl = [ SwTask( 'tg', |
| 21 | stack_size = 4096, |
| 22 | sources = [ 'src/tg_posix.c' ] ) |
| 23 | ] ) |
| 24 | }}} |
| 25 | |
| 26 | == Hardware Task == |
| 27 | |
| 28 | An hardware implementation is in fact a corpocessor (which must be implemented in simulator/synthesis context and declared in DSX) doing the same thing as the task. |
| 29 | |
| 30 | The following restrictions apply: |
| 31 | * Task must only use MwMr fifos for data exchange |
| 32 | * Task must not be RealTime |
| 33 | |
| 34 | Declaration consists of: |
| 35 | * Coprocessor reference |
| 36 | * Optional coprocessor arguments |
| 37 | |
| 38 | {{{ |
| 39 | tg = TaskModel( |
| 40 | 'tg', |
| 41 | outfifos = ['output'], |
| 42 | impl = [ SwTask( 'tg', |
| 43 | stack_size = 4096, |
| 44 | sources = [ 'src/tg_posix.c' ] ) |
| 45 | HwTask( Tg, filename = 'plan.jpg' ) |
| 46 | ] ) |
| 47 | }}} |
| 48 | |
| 49 | == Virtual Task == |
| 50 | |
| 51 | If a task follows constraints for having an hardware implementation, it may be virtually implemented in hardware, which means it will be run in simulator's context as if it were a coprocessor, actually using C implementation. |
| 52 | |
| 53 | This kind if virtualization is only available for SystemC simulation (ie not VHDL), and you must have defined a software implementation. |
| 54 | If your task has a Virtual() declaration and an HwTask at the same time, the implementation chosen by DSX for simulation purposes will be unpredictable, you should avoid such situations. |
| 55 | |
| 56 | {{{ |
| 57 | idct = TaskModel( |
| 58 | 'idct', |
| 59 | infifos = [ 'input' ], |
| 60 | outfifos = [ 'output' ], |
| 61 | impl = [ SwTask( 'idct', |
| 62 | stack_size = 1024, |
| 63 | sources = [ 'src/idct.c' ] ), |
| 64 | Virtual() |
| 65 | ] ) |
| 66 | }}} |
| 67 | |
| 68 | == Task Synthesis == |
| 69 | |
| 70 | Using Ugh, a task may be synthetized, this is not supported at this time. |