[283] | 1 | /** |
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| 2 | * \file spi.c |
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| 3 | * \date 31 August 2012 |
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| 4 | * \author Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr> |
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| 5 | */ |
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| 6 | #include <spi_driver.h> |
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| 7 | #include <utils.h> |
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| 8 | |
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| 9 | /** |
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| 10 | * \param x: input value |
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| 11 | * |
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| 12 | * \return byte-swapped value |
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| 13 | * |
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| 14 | * \brief byte-swap a 32bit word |
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| 15 | */ |
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| 16 | static unsigned int bswap32(unsigned int x) |
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| 17 | { |
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| 18 | unsigned int y; |
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| 19 | y = (x & 0x000000ff) << 24; |
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| 20 | y |= (x & 0x0000ff00) << 8; |
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| 21 | y |= (x & 0x00ff0000) >> 8; |
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| 22 | y |= (x & 0xff000000) >> 24; |
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| 23 | return y; |
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| 24 | } |
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| 25 | |
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| 26 | /** |
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| 27 | * \param spi : Initialized pointer to the SPI controller |
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| 28 | * |
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| 29 | * \brief Wait until the SPI controller has finished a transfer |
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| 30 | * |
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| 31 | * Wait until the GO_BUSY bit of the SPI controller be deasserted |
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| 32 | */ |
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| 33 | static void _spi_wait_if_busy(struct spi_dev * spi) |
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| 34 | { |
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| 35 | register int delay; |
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| 36 | |
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| 37 | while(SPI_IS_BUSY(spi)) |
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| 38 | { |
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| 39 | for (delay = 0; delay < 100; delay++); |
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| 40 | } |
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| 41 | } |
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| 42 | |
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| 43 | /** |
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| 44 | * \param spi : Initialized pointer to the SPI controller |
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| 45 | * |
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| 46 | * \return void |
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| 47 | * |
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| 48 | * \brief Init transfer of the tx registers to the selected slaves |
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| 49 | */ |
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| 50 | static void _spi_init_transfer(struct spi_dev * spi) |
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| 51 | { |
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| 52 | unsigned int spi_ctrl = ioread32(&spi->ctrl); |
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| 53 | |
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| 54 | iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); |
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| 55 | } |
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| 56 | |
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| 57 | /** |
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| 58 | * \param spi_freq : Desired frequency for the generated clock from the SPI |
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| 59 | * controller |
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| 60 | * \param sys_freq : System clock frequency |
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| 61 | * |
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| 62 | * \brief Calculated the value for the divider register in order to obtain the SPI |
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| 63 | * desired clock frequency |
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| 64 | */ |
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| 65 | static unsigned int _spi_calc_divider_value( unsigned int spi_freq , |
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| 66 | unsigned int sys_freq ) |
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| 67 | { |
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| 68 | return ((sys_freq / (spi_freq * 2)) - 1); |
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| 69 | } |
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| 70 | |
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| 71 | void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index) |
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| 72 | { |
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| 73 | _spi_wait_if_busy(spi); |
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| 74 | { |
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| 75 | iowrite8(&spi->rx_tx[index % 4], byte); |
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| 76 | _spi_init_transfer(spi); |
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| 77 | } |
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| 78 | _spi_wait_if_busy(spi); |
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| 79 | } |
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| 80 | |
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| 81 | volatile unsigned char spi_get_rx(struct spi_dev * spi, int index) |
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| 82 | { |
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| 83 | return ioread8(&spi->rx_tx[index % 4]); |
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| 84 | } |
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| 85 | |
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| 86 | unsigned int spi_get_data( struct spi_dev * spi, |
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| 87 | paddr_t buffer , |
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| 88 | unsigned int count ) |
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| 89 | { |
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| 90 | unsigned int spi_ctrl0; // ctrl value before calling this function |
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| 91 | unsigned int spi_ctrl; |
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| 92 | int i; |
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| 93 | |
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| 94 | /* |
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| 95 | * Only reading of one block (512 bytes) are supported |
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| 96 | */ |
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| 97 | if ( count != 512 ) return 1; |
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| 98 | |
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| 99 | _spi_wait_if_busy(spi); |
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| 100 | |
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| 101 | spi_ctrl0 = ioread32(&spi->ctrl); |
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| 102 | |
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| 103 | #if 0 |
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| 104 | /* |
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| 105 | * Read data using SPI DMA mechanism |
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| 106 | * Two restrictions: |
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| 107 | * 1. Can transfer only one block (512 bytes). |
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| 108 | * 2. The destination buffer must be aligned to SPI burst size (64 bytes) |
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| 109 | */ |
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| 110 | if ((buffer & 0x3f) == 0) |
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| 111 | { |
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| 112 | _puts("spi_get_data(): Starting DMA transfer / count = "); |
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| 113 | _putx(count); |
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| 114 | _puts("\n"); |
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| 115 | |
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| 116 | _puts("spi_get_data(): buffer = "); |
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| 117 | _putx(buffer); |
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| 118 | _puts("\n"); |
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| 119 | |
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| 120 | spi->dma_base = (buffer ) & ((1 << 32) - 1); // 32 lsb |
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| 121 | spi->dma_baseh = (buffer >> 32) & ((1 << 8 ) - 1); // 8 msb |
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| 122 | spi->dma_count = count | SPI_DMA_COUNT_READ; |
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| 123 | |
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| 124 | while ( (spi->dma_count >> 1) ); |
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| 125 | |
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| 126 | goto reset_ctrl; |
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| 127 | } |
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| 128 | #endif |
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| 129 | |
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| 130 | /* |
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| 131 | * Read data without SPI DMA mechanism |
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| 132 | * |
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| 133 | * Switch to 128 bits words |
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| 134 | */ |
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| 135 | |
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| 136 | spi_ctrl = (spi_ctrl0 & ~SPI_CTRL_CHAR_LEN_MASK) | 128; |
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| 137 | iowrite32(&spi->ctrl, spi_ctrl); |
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| 138 | |
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| 139 | /* |
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| 140 | * Read data. |
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| 141 | * Four 32 bits words at each iteration (128 bits = 16 bytes) |
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| 142 | */ |
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| 143 | for (i = 0; i < count/16; i++) |
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| 144 | { |
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| 145 | iowrite32(&spi->rx_tx[0], 0xffffffff); |
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| 146 | iowrite32(&spi->rx_tx[1], 0xffffffff); |
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| 147 | iowrite32(&spi->rx_tx[2], 0xffffffff); |
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| 148 | iowrite32(&spi->rx_tx[3], 0xffffffff); |
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| 149 | iowrite32(&spi->ctrl, spi_ctrl | SPI_CTRL_GO_BSY); |
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| 150 | |
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| 151 | _spi_wait_if_busy(spi); |
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| 152 | |
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| 153 | _physical_write( buffer, bswap32(ioread32(&spi->rx_tx[3])) ); |
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| 154 | buffer += 4; |
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| 155 | _physical_write( buffer, bswap32(ioread32(&spi->rx_tx[2])) ); |
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| 156 | buffer += 4; |
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| 157 | _physical_write( buffer, bswap32(ioread32(&spi->rx_tx[1])) ); |
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| 158 | buffer += 4; |
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| 159 | _physical_write( buffer, bswap32(ioread32(&spi->rx_tx[0])) ); |
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| 160 | buffer += 4; |
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| 161 | } |
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| 162 | |
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| 163 | //reset_ctrl: |
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| 164 | |
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| 165 | /* Switch back to original word size */ |
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| 166 | iowrite32(&spi->ctrl, spi_ctrl0); |
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| 167 | |
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| 168 | return 0; |
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| 169 | } |
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| 170 | |
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| 171 | void spi_ss_assert(struct spi_dev * spi, int index) |
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| 172 | { |
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| 173 | unsigned int spi_ss = ioread32(&spi->ss); |
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| 174 | |
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| 175 | iowrite32(&spi->ss, spi_ss | (1 << index)); |
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| 176 | } |
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| 177 | |
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| 178 | void spi_ss_deassert(struct spi_dev * spi, int index) |
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| 179 | { |
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| 180 | unsigned int spi_ss = ioread32(&spi->ss); |
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| 181 | |
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| 182 | iowrite32(&spi->ss, spi_ss & ~(1 << index)); |
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| 183 | } |
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| 184 | |
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| 185 | void _spi_init ( struct spi_dev * spi, |
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| 186 | int spi_freq , |
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| 187 | int sys_freq , |
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| 188 | int char_len , |
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| 189 | int tx_edge , |
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| 190 | int rx_edge ) |
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| 191 | { |
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| 192 | unsigned int spi_ctrl = ioread32(&spi->ctrl); |
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| 193 | |
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| 194 | if ( tx_edge == 0 ) spi_ctrl |= SPI_CTRL_TXN_EN; |
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| 195 | else if ( tx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_TXN_EN; |
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| 196 | if ( rx_edge == 0 ) spi_ctrl |= SPI_CTRL_RXN_EN; |
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| 197 | else if ( rx_edge == 1 ) spi_ctrl &= ~SPI_CTRL_RXN_EN; |
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| 198 | if ( char_len > 0 ) spi_ctrl = (spi_ctrl & ~SPI_CTRL_CHAR_LEN_MASK) | |
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| 199 | (char_len & SPI_CTRL_CHAR_LEN_MASK); |
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| 200 | |
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| 201 | iowrite32(&spi->ctrl, spi_ctrl); |
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| 202 | |
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| 203 | if (spi_freq > 0 && sys_freq > 0) |
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| 204 | iowrite32(&spi->divider, _spi_calc_divider_value(spi_freq, sys_freq)); |
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| 205 | } |
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| 206 | |
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| 207 | /* |
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| 208 | * vim: tabstop=4 : shiftwidth=4 : expandtab : softtabstop=4 |
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| 209 | */ |
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