1 | /////////////////////////////////////////////////////////////////////////////////////// |
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2 | // File : main.c (for classif application) |
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3 | // Date : november 2014 |
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4 | // author : Alain Greiner |
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5 | /////////////////////////////////////////////////////////////////////////////////////// |
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6 | // This multi-threaded application takes a stream of Gigabit Ethernet packets, |
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7 | // and makes packet analysis and classification, based on the source MAC address. |
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8 | // It uses the NIC peripheral, and the distributed kernel chbufs accessed by the CMA |
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9 | // component to receive and send packets on the Gigabit Ethernet port. |
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10 | // |
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11 | // It can run on architectures containing up to 16 * 16 clusters, |
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12 | // and up to 8 processors per cluster. |
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13 | // |
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14 | // This application is described as a TCG (Task and Communication Graph) |
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15 | // containing (N+2) tasks per cluster: |
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16 | // - one "load" task |
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17 | // - one "store" task |
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18 | // - N "analyse" tasks |
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19 | // The containers are distributed (N+2 containers per cluster): |
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20 | // - one RX container (part of the kernel rx_chbuf), in the kernel heap. |
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21 | // - one TX container (part of the kernel tx-chbuf), in the kernel heap. |
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22 | // - N working containers (one per analysis task), in the user heap. |
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23 | // In each cluster, the "load", analysis" and "store" tasks communicates through |
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24 | // three local MWMR fifos: |
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25 | // - fifo_l2a : tranfer a full container from "load" to "analyse" task. |
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26 | // - fifo_a2s : transfer a full container from "analyse" to "store" task. |
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27 | // - fifo_s2l : transfer an empty container from "store" to "load" task. |
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28 | // For each fifo, one item is a 32 bits word defining the index of an |
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29 | // available working container. |
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30 | // The pointers on the working containers, and the pointers on the MWMR fifos |
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31 | // are global arrays stored in cluster[0][0]. |
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32 | // a local MWMR fifo containing NB_PROCS_MAX containers (one item = one container). |
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33 | // The MWMR fifo descriptors array is defined as a global variable in cluster[0][0]. |
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34 | // |
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35 | // Initialisation is done in three steps by the "load" & "store" tasks: |
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36 | // 1) Task "load" in cluster[0][0] initialises the heaps in all clusters. Other tasks |
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37 | // are waiting on the global_sync synchronisation variable. |
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38 | // 2) Then task "load" in cluster[0][0] initialises the barrier between all "load" |
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39 | // tasks, allocates NIC & CMA RX channel, and starts the NIC_CMA RX transfer. |
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40 | // Other "load" tasks are waiting on the load_sync synchronisation variable. |
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41 | // Task "store" in cluster[0][0] initialises the barrier between all "store" tasks, |
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42 | // allocates NIC & CMA TX channels, and starts the NIC_CMA TX transfer. |
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43 | // Other "store" tasks are waiting on the store_sync synchronisation variable. |
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44 | // 3) When this global initialisation is completed, the "load" task in all clusters |
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45 | // allocates the working containers and the MWMR fifos descriptors from the |
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46 | // user local heap. In each cluster, the "analyse" and "store" tasks are waiting |
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47 | // the local initialisation completion on the local_sync[x][y] variables. |
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48 | // |
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49 | // When initialisation is completed, all tasks loop on containers: |
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50 | // 1) The "load" task get an empty working container from the fifo_s2l, |
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51 | // transfer one container from the kernel rx_chbuf to this user container, |
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52 | // and transfer ownership of this container to one "analysis" task by writing |
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53 | // into the fifo_l2a. |
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54 | // 2) The "analyse" task get one working container from the fifo_l2a, analyse |
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55 | // each packet header, compute the packet type (depending on the SRC MAC address), |
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56 | // increment the correspondint classification counter, and transpose the SRC |
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57 | // and the DST MAC addresses fot TX tranmission. |
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58 | // 3) The "store" task transfer get a full working container from the fifo_a2s, |
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59 | // transfer this user container content to the the kernel tx_chbuf, |
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60 | // and transfer ownership of this empty container to the "load" task by writing |
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61 | // into the fifo_s2l. |
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62 | // |
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63 | // Instrumentation results display is done by the "store" task in cluster[0][0] |
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64 | // when all "store" tasks completed the number of clusters specified by the |
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65 | // CONTAINERS_MAX parameter. |
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66 | /////////////////////////////////////////////////////////////////////////////////////// |
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67 | |
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68 | #include "stdio.h" |
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69 | #include "user_barrier.h" |
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70 | #include "malloc.h" |
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71 | #include "user_lock.h" |
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72 | #include "mwmr_channel.h" |
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73 | |
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74 | #define X_SIZE_MAX 16 |
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75 | #define Y_SIZE_MAX 16 |
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76 | #define NPROCS_MAX 8 |
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77 | #define CONTAINERS_MAX 50 |
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78 | #define VERBOSE_ANALYSE 0 |
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79 | |
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80 | /////////////////////////////////////////////////////////////////////////////////////// |
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81 | // Global variables |
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82 | // The MWMR channels (descriptors and buffers), as well as the working containers |
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83 | // used by the "analysis" tasks are distributed in clusters. |
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84 | // But the pointers on these distributed structures are stored in cluster[0][0]. |
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85 | /////////////////////////////////////////////////////////////////////////////////////// |
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86 | |
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87 | // pointers on distributed containers |
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88 | unsigned int* container[X_SIZE_MAX][Y_SIZE_MAX][NPROCS_MAX-2]; |
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89 | |
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90 | // pointers on distributed mwmr fifos containing : temp[x][y][l] container descriptors |
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91 | mwmr_channel_t* mwmr_l2a[X_SIZE_MAX][Y_SIZE_MAX]; |
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92 | mwmr_channel_t* mwmr_a2s[X_SIZE_MAX][Y_SIZE_MAX]; |
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93 | mwmr_channel_t* mwmr_s2l[X_SIZE_MAX][Y_SIZE_MAX]; |
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94 | |
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95 | // local synchros signaling local MWMR fifos initialisation completion |
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96 | volatile unsigned int local_sync[X_SIZE_MAX][Y_SIZE_MAX]; |
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97 | |
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98 | // global synchro signaling global initialisation completion |
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99 | volatile unsigned int global_sync = 0; |
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100 | volatile unsigned int load_sync = 0; |
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101 | volatile unsigned int store_sync = 0; |
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102 | |
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103 | // instrumentation counters |
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104 | unsigned int counter[16]; |
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105 | |
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106 | // distributed barrier between "load" tasks |
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107 | giet_sqt_barrier_t rx_barrier; |
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108 | |
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109 | // distributed barrier between "store" tasks |
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110 | giet_sqt_barrier_t tx_barrier; |
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111 | |
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112 | // NIC_RX and NIC_TX channel index |
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113 | unsigned int nic_rx_channel; |
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114 | unsigned int nic_tx_channel; |
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115 | |
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116 | ///////////////////////////////////////// |
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117 | __attribute__ ((constructor)) void load() |
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118 | ///////////////////////////////////////// |
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119 | { |
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120 | // each "load" task get platform parameters |
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121 | unsigned int x_size; // number of clusters in a row |
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122 | unsigned int y_size; // number of clusters in a column |
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123 | unsigned int nprocs; // number of processors per cluster |
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124 | giet_procs_number( &x_size, &y_size, &nprocs ); |
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125 | |
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126 | giet_assert( (x_size <= X_SIZE_MAX) && |
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127 | (y_size <= Y_SIZE_MAX) && |
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128 | (nprocs <= NPROCS_MAX) , |
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129 | "[CLASSIF ERROR] illegal platform parameters" ); |
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130 | |
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131 | // each "load" task get processor identifiers |
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132 | unsigned int x; |
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133 | unsigned int y; |
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134 | unsigned int l; |
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135 | giet_proc_xyp( &x, &y, &l ); |
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136 | |
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137 | // "load" task[0][0] |
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138 | // - initialises the heap in every cluster |
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139 | // - initialises barrier between all load tasks, |
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140 | // - allocates the NIC & CMA RX channels, and start the NIC_CMA RX transfer. |
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141 | // Other "load" tasks wait completion |
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142 | if ( (x==0) && (y==0) ) |
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143 | { |
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144 | giet_tty_alloc(); |
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145 | |
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146 | giet_tty_printf("\n*** Task load on P[%d][%d][%d] starts at cycle %d\n" |
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147 | " x_size = %d / y_size = %d / nprocs = %d\n", |
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148 | x , y , l , giet_proctime() , x_size, y_size, nprocs ); |
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149 | |
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150 | unsigned int xid; // x cluster coordinate index |
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151 | unsigned int yid; // y cluster coordinate index |
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152 | |
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153 | for ( xid = 0 ; xid < x_size ; xid++ ) |
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154 | { |
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155 | for ( yid = 0 ; yid < y_size ; yid++ ) |
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156 | { |
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157 | heap_init( xid, yid ); |
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158 | } |
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159 | } |
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160 | |
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161 | global_sync = 1; |
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162 | |
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163 | sqt_barrier_init( &rx_barrier, x_size , y_size , 1 ); |
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164 | nic_rx_channel = giet_nic_rx_alloc( x_size , y_size ); |
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165 | giet_nic_rx_start( nic_rx_channel ); |
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166 | load_sync = 1; |
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167 | } |
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168 | else |
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169 | { |
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170 | while ( load_sync == 0 ) asm volatile ("nop"); |
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171 | } |
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172 | |
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173 | // each load tasks allocates containers[x][y][n] (from local heap) |
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174 | // and register pointers in the local stack |
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175 | unsigned int n; |
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176 | unsigned int* cont[NPROCS_MAX-2]; |
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177 | unsigned int analysis_tasks = nprocs-2; |
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178 | |
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179 | for ( n = 0 ; n < analysis_tasks ; n++ ) |
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180 | { |
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181 | container[x][y][n] = malloc( 4096 ); |
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182 | cont[n] = container[x][y][n]; |
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183 | } |
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184 | |
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185 | // each load task allocates data buffers for mwmr fifos (from local heap) |
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186 | unsigned int* data_l2a = malloc( analysis_tasks<<2 ); |
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187 | unsigned int* data_a2s = malloc( analysis_tasks<<2 ); |
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188 | unsigned int* data_s2l = malloc( analysis_tasks<<2 ); |
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189 | |
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190 | // each load task allocates mwmr fifos descriptors (from local heap) |
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191 | mwmr_l2a[x][y] = malloc( sizeof(mwmr_channel_t) ); |
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192 | mwmr_a2s[x][y] = malloc( sizeof(mwmr_channel_t) ); |
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193 | mwmr_s2l[x][y] = malloc( sizeof(mwmr_channel_t) ); |
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194 | |
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195 | // each load task registers local pointers on mwmr fifos in local stack |
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196 | mwmr_channel_t* fifo_l2a = mwmr_l2a[x][y]; |
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197 | mwmr_channel_t* fifo_a2s = mwmr_a2s[x][y]; |
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198 | mwmr_channel_t* fifo_s2l = mwmr_s2l[x][y]; |
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199 | |
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200 | // each load task initialises local mwmr fifos descriptors |
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201 | // ( width = 4 bytes / depth = number of analysis tasks ) |
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202 | mwmr_init( fifo_l2a , data_l2a , 1 , analysis_tasks ); |
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203 | mwmr_init( fifo_a2s , data_a2s , 1 , analysis_tasks ); |
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204 | mwmr_init( fifo_s2l , data_s2l , 1 , analysis_tasks ); |
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205 | |
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206 | |
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207 | // each load task initialises local containers as empty in fifo_s2l |
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208 | for ( n = 0 ; n < analysis_tasks ; n++ ) mwmr_write( fifo_s2l , &n , 1 ); |
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209 | |
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210 | // each load task[x][y] signals mwmr fifos initialisation completion |
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211 | // to other tasks in same cluster[x][y] |
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212 | local_sync[x][y] = 1; |
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213 | |
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214 | // load task[0][0] displays status |
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215 | if ( (x==0) && (y==0) ) |
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216 | giet_tty_printf("\n*** Task load on P[%d,%d,%d] enters main loop at cycle %d\n" |
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217 | " nic_rx_channel = %d / nic_tx_channel = %d\n" |
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218 | " &mwmr_l2a = %x / &data_l2a = %x\n" |
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219 | " &mwmr_a2s = %x / &data_a2s = %x\n" |
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220 | " &mwmr_s2l = %x / &data_s2l = %x\n" |
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221 | " &cont[0] = %x\n" |
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222 | " x_size = %d / y_size = %d / nprocs = %d\n", |
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223 | x , y , l , giet_proctime(), |
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224 | nic_rx_channel , nic_tx_channel, |
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225 | (unsigned int)fifo_l2a, (unsigned int)data_l2a, |
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226 | (unsigned int)fifo_a2s, (unsigned int)data_a2s, |
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227 | (unsigned int)fifo_s2l, (unsigned int)data_s2l, |
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228 | (unsigned int)cont[0], |
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229 | x_size, y_size, nprocs ); |
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230 | |
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231 | ///////////////////////////////////////////////////////////// |
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232 | // All load tasks enter the main loop (on containers) |
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233 | unsigned int count = 0; // loaded containers count |
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234 | unsigned int index; // available container index |
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235 | unsigned int* temp; // pointer on available container |
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236 | |
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237 | while ( count < CONTAINERS_MAX ) |
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238 | { |
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239 | // get one empty container index from fifo_s2l |
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240 | mwmr_read( fifo_s2l , &index , 1 ); |
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241 | temp = cont[index]; |
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242 | |
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243 | // get one container from kernel rx_chbuf |
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244 | giet_nic_rx_move( nic_rx_channel, temp ); |
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245 | |
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246 | // get packets number |
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247 | unsigned int npackets = temp[0] & 0x0000FFFF; |
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248 | unsigned int nwords = temp[0] >> 16; |
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249 | |
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250 | if ( (x==0) && (y==0) ) |
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251 | giet_tty_printf("\n*** Task load on P[%d,%d,%d] get container %d at cycle %d" |
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252 | " : %d packets / %d words\n", |
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253 | x, y, l, count, giet_proctime(), npackets, nwords ); |
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254 | |
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255 | // put the full container index to fifo_l2a |
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256 | mwmr_write( fifo_l2a, &index , 1 ); |
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257 | |
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258 | count++; |
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259 | } |
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260 | |
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261 | // all "load" tasks synchronise before stats |
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262 | sqt_barrier_wait( &rx_barrier ); |
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263 | |
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264 | // "load" task[0][0] stops the NIC_CMA RX transfer and displays stats |
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265 | if ( (x==0) && (y==0) ) |
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266 | { |
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267 | giet_nic_rx_stop( nic_rx_channel ); |
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268 | giet_nic_rx_stats( nic_rx_channel ); |
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269 | } |
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270 | |
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271 | // all "load" task exit |
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272 | giet_exit("Task completed"); |
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273 | |
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274 | } // end load() |
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275 | |
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276 | |
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277 | ////////////////////////////////////////// |
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278 | __attribute__ ((constructor)) void store() |
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279 | ////////////////////////////////////////// |
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280 | { |
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281 | // each "load" task get platform parameters |
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282 | unsigned int x_size; // number of clusters in row |
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283 | unsigned int y_size; // number of clusters in a column |
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284 | unsigned int nprocs; // number of processors per cluster |
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285 | giet_procs_number( &x_size, &y_size, &nprocs ); |
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286 | |
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287 | // get processor identifiers |
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288 | unsigned int x; |
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289 | unsigned int y; |
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290 | unsigned int l; |
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291 | giet_proc_xyp( &x, &y, &l ); |
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292 | |
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293 | // "Store" tasks wait completion of heaps initialization |
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294 | while ( global_sync == 0 ) asm volatile ("nop"); |
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295 | |
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296 | // "store" task[0][0] initialises the barrier between all "store" tasks, |
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297 | // allocates NIC & CMA TX channels, and starts the NIC_CMA TX transfer. |
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298 | // Other "store" tasks wait completion. |
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299 | if ( (x==0) && (y==0) ) |
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300 | { |
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301 | giet_tty_alloc(); |
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302 | |
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303 | giet_tty_printf("\n*** Task store on P[%d][%d][%d] starts at cycle %d\n" |
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304 | " x_size = %d / y_size = %d / nprocs = %d\n", |
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305 | x , y , l , giet_proctime() , x_size, y_size, nprocs ); |
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306 | |
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307 | sqt_barrier_init( &tx_barrier , x_size , y_size , 1 ); |
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308 | nic_tx_channel = giet_nic_tx_alloc( x_size , y_size ); |
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309 | giet_nic_tx_start( nic_tx_channel ); |
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310 | store_sync = 1; |
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311 | } |
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312 | else |
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313 | { |
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314 | while ( store_sync == 0 ) asm volatile ("nop"); |
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315 | } |
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316 | |
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317 | // all "store" tasks wait mwmr channels initialisation |
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318 | while ( local_sync[x][y] == 0 ) asm volatile ("nop"); |
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319 | |
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320 | // each "store" tasks register pointers on working containers in local stack |
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321 | unsigned int n; |
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322 | unsigned int analysis_tasks = nprocs-2; |
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323 | unsigned int* cont[NPROCS_MAX-2]; |
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324 | |
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325 | for ( n = 0 ; n < analysis_tasks ; n++ ) |
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326 | { |
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327 | cont[n] = container[x][y][n]; |
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328 | } |
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329 | |
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330 | // all "store" tasks register pointers on mwmr fifos in local stack |
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331 | mwmr_channel_t* fifo_l2a = mwmr_l2a[x][y]; |
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332 | mwmr_channel_t* fifo_a2s = mwmr_a2s[x][y]; |
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333 | mwmr_channel_t* fifo_s2l = mwmr_s2l[x][y]; |
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334 | |
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335 | // "store" task[0][0] displays status |
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336 | if ( (x==0) && (y==0) ) |
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337 | giet_tty_printf("\n*** Task store on P[%d,%d,%d] enters main loop at cycle %d\n" |
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338 | " &mwmr_l2a = %x\n" |
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339 | " &mwmr_a2s = %x\n" |
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340 | " &mwmr_s2l = %x\n" |
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341 | " &cont[0] = %x\n", |
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342 | x , y , l , giet_proctime(), |
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343 | (unsigned int)fifo_l2a, |
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344 | (unsigned int)fifo_a2s, |
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345 | (unsigned int)fifo_s2l, |
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346 | (unsigned int)cont[0] ); |
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347 | |
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348 | |
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349 | ///////////////////////////////////////////////////////////// |
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350 | // all "store" tasks enter the main loop (on containers) |
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351 | unsigned int count = 0; // stored containers count |
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352 | unsigned int index; // empty container index |
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353 | unsigned int* temp; // pointer on empty container |
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354 | |
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355 | while ( count < CONTAINERS_MAX ) |
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356 | { |
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357 | // get one working container index from fifo_a2s |
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358 | mwmr_read( fifo_a2s , &index , 1 ); |
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359 | temp = cont[index]; |
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360 | |
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361 | // put one container to kernel tx_chbuf |
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362 | giet_nic_tx_move( nic_tx_channel, temp ); |
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363 | |
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364 | // get packets number |
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365 | unsigned int npackets = temp[0] & 0x0000FFFF; |
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366 | unsigned int nwords = temp[0] >> 16; |
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367 | |
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368 | if ( (x==0) && (y==0) ) |
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369 | giet_tty_printf("\n*** Task store on P[%d,%d,%d] get container %d at cycle %d" |
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370 | " : %d packets / %d words\n", |
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371 | x, y, l, count, giet_proctime(), npackets, nwords ); |
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372 | |
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373 | // put the working container index to fifo_s2l |
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374 | mwmr_write( fifo_s2l, &index , 1 ); |
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375 | |
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376 | count++; |
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377 | } |
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378 | |
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379 | // all "store" tasks synchronise before result display |
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380 | sqt_barrier_wait( &tx_barrier ); |
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381 | |
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382 | // "store" task[0,0] stops NIC_CMA TX transfer and displays results |
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383 | if ( (x==0) && (y==0) ) |
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384 | { |
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385 | giet_nic_tx_stop( nic_tx_channel ); |
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386 | |
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387 | giet_tty_printf("\n@@@@ Classification Results @@@\n" |
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388 | " - TYPE 0 : %d packets\n" |
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389 | " - TYPE 1 : %d packets\n" |
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390 | " - TYPE 2 : %d packets\n" |
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391 | " - TYPE 3 : %d packets\n" |
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392 | " - TYPE 4 : %d packets\n" |
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393 | " - TYPE 5 : %d packets\n" |
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394 | " - TYPE 6 : %d packets\n" |
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395 | " - TYPE 7 : %d packets\n" |
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396 | " - TYPE 8 : %d packets\n" |
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397 | " - TYPE 9 : %d packets\n" |
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398 | " - TYPE A : %d packets\n" |
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399 | " - TYPE B : %d packets\n" |
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400 | " - TYPE C : %d packets\n" |
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401 | " - TYPE D : %d packets\n" |
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402 | " - TYPE E : %d packets\n" |
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403 | " - TYPE F : %d packets\n" |
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404 | " TOTAL = %d packets\n", |
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405 | counter[0x0], counter[0x1], counter[0x2], counter[0x3], |
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406 | counter[0x4], counter[0x5], counter[0x6], counter[0x7], |
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407 | counter[0x8], counter[0x9], counter[0xA], counter[0xB], |
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408 | counter[0xC], counter[0xD], counter[0xE], counter[0xF], |
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409 | counter[0x0]+ counter[0x1]+ counter[0x2]+ counter[0x3]+ |
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410 | counter[0x4]+ counter[0x5]+ counter[0x6]+ counter[0x7]+ |
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411 | counter[0x8]+ counter[0x9]+ counter[0xA]+ counter[0xB]+ |
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412 | counter[0xC]+ counter[0xD]+ counter[0xE]+ counter[0xF] ); |
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413 | |
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414 | giet_nic_tx_stats( nic_tx_channel ); |
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415 | } |
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416 | |
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417 | // all "store" task exit |
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418 | giet_exit("Task completed"); |
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419 | |
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420 | } // end store() |
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421 | |
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422 | |
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423 | //////////////////////////////////////////// |
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424 | __attribute__ ((constructor)) void analyse() |
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425 | //////////////////////////////////////////// |
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426 | { |
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427 | // each "load" task get platform parameters |
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428 | unsigned int x_size; // number of clusters in row |
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429 | unsigned int y_size; // number of clusters in a column |
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430 | unsigned int nprocs; // number of processors per cluster |
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431 | giet_procs_number( &x_size, &y_size, &nprocs ); |
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432 | |
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433 | // get processor identifiers |
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434 | unsigned int x; |
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435 | unsigned int y; |
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436 | unsigned int l; |
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437 | giet_proc_xyp( &x, &y, &l ); |
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438 | |
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439 | if ( (x==0) && (y==0) ) |
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440 | { |
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441 | giet_tty_alloc(); |
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442 | |
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443 | giet_tty_printf("\n*** Task analyse on P[%d][%d][%d] starts at cycle %d\n" |
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444 | " x_size = %d / y_size = %d / nprocs = %d\n", |
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445 | x , y , l , giet_proctime() , x_size, y_size, nprocs ); |
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446 | } |
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447 | |
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448 | // all "analyse" tasks wait heaps and mwmr channels initialisation |
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449 | while ( local_sync[x][y] == 0 ) asm volatile ("nop"); |
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450 | |
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451 | // all "analyse" tasks register pointers on working containers in local stack |
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452 | unsigned int n; |
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453 | unsigned int analysis_tasks = nprocs-2; |
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454 | unsigned int* cont[NPROCS_MAX-2]; |
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455 | for ( n = 0 ; n < analysis_tasks ; n++ ) |
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456 | { |
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457 | cont[n] = container[x][y][n]; |
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458 | } |
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459 | |
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460 | // all "analyse" tasks register pointers on mwmr fifos in local stack |
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461 | mwmr_channel_t* fifo_l2a = mwmr_l2a[x][y]; |
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462 | mwmr_channel_t* fifo_a2s = mwmr_a2s[x][y]; |
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463 | |
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464 | // "analyse" task[0][0] display status |
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465 | if ( (x==0) && (y==0) ) |
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466 | giet_tty_printf("\n*** Task analyse on P[%d,%d,%d] enters main loop at cycle %d\n" |
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467 | " &mwmr_l2a = %x\n" |
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468 | " &mwmr_a2s = %x\n" |
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469 | " &cont[0] = %x\n", |
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470 | x, y, l, giet_proctime(), |
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471 | (unsigned int)fifo_l2a, |
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472 | (unsigned int)fifo_a2s, |
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473 | (unsigned int)cont[0] ); |
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474 | |
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475 | ///////////////////////////////////////////////////////////// |
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476 | // all "analyse" tasks enter the main loop (on containers) |
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477 | unsigned int index; // available container index |
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478 | unsigned int* temp; // pointer on available container |
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479 | unsigned int nwords; // number of words in container |
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480 | unsigned int npackets; // number of packets in container |
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481 | unsigned int length; // number of bytes in current packet |
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482 | unsigned int first; // current packet first word in container |
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483 | unsigned int type; // current packet type |
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484 | unsigned int p; // current packet index |
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485 | |
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486 | #if VERBOSE_ANALYSE |
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487 | unsigned int verbose_len[10]; // save length for all packets in one container |
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488 | unsigned long long verbose_dst[10]; // save length for all packets in one container |
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489 | unsigned long long verbose_src[10]; // save length for all packets in one container |
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490 | #endif |
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491 | |
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492 | while ( 1 ) |
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493 | { |
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494 | |
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495 | #if VERBOSE_ANALYSE |
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496 | for( p = 0 ; p < 10 ; p++ ) |
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497 | { |
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498 | verbose_len[p] = 0; |
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499 | verbose_dst[p] = 0; |
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500 | verbose_src[p] = 0; |
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501 | } |
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502 | #endif |
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503 | // get one working container index from fifo_l2a |
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504 | mwmr_read( fifo_l2a , &index , 1 ); |
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505 | temp = cont[index]; |
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506 | |
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507 | // get packets number and words number |
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508 | npackets = temp[0] & 0x0000FFFF; |
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509 | nwords = temp[0] >> 16; |
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510 | |
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511 | if ( (x==0) && (y==0) ) |
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512 | giet_tty_printf("\n*** Task analyse on P[%d,%d,%d] get container at cycle %d" |
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513 | " : %d packets / %d words\n", |
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514 | x, y, l, giet_proctime(), npackets, nwords ); |
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515 | |
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516 | // initialize word index in container |
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517 | first = 34; |
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518 | |
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519 | // loop on packets |
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520 | for( p = 0 ; p < npackets ; p++ ) |
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521 | { |
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522 | // get packet length from container header |
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523 | if ( (p & 0x1) == 0 ) length = temp[1+(p>>1)] >> 16; |
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524 | else length = temp[1+(p>>1)] & 0x0000FFFF; |
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525 | |
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526 | // compute packet DST and SRC MAC addresses |
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527 | unsigned int word0 = temp[first]; |
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528 | unsigned int word1 = temp[first + 1]; |
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529 | unsigned int word2 = temp[first + 2]; |
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530 | |
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531 | #if VERBOSE_ANALYSE |
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532 | unsigned long long dst = ((unsigned long long)(word1 & 0xFFFF0000)>>16) | |
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533 | (((unsigned long long)word0)<<16); |
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534 | unsigned long long src = ((unsigned long long)(word1 & 0x0000FFFF)<<32) | |
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535 | ((unsigned long long)word2); |
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536 | if ( p < 10 ) |
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537 | { |
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538 | verbose_len[p] = length; |
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539 | verbose_dst[p] = dst; |
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540 | verbose_src[p] = src; |
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541 | } |
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542 | #endif |
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543 | // compute type from SRC MAC address and increment counter |
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544 | type = word1 & 0x0000000F; |
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545 | atomic_increment( &counter[type], 1 ); |
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546 | |
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547 | // exchange SRC & DST MAC addresses for TX |
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548 | temp[first] = ((word1 & 0x0000FFFF)<<16) | ((word2 & 0xFFFF0000)>>16); |
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549 | temp[first + 1] = ((word2 & 0x0000FFFF)<<16) | ((word0 & 0xFFFF0000)>>16); |
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550 | temp[first + 2] = ((word0 & 0x0000FFFF)<<16) | ((word1 & 0xFFFF0000)>>16); |
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551 | |
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552 | // update first word index |
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553 | if ( length & 0x3 ) first += (length>>2)+1; |
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554 | else first += (length>>2); |
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555 | } |
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556 | |
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557 | #if VERBOSE_ANALYSE |
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558 | if ( (x==0) && (y==0) ) |
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559 | giet_tty_printf("\n*** Task analyse on P[%d,%d,%d] completes at cycle %d\n" |
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560 | " - Packet 0 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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561 | " - Packet 1 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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562 | " - Packet 2 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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563 | " - Packet 3 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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564 | " - Packet 4 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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565 | " - Packet 5 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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566 | " - Packet 6 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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567 | " - Packet 7 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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568 | " - Packet 8 : plen = %d / dst_mac = %l / src_mac = %l\n" |
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569 | " - Packet 9 : plen = %d / dst_mac = %l / src_mac = %l\n", |
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570 | x , y , l , giet_proctime() , |
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571 | verbose_len[0] , verbose_dst[0] , verbose_src[0] , |
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572 | verbose_len[1] , verbose_dst[1] , verbose_src[1] , |
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573 | verbose_len[2] , verbose_dst[2] , verbose_src[2] , |
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574 | verbose_len[3] , verbose_dst[3] , verbose_src[3] , |
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575 | verbose_len[4] , verbose_dst[4] , verbose_src[4] , |
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576 | verbose_len[5] , verbose_dst[5] , verbose_src[5] , |
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577 | verbose_len[6] , verbose_dst[6] , verbose_src[6] , |
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578 | verbose_len[7] , verbose_dst[7] , verbose_src[7] , |
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579 | verbose_len[8] , verbose_dst[8] , verbose_src[8] , |
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580 | verbose_len[9] , verbose_dst[9] , verbose_src[9] ); |
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581 | #endif |
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582 | |
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583 | // pseudo-random delay |
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584 | unsigned int delay = giet_rand()>>3; |
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585 | for( p = 0 ; p < delay ; p++ ) asm volatile ("nop"); |
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586 | |
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587 | // put the working container index to fifo_a2s |
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588 | mwmr_write( fifo_a2s , &index , 1 ); |
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589 | } |
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590 | } // end analyse() |
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591 | |
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