source: soft/giet_vm/applications/pgcd/pgcd.ld @ 741

Last change on this file since 741 was 258, checked in by alain, 11 years ago

This is a major release, including a deep restructuration of code.
The main evolutions are

  • use of the Tsar preloader to load the GIET boot-loader from disk
  • introduction of a FAT32 file system library,
  • use of this fat32 library by the boot-loader to load the map.bin data structure, and the various .elf files
  • reorganisation of drivers (one file per peripheral).
  • introduction of drivers for new peripherals: vci_chbuf_dma and vci_multi_ahci.
  • introduction of a new physical memory allocator in the boot code.

This release has been tested on the tsar_generic_iob architecture,
for the two following mappings: 4c_1p_iob_four.xml and 4c_1p_iob_sort.xml
File size: 934 bytes
Line 
1/****************************************************************************
2* Definition of the base address for all virtual segments
3*****************************************************************************/
4
5seg_code_base      = 0x00400000;
6seg_data_base      = 0x00500000;       
7
8/***************************************************************************
9* Grouping sections into segments for code and data
10***************************************************************************/
11
12SECTIONS
13{
14    . = seg_code_base;
15    seg_code :
16    {
17        *(.text)
18    }
19    . = seg_data_base;
20    seg_data :
21    {
22        *(.ctors)
23        *(.rodata)
24        /* . = ALIGN(4); */
25        *(.rodata.*)
26        /* . = ALIGN(4); */
27        *(.data)
28        /* . = ALIGN(4); */
29        *(.lit8)
30        *(.lit4)
31        *(.sdata)
32        /* . = ALIGN(4); */
33        *(.bss)
34        *(COMMON)
35        *(.sbss)
36        *(.scommon)
37    }
38}
39
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