1 | ////////////////////////////////////////////////////////////////////////////////// |
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2 | // File : boot_init.c |
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3 | // Date : 01/04/2012 |
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4 | // Author : alain greiner |
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5 | // Copyright (c) UPMC-LIP6 |
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6 | /////////////////////////////////////////////////////////////////////////////////// |
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7 | // The boot_init.c file is part of the GIET-VM nano-kernel. |
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8 | // This code is executed in the boot phase by proc[0] to initialize the |
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9 | // peripherals and the kernel data structures: |
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10 | // - pages tables for the various vspaces |
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11 | // - shedulers for processors (including the tasks contexts and interrupt vectors) |
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12 | // |
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13 | // This nano-kernel has been written for the MIPS32 processor. |
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14 | // The virtual adresses are on 32 bits and use the (unsigned int) type, but the |
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15 | // physicals addresses can have up to 40 bits, and use the (unsigned long long) type. |
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16 | // |
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17 | // The GIET-VM uses the paged virtual memory and the MAPPING_INFO binary file |
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18 | // to provides two services: |
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19 | // 1) classical memory protection, when several independant applications compiled |
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20 | // in different virtual spaces are executing on the same hardware platform. |
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21 | // 2) data placement in NUMA architectures, when we want to control the placement |
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22 | // of the software objects (virtual segments) on the physical memory banks. |
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23 | // |
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24 | // The MAPPING_INFO binary data structure must be loaded in the the seg_boot_mapping |
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25 | // segment (at address seg_mapping_base). |
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26 | // This MAPPING_INFO data structure defines |
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27 | // - the hardware architecture: number of clusters, number or processors, |
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28 | // size of the memory segments, and peripherals in each cluster. |
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29 | // - The structure of the various multi-threaded software applications: |
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30 | // number of tasks, communication channels. |
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31 | // - The mapping: placement of virtual objects (vobj) in the virtual segments (vseg), |
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32 | // placement of virtual segments (vseg) in the physical segments (pseg), placement |
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33 | // of software tasks on the processors, |
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34 | // |
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35 | // The page table are statically build in the boot phase, and they do not |
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36 | // change during execution. The GIET uses only 4 Kbytes pages. |
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37 | // As most applications use only a limited number of segments, the number of PT2s |
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38 | // actually used by a given virtual space is generally smaller than 2048, and is |
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39 | // computed during the boot phase. |
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40 | // The max number of virtual spaces (GIET_NB_VSPACE_MAX) is a configuration parameter. |
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41 | // |
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42 | // Each page table (one page table per virtual space) is monolithic, and contains |
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43 | // one PT1 and up to (GIET_NB_PT2_MAX) PT2s. The PT1 is addressed using the ix1 field |
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44 | // (11 bits) of the VPN, and the selected PT2 is addressed using the ix2 field (9 bits). |
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45 | // - PT1[2048] : a first 8K aligned array of unsigned int, indexed by (ix1) field of VPN. |
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46 | // Each entry in the PT1 contains a 32 bits PTD. The MSB bit PTD[31] is |
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47 | // the PTD valid bit, and LSB bits PTD[19:0] are the 20 MSB bits of the physical base |
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48 | // address of the selected PT2. |
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49 | // The PT1 contains 2048 PTD of 4 bytes => 8K bytes. |
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50 | // - PT2[1024][GIET_NB_PT2_MAX] : an array of array of unsigned int. |
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51 | // Each PT2[1024] must be 4K aligned, each entry in a PT2 contains two unsigned int: |
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52 | // the first word contains the protection flags, and the second word contains the PPN. |
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53 | // Each PT2 contains 512 PTE2 of 8bytes => 4K bytes. |
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54 | // The total size of a page table is finally = 8K + (GIET_NB_PT2_MAX)*4K bytes. |
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55 | //////////////////////////////////////////////////////////////////////////////////// |
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56 | |
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57 | #include <common.h> |
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58 | #include <mips32_registers.h> |
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59 | #include <giet_config.h> |
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60 | #include <mapping_info.h> |
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61 | #include <mwmr_channel.h> |
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62 | #include <barrier.h> |
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63 | #include <memspace.h> |
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64 | #include <irq_handler.h> |
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65 | #include <ctx_handler.h> |
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66 | #include <vm_handler.h> |
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67 | #include <hwr_mapping.h> |
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68 | |
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69 | #include <stdarg.h> |
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70 | |
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71 | #if !defined(NB_CLUSTERS) |
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72 | # error The NB_CLUSTERS value must be defined in the 'giet_config.h' file ! |
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73 | #endif |
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74 | |
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75 | #if !defined(NB_PROCS_MAX) |
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76 | # error The NB_PROCS_MAX value must be defined in the 'giet_config.h' file ! |
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77 | #endif |
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78 | |
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79 | #if !defined(GIET_NB_VSPACE_MAX) |
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80 | # error The GIET_NB_VSPACE_MAX value must be defined in the 'giet_config.h' file ! |
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81 | #endif |
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82 | |
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83 | //////////////////////////////////////////////////////////////////////////// |
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84 | // Global variables for boot code |
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85 | // Both the page tables for the various virtual spaces, and the schedulers |
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86 | // for the processors are physically distributed on the clusters. |
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87 | // These global variables are just arrays of pointers. |
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88 | //////////////////////////////////////////////////////////////////////////// |
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89 | |
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90 | // Page table addresses arrays |
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91 | __attribute__((section (".wdata"))) |
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92 | paddr_t boot_ptabs_paddr[GIET_NB_VSPACE_MAX]; |
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93 | |
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94 | __attribute__((section (".wdata"))) |
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95 | unsigned int boot_ptabs_vaddr[GIET_NB_VSPACE_MAX]; |
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96 | |
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97 | // Scheduler pointers array (virtual addresses) |
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98 | __attribute__((section (".wdata"))) |
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99 | static_scheduler_t* boot_schedulers[NB_CLUSTERS * NB_PROCS_MAX]; |
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100 | |
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101 | // Next free PT2 index array |
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102 | __attribute__((section (".wdata"))) |
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103 | unsigned int boot_next_free_pt2[GIET_NB_VSPACE_MAX] = |
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104 | { [0 ... GIET_NB_VSPACE_MAX - 1] = 0 }; |
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105 | |
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106 | // Max PT2 index |
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107 | __attribute__((section (".wdata"))) |
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108 | unsigned int boot_max_pt2[GIET_NB_VSPACE_MAX] = |
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109 | { [0 ... GIET_NB_VSPACE_MAX - 1] = 0 }; |
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110 | |
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111 | |
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112 | ////////////////////////////////////////////////////////////////////////////// |
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113 | // boot_procid() |
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114 | ////////////////////////////////////////////////////////////////////////////// |
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115 | inline unsigned int boot_procid() |
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116 | { |
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117 | unsigned int ret; |
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118 | asm volatile ("mfc0 %0, $15, 1":"=r" (ret)); |
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119 | return (ret & 0x3FF); |
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120 | } |
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121 | |
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122 | ////////////////////////////////////////////////////////////////////////////// |
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123 | // boot_proctime() |
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124 | ////////////////////////////////////////////////////////////////////////////// |
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125 | inline unsigned int boot_proctime() |
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126 | { |
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127 | unsigned int ret; |
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128 | asm volatile ("mfc0 %0, $9":"=r" (ret)); |
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129 | return ret; |
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130 | } |
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131 | |
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132 | ////////////////////////////////////////////////////////////////////////////// |
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133 | // boot_exit() |
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134 | ////////////////////////////////////////////////////////////////////////////// |
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135 | void boot_exit() |
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136 | { |
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137 | while (1) { asm volatile ("nop"); } |
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138 | } |
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139 | |
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140 | ////////////////////////////////////////////////////////////////////////////// |
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141 | // boot_eret() |
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142 | // The address of this function is used to initialise the return address (RA) |
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143 | // in all task contexts (when the task has never been executed. |
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144 | /////////////////////////////////"///////////////////////////////////////////// |
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145 | void boot_eret() |
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146 | { |
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147 | asm volatile ("eret"); |
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148 | } |
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149 | |
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150 | //////////////////////////////////////////////////////////////////////////// |
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151 | // boot_physical_read() |
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152 | // This function makes a physical read access to a 32 bits word in memory, |
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153 | // after a temporary DTLB de-activation and paddr extension. |
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154 | //////////////////////////////////////////////////////////////////////////// |
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155 | unsigned int boot_physical_read(paddr_t paddr) |
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156 | { |
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157 | unsigned int value; |
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158 | unsigned int lsb = (unsigned int)paddr; |
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159 | unsigned int msb = (unsigned int)(paddr >> 32); |
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160 | |
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161 | asm volatile( |
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162 | "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ |
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163 | "andi $3, $2, 0xb \n" |
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164 | "mtc2 $3, $1 \n" /* DTLB off */ |
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165 | |
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166 | "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ |
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167 | "lw %0, 0(%1) \n" /* value <= *paddr */ |
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168 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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169 | |
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170 | "mtc2 $2, $1 \n" /* restore MMU_MODE */ |
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171 | : "=r" (value) |
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172 | : "r" (lsb), "r" (msb) |
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173 | : "$2", "$3"); |
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174 | return value; |
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175 | } |
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176 | |
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177 | //////////////////////////////////////////////////////////////////////////// |
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178 | // boot_physical_write() |
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179 | // This function makes a physical write access to a 32 bits word in memory, |
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180 | // after a temporary DTLB de-activation and paddr extension. |
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181 | //////////////////////////////////////////////////////////////////////////// |
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182 | void boot_physical_write(paddr_t paddr, |
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183 | unsigned int value) |
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184 | { |
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185 | unsigned int lsb = (unsigned int)paddr; |
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186 | unsigned int msb = (unsigned int)(paddr >> 32); |
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187 | |
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188 | asm volatile( |
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189 | "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ |
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190 | "andi $3, $2, 0xb \n" |
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191 | "mtc2 $3, $1 \n" /* DTLB off */ |
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192 | |
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193 | "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ |
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194 | "sw %0, 0(%1) \n" /* *paddr <= value */ |
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195 | "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ |
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196 | |
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197 | "mtc2 $2, $1 \n" /* restore MMU_MODE */ |
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198 | : |
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199 | : "r" (value), "r" (lsb), "r" (msb) |
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200 | : "$2", "$3"); |
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201 | } |
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202 | |
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203 | ////////////////////////////////////////////////////////////////////////////// |
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204 | // boot_set_mmu_ptpr() |
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205 | // This function set a new value for the MMU PTPR register. |
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206 | ////////////////////////////////////////////////////////////////////////////// |
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207 | inline void boot_set_mmu_ptpr(unsigned int val) |
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208 | { |
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209 | asm volatile ("mtc2 %0, $0"::"r" (val)); |
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210 | } |
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211 | |
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212 | ////////////////////////////////////////////////////////////////////////////// |
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213 | // boot_set_mmu_mode() |
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214 | // This function set a new value for the MMU MODE register. |
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215 | ////////////////////////////////////////////////////////////////////////////// |
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216 | inline void boot_set_mmu_mode(unsigned int val) |
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217 | { |
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218 | asm volatile ("mtc2 %0, $1"::"r" (val)); |
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219 | } |
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220 | |
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221 | //////////////////////////////////////////////////////////////////////////// |
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222 | // boot_puts() |
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223 | // display a string on TTY0 |
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224 | //////////////////////////////////////////////////////////////////////////// |
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225 | void boot_puts(const char * buffer) |
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226 | { |
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227 | unsigned int *tty_address = (unsigned int *) &seg_tty_base; |
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228 | unsigned int n; |
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229 | |
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230 | for (n = 0; n < 100; n++) |
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231 | { |
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232 | if (buffer[n] == 0) break; |
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233 | tty_address[TTY_WRITE] = (unsigned int) buffer[n]; |
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234 | } |
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235 | } |
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236 | |
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237 | //////////////////////////////////////////////////////////////////////////// |
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238 | // boot_putx() |
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239 | // display a 32 bits unsigned int as an hexadecimal string on TTY0 |
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240 | //////////////////////////////////////////////////////////////////////////// |
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241 | void boot_putx(unsigned int val) |
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242 | { |
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243 | static const char HexaTab[] = "0123456789ABCDEF"; |
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244 | char buf[11]; |
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245 | unsigned int c; |
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246 | |
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247 | buf[0] = '0'; |
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248 | buf[1] = 'x'; |
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249 | buf[10] = 0; |
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250 | |
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251 | for (c = 0; c < 8; c++) |
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252 | { |
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253 | buf[9 - c] = HexaTab[val & 0xF]; |
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254 | val = val >> 4; |
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255 | } |
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256 | boot_puts(buf); |
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257 | } |
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258 | |
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259 | //////////////////////////////////////////////////////////////////////////// |
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260 | // boot_putl() |
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261 | // display a 64 bits unsigned long as an hexadecimal string on TTY0 |
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262 | //////////////////////////////////////////////////////////////////////////// |
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263 | void boot_putl(paddr_t val) |
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264 | { |
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265 | static const char HexaTab[] = "0123456789ABCDEF"; |
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266 | char buf[19]; |
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267 | unsigned int c; |
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268 | |
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269 | buf[0] = '0'; |
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270 | buf[1] = 'x'; |
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271 | buf[18] = 0; |
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272 | |
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273 | for (c = 0; c < 16; c++) |
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274 | { |
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275 | buf[17 - c] = HexaTab[(unsigned int)val & 0xF]; |
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276 | val = val >> 4; |
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277 | } |
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278 | boot_puts(buf); |
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279 | } |
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280 | |
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281 | //////////////////////////////////////////////////////////////////////////// |
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282 | // boot_putd() |
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283 | // display a 32 bits unsigned int as a decimal string on TTY0 |
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284 | //////////////////////////////////////////////////////////////////////////// |
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285 | void boot_putd(unsigned int val) |
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286 | { |
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287 | static const char DecTab[] = "0123456789"; |
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288 | char buf[11]; |
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289 | unsigned int i; |
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290 | unsigned int first; |
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291 | |
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292 | buf[10] = 0; |
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293 | |
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294 | for (i = 0; i < 10; i++) |
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295 | { |
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296 | if ((val != 0) || (i == 0)) |
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297 | { |
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298 | buf[9 - i] = DecTab[val % 10]; |
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299 | first = 9 - i; |
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300 | } |
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301 | else |
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302 | { |
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303 | break; |
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304 | } |
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305 | val /= 10; |
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306 | } |
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307 | boot_puts(&buf[first]); |
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308 | } |
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309 | |
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310 | ///////////////////////////////////////////////////////////////////////////// |
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311 | // mapping_info data structure access functions |
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312 | ///////////////////////////////////////////////////////////////////////////// |
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313 | inline mapping_cluster_t *boot_get_cluster_base(mapping_header_t * header) |
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314 | { |
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315 | return (mapping_cluster_t *) ((char *) header + MAPPING_HEADER_SIZE); |
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316 | } |
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317 | ///////////////////////////////////////////////////////////////////////////// |
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318 | inline mapping_pseg_t *boot_get_pseg_base(mapping_header_t * header) |
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319 | { |
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320 | return (mapping_pseg_t *) ((char *) header + |
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321 | MAPPING_HEADER_SIZE + |
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322 | MAPPING_CLUSTER_SIZE * header->clusters); |
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323 | } |
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324 | ///////////////////////////////////////////////////////////////////////////// |
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325 | inline mapping_vspace_t *boot_get_vspace_base(mapping_header_t * header) |
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326 | { |
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327 | return (mapping_vspace_t *) ((char *) header + |
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328 | MAPPING_HEADER_SIZE + |
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329 | MAPPING_CLUSTER_SIZE * header->clusters + |
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330 | MAPPING_PSEG_SIZE * header->psegs); |
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331 | } |
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332 | ///////////////////////////////////////////////////////////////////////////// |
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333 | inline mapping_vseg_t *boot_get_vseg_base(mapping_header_t * header) |
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334 | { |
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335 | return (mapping_vseg_t *) ((char *) header + |
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336 | MAPPING_HEADER_SIZE + |
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337 | MAPPING_CLUSTER_SIZE * header->clusters + |
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338 | MAPPING_PSEG_SIZE * header->psegs + |
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339 | MAPPING_VSPACE_SIZE * header->vspaces); |
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340 | } |
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341 | ///////////////////////////////////////////////////////////////////////////// |
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342 | inline mapping_vobj_t *boot_get_vobj_base(mapping_header_t * header) |
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343 | { |
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344 | return (mapping_vobj_t *) ((char *) header + |
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345 | MAPPING_HEADER_SIZE + |
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346 | MAPPING_CLUSTER_SIZE * header->clusters + |
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347 | MAPPING_PSEG_SIZE * header->psegs + |
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348 | MAPPING_VSPACE_SIZE * header->vspaces + |
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349 | MAPPING_VSEG_SIZE * header->vsegs); |
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350 | } |
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351 | ///////////////////////////////////////////////////////////////////////////// |
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352 | inline mapping_task_t *boot_get_task_base(mapping_header_t * header) |
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353 | { |
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354 | return (mapping_task_t *) ((char *) header + |
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355 | MAPPING_HEADER_SIZE + |
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356 | MAPPING_CLUSTER_SIZE * header->clusters + |
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357 | MAPPING_PSEG_SIZE * header->psegs + |
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358 | MAPPING_VSPACE_SIZE * header->vspaces + |
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359 | MAPPING_VSEG_SIZE * header->vsegs + |
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360 | MAPPING_VOBJ_SIZE * header->vobjs); |
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361 | } |
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362 | ///////////////////////////////////////////////////////////////////////////// |
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363 | inline mapping_proc_t *boot_get_proc_base(mapping_header_t * header) |
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364 | { |
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365 | return (mapping_proc_t *) ((char *) header + |
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366 | MAPPING_HEADER_SIZE + |
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367 | MAPPING_CLUSTER_SIZE * header->clusters + |
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368 | MAPPING_PSEG_SIZE * header->psegs + |
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369 | MAPPING_VSPACE_SIZE * header->vspaces + |
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370 | MAPPING_VSEG_SIZE * header->vsegs + |
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371 | MAPPING_VOBJ_SIZE * header->vobjs + |
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372 | MAPPING_TASK_SIZE * header->tasks); |
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373 | } |
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374 | ///////////////////////////////////////////////////////////////////////////// |
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375 | inline mapping_irq_t *boot_get_irq_base(mapping_header_t * header) |
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376 | { |
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377 | return (mapping_irq_t *) ((char *) header + |
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378 | MAPPING_HEADER_SIZE + |
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379 | MAPPING_CLUSTER_SIZE * header->clusters + |
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380 | MAPPING_PSEG_SIZE * header->psegs + |
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381 | MAPPING_VSPACE_SIZE * header->vspaces + |
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382 | MAPPING_VSEG_SIZE * header->vsegs + |
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383 | MAPPING_VOBJ_SIZE * header->vobjs + |
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384 | MAPPING_TASK_SIZE * header->tasks + |
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385 | MAPPING_PROC_SIZE * header->procs); |
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386 | } |
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387 | ///////////////////////////////////////////////////////////////////////////// |
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388 | inline mapping_coproc_t *boot_get_coproc_base(mapping_header_t * header) |
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389 | { |
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390 | return (mapping_coproc_t *) ((char *) header + |
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391 | MAPPING_HEADER_SIZE + |
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392 | MAPPING_CLUSTER_SIZE * header->clusters + |
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393 | MAPPING_PSEG_SIZE * header->psegs + |
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394 | MAPPING_VSPACE_SIZE * header->vspaces + |
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395 | MAPPING_VOBJ_SIZE * header->vobjs + |
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396 | MAPPING_VSEG_SIZE * header->vsegs + |
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397 | MAPPING_TASK_SIZE * header->tasks + |
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398 | MAPPING_PROC_SIZE * header->procs + |
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399 | MAPPING_IRQ_SIZE * header->irqs); |
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400 | } |
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401 | /////////////////////////////////////////////////////////////////////////////////// |
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402 | inline mapping_cp_port_t *boot_get_cp_port_base(mapping_header_t * header) |
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403 | { |
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404 | return (mapping_cp_port_t *) ((char *) header + |
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405 | MAPPING_HEADER_SIZE + |
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406 | MAPPING_CLUSTER_SIZE * header->clusters + |
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407 | MAPPING_PSEG_SIZE * header->psegs + |
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408 | MAPPING_VSPACE_SIZE * header->vspaces + |
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409 | MAPPING_VOBJ_SIZE * header->vobjs + |
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410 | MAPPING_VSEG_SIZE * header->vsegs + |
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411 | MAPPING_TASK_SIZE * header->tasks + |
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412 | MAPPING_PROC_SIZE * header->procs + |
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413 | MAPPING_IRQ_SIZE * header->irqs + |
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414 | MAPPING_COPROC_SIZE * header->coprocs); |
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415 | } |
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416 | /////////////////////////////////////////////////////////////////////////////////// |
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417 | inline mapping_periph_t *boot_get_periph_base(mapping_header_t * header) |
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418 | { |
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419 | return (mapping_periph_t *) ((char *) header + |
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420 | MAPPING_HEADER_SIZE + |
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421 | MAPPING_CLUSTER_SIZE * header->clusters + |
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422 | MAPPING_PSEG_SIZE * header->psegs + |
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423 | MAPPING_VSPACE_SIZE * header->vspaces + |
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424 | MAPPING_VOBJ_SIZE * header->vobjs + |
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425 | MAPPING_VSEG_SIZE * header->vsegs + |
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426 | MAPPING_TASK_SIZE * header->tasks + |
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427 | MAPPING_PROC_SIZE * header->procs + |
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428 | MAPPING_IRQ_SIZE * header->irqs + |
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429 | MAPPING_COPROC_SIZE * header->coprocs + |
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430 | MAPPING_CP_PORT_SIZE * header->cp_ports); |
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431 | } |
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432 | |
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433 | ////////////////////////////////////////////////////////////////////////////// |
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434 | // boot_pseg_get() |
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435 | // This function returns the pointer on a physical segment |
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436 | // identified by the pseg index. |
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437 | ////////////////////////////////////////////////////////////////////////////// |
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438 | mapping_pseg_t *boot_pseg_get(unsigned int seg_id) |
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439 | { |
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440 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
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441 | mapping_pseg_t * pseg = boot_get_pseg_base(header); |
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442 | |
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443 | // checking argument |
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444 | if (seg_id >= header->psegs) |
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445 | { |
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446 | boot_puts("\n[BOOT ERROR] : seg_id argument too large\n"); |
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447 | boot_puts(" in function boot_pseg_get()\n"); |
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448 | boot_exit(); |
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449 | } |
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450 | |
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451 | return &pseg[seg_id]; |
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452 | } |
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453 | |
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454 | ////////////////////////////////////////////////////////////////////////////// |
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455 | // boot_add_pte() |
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456 | // This function registers a new PTE in the page table defined |
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457 | // by the vspace_id argument, and updates both PT1 and PT2. |
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458 | // A new PT2 is used when required. |
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459 | // As the set of PT2s is implemented as a fixed size array (no dynamic |
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460 | // allocation), this function checks a possible overflow of the PT2 array. |
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461 | ////////////////////////////////////////////////////////////////////////////// |
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462 | void boot_add_pte(unsigned int vspace_id, |
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463 | unsigned int vpn, |
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464 | unsigned int flags, |
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465 | unsigned int ppn, |
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466 | unsigned int verbose) |
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467 | { |
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468 | unsigned int ix1; |
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469 | unsigned int ix2; |
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470 | paddr_t pt1_pbase; // PT1 physical base address |
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471 | paddr_t pt2_pbase; // PT2 physical base address |
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472 | paddr_t pte_paddr; // PTE physucal address |
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473 | unsigned int pt2_id; // PT2 index |
---|
474 | unsigned int ptd; // PTD : entry in PT1 |
---|
475 | unsigned int max_pt2; // max number of PT2s for a given vspace |
---|
476 | |
---|
477 | ix1 = vpn >> 9; // 11 bits |
---|
478 | ix2 = vpn & 0x1FF; // 9 bits |
---|
479 | |
---|
480 | // check that the boot_max_pt2[vspace_id] has been set |
---|
481 | max_pt2 = boot_max_pt2[vspace_id]; |
---|
482 | |
---|
483 | if (max_pt2 == 0) |
---|
484 | { |
---|
485 | boot_puts("Undefined page table for vspace "); |
---|
486 | boot_putd(vspace_id); |
---|
487 | boot_puts("\n"); |
---|
488 | boot_exit(); |
---|
489 | } |
---|
490 | |
---|
491 | // get page table physical base address |
---|
492 | pt1_pbase = boot_ptabs_paddr[vspace_id]; |
---|
493 | |
---|
494 | // get ptd in PT1 |
---|
495 | ptd = boot_physical_read( pt1_pbase + 4*ix1 ); |
---|
496 | |
---|
497 | if ((ptd & PTE_V) == 0) // invalid PTD: compute PT2 base address, |
---|
498 | // and set a new PTD in PT1 |
---|
499 | { |
---|
500 | pt2_id = boot_next_free_pt2[vspace_id]; |
---|
501 | if (pt2_id == max_pt2) |
---|
502 | { |
---|
503 | boot_puts("\n[BOOT ERROR] in boot_add_pte() function\n"); |
---|
504 | boot_puts("the length of the ptab vobj is too small\n"); |
---|
505 | boot_exit(); |
---|
506 | } |
---|
507 | else |
---|
508 | { |
---|
509 | pt2_pbase = pt1_pbase + PT1_SIZE + PT2_SIZE * pt2_id; |
---|
510 | ptd = PTE_V | PTE_T | (unsigned int)(pt2_pbase >> 12); |
---|
511 | boot_physical_write( pt1_pbase + 4*ix1 , ptd); |
---|
512 | boot_next_free_pt2[vspace_id] = pt2_id + 1; |
---|
513 | } |
---|
514 | } |
---|
515 | else // valid PTD: compute PT2 base address |
---|
516 | { |
---|
517 | pt2_pbase = ((paddr_t)(ptd & 0x0FFFFFFF)) << 12; |
---|
518 | } |
---|
519 | |
---|
520 | // set PTE in PT2 : flags & PPN in two 32 bits words |
---|
521 | pte_paddr = pt2_pbase + 8*ix2; |
---|
522 | boot_physical_write( pte_paddr , flags); |
---|
523 | boot_physical_write( pte_paddr + 4 , ppn); |
---|
524 | |
---|
525 | if ( verbose ) |
---|
526 | { |
---|
527 | boot_puts(" / pt1_pbase = "); |
---|
528 | boot_putl( pt1_pbase ); |
---|
529 | boot_puts(" / ptd = "); |
---|
530 | boot_putl( ptd ); |
---|
531 | boot_puts(" / pt2_pbase = "); |
---|
532 | boot_putl( pt2_pbase ); |
---|
533 | boot_puts(" / pte_paddr = "); |
---|
534 | boot_putl( pte_paddr ); |
---|
535 | boot_puts(" / ppn = "); |
---|
536 | boot_putx( ppn ); |
---|
537 | boot_puts("/\n"); |
---|
538 | } |
---|
539 | |
---|
540 | } // end boot_add_pte() |
---|
541 | |
---|
542 | |
---|
543 | ///////////////////////////////////////////////////////////////////// |
---|
544 | // This function build the page table for a given vspace. |
---|
545 | // The physical base addresses for all vsegs (global and private) |
---|
546 | // must have been previously computed and stored in the mapping. |
---|
547 | // It initializes the MWMR channels. |
---|
548 | ///////////////////////////////////////////////////////////////////// |
---|
549 | void boot_vspace_pt_build(unsigned int vspace_id) |
---|
550 | { |
---|
551 | unsigned int vseg_id; |
---|
552 | unsigned int npages; |
---|
553 | unsigned int ppn; |
---|
554 | unsigned int vpn; |
---|
555 | unsigned int flags; |
---|
556 | unsigned int page_id; |
---|
557 | unsigned int verbose = 0; // can be used to activate trace in add_pte() |
---|
558 | |
---|
559 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
---|
560 | mapping_vspace_t * vspace = boot_get_vspace_base(header); |
---|
561 | mapping_vseg_t * vseg = boot_get_vseg_base(header); |
---|
562 | |
---|
563 | // private segments |
---|
564 | for (vseg_id = vspace[vspace_id].vseg_offset; |
---|
565 | vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs); |
---|
566 | vseg_id++) |
---|
567 | { |
---|
568 | vpn = vseg[vseg_id].vbase >> 12; |
---|
569 | ppn = (unsigned int)(vseg[vseg_id].pbase >> 12); |
---|
570 | npages = vseg[vseg_id].length >> 12; |
---|
571 | if ((vseg[vseg_id].length & 0xFFF) != 0) npages++; |
---|
572 | |
---|
573 | flags = PTE_V; |
---|
574 | if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; |
---|
575 | if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; |
---|
576 | if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; |
---|
577 | if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; |
---|
578 | |
---|
579 | #if BOOT_DEBUG_PT |
---|
580 | boot_puts(vseg[vseg_id].name); |
---|
581 | boot_puts(" : flags = "); |
---|
582 | boot_putx(flags); |
---|
583 | boot_puts(" / npages = "); |
---|
584 | boot_putd(npages); |
---|
585 | boot_puts(" / pbase = "); |
---|
586 | boot_putl(vseg[vseg_id].pbase); |
---|
587 | boot_puts("\n"); |
---|
588 | #endif |
---|
589 | // loop on 4K pages |
---|
590 | for (page_id = 0; page_id < npages; page_id++) |
---|
591 | { |
---|
592 | boot_add_pte(vspace_id, vpn, flags, ppn, verbose); |
---|
593 | vpn++; |
---|
594 | ppn++; |
---|
595 | } |
---|
596 | } |
---|
597 | |
---|
598 | // global segments |
---|
599 | for (vseg_id = 0; vseg_id < header->globals; vseg_id++) |
---|
600 | { |
---|
601 | vpn = vseg[vseg_id].vbase >> 12; |
---|
602 | ppn = (unsigned int)(vseg[vseg_id].pbase >> 12); |
---|
603 | npages = vseg[vseg_id].length >> 12; |
---|
604 | if ((vseg[vseg_id].length & 0xFFF) != 0) npages++; |
---|
605 | |
---|
606 | flags = PTE_V; |
---|
607 | if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; |
---|
608 | if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; |
---|
609 | if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; |
---|
610 | if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; |
---|
611 | |
---|
612 | #if BOOT_DEBUG_PT |
---|
613 | boot_puts(vseg[vseg_id].name); |
---|
614 | boot_puts(" : flags = "); |
---|
615 | boot_putx(flags); |
---|
616 | boot_puts(" / npages = "); |
---|
617 | boot_putd(npages); |
---|
618 | boot_puts(" / pbase = "); |
---|
619 | boot_putl(vseg[vseg_id].pbase); |
---|
620 | boot_puts("\n"); |
---|
621 | #endif |
---|
622 | // loop on 4K pages |
---|
623 | for (page_id = 0; page_id < npages; page_id++) |
---|
624 | { |
---|
625 | boot_add_pte(vspace_id, vpn, flags, ppn, verbose); |
---|
626 | vpn++; |
---|
627 | ppn++; |
---|
628 | } |
---|
629 | } |
---|
630 | } // end boot_vspace_pt_build() |
---|
631 | |
---|
632 | |
---|
633 | /////////////////////////////////////////////////////////////////////////// |
---|
634 | // Align the value of paddr or vaddr to the required alignement, |
---|
635 | // defined by alignPow2 == L2(alignement). |
---|
636 | /////////////////////////////////////////////////////////////////////////// |
---|
637 | paddr_t paddr_align_to(paddr_t paddr, unsigned int alignPow2) |
---|
638 | { |
---|
639 | paddr_t mask = (1 << alignPow2) - 1; |
---|
640 | return ((paddr + mask) & ~mask); |
---|
641 | } |
---|
642 | |
---|
643 | unsigned int vaddr_align_to(unsigned int vaddr, unsigned int alignPow2) |
---|
644 | { |
---|
645 | unsigned int mask = (1 << alignPow2) - 1; |
---|
646 | return ((vaddr + mask) & ~mask); |
---|
647 | } |
---|
648 | |
---|
649 | /////////////////////////////////////////////////////////////////////////// |
---|
650 | // This function computes the physical base address for a vseg |
---|
651 | // as specified in the mapping info data structure. |
---|
652 | // It updates the pbase and the length fields of the vseg. |
---|
653 | // It updates the pbase and vbase fields of all vobjs in the vseg. |
---|
654 | // It updates the next_base field of the pseg, and checks overflow. |
---|
655 | // It updates the boot_ptabs_paddr[] and boot_ptabs_vaddr[] arrays. |
---|
656 | // It is a global vseg if vspace_id = (-1). |
---|
657 | /////////////////////////////////////////////////////////////////////////// |
---|
658 | void boot_vseg_map(mapping_vseg_t * vseg, unsigned int vspace_id) |
---|
659 | { |
---|
660 | unsigned int vobj_id; |
---|
661 | unsigned int cur_vaddr; |
---|
662 | paddr_t cur_paddr; |
---|
663 | unsigned int offset; |
---|
664 | |
---|
665 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
---|
666 | mapping_vobj_t * vobj = boot_get_vobj_base(header); |
---|
667 | |
---|
668 | // get physical segment pointer |
---|
669 | mapping_pseg_t* pseg = boot_pseg_get(vseg->psegid); |
---|
670 | |
---|
671 | // compute vseg physical base address |
---|
672 | if (vseg->ident != 0) // identity mapping required |
---|
673 | { |
---|
674 | vseg->pbase = vseg->vbase; |
---|
675 | } |
---|
676 | else // unconstrained mapping |
---|
677 | { |
---|
678 | vseg->pbase = pseg->next_base; |
---|
679 | |
---|
680 | // test alignment constraint |
---|
681 | if (vobj[vseg->vobj_offset].align) |
---|
682 | { |
---|
683 | vseg->pbase = paddr_align_to(vseg->pbase, vobj[vseg->vobj_offset].align); |
---|
684 | } |
---|
685 | } |
---|
686 | |
---|
687 | // loop on vobjs contained in vseg to : |
---|
688 | // (1) computes the length of the vseg, |
---|
689 | // (2) initialize the vaddr and paddr fields of all vobjs, |
---|
690 | // (3) initialize the page table pointers arrays |
---|
691 | |
---|
692 | cur_vaddr = vseg->vbase; |
---|
693 | cur_paddr = vseg->pbase; |
---|
694 | |
---|
695 | for (vobj_id = vseg->vobj_offset; |
---|
696 | vobj_id < (vseg->vobj_offset + vseg->vobjs); vobj_id++) |
---|
697 | { |
---|
698 | if (vobj[vobj_id].align) |
---|
699 | { |
---|
700 | cur_paddr = paddr_align_to(cur_paddr, vobj[vobj_id].align); |
---|
701 | cur_vaddr = vaddr_align_to(cur_vaddr, vobj[vobj_id].align); |
---|
702 | } |
---|
703 | // set vaddr/paddr for current vobj |
---|
704 | vobj[vobj_id].vaddr = cur_vaddr; |
---|
705 | vobj[vobj_id].paddr = cur_paddr; |
---|
706 | |
---|
707 | // initialise boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB |
---|
708 | if (vobj[vobj_id].type == VOBJ_TYPE_PTAB) |
---|
709 | { |
---|
710 | if (vspace_id == ((unsigned int) -1)) // global vseg |
---|
711 | { |
---|
712 | boot_puts("\n[BOOT ERROR] in boot_vseg_map() function: "); |
---|
713 | boot_puts("a PTAB vobj cannot be global"); |
---|
714 | boot_exit(); |
---|
715 | } |
---|
716 | // we need at least one PT2 |
---|
717 | if (vobj[vobj_id].length < (PT1_SIZE + PT2_SIZE)) |
---|
718 | { |
---|
719 | boot_puts("\n[BOOT ERROR] in boot_vseg_map() function, "); |
---|
720 | boot_puts("PTAB too small, minumum size is: "); |
---|
721 | boot_putx(PT1_SIZE + PT2_SIZE); |
---|
722 | boot_exit(); |
---|
723 | } |
---|
724 | // register both physical and virtual page table address |
---|
725 | boot_ptabs_vaddr[vspace_id] = vobj[vobj_id].vaddr; |
---|
726 | boot_ptabs_paddr[vspace_id] = vobj[vobj_id].paddr; |
---|
727 | |
---|
728 | // reset all valid bits in PT1 |
---|
729 | for ( offset = 0 ; offset < 8192 ; offset = offset + 4) |
---|
730 | { |
---|
731 | boot_physical_write( cur_paddr + offset, 0); |
---|
732 | } |
---|
733 | |
---|
734 | // computing the number of second level pages |
---|
735 | boot_max_pt2[vspace_id] = (vobj[vobj_id].length - PT1_SIZE) / PT2_SIZE; |
---|
736 | } |
---|
737 | |
---|
738 | // set next vaddr/paddr |
---|
739 | cur_vaddr = cur_vaddr + vobj[vobj_id].length; |
---|
740 | cur_paddr = cur_paddr + vobj[vobj_id].length; |
---|
741 | } // end for vobjs |
---|
742 | |
---|
743 | //set the vseg length |
---|
744 | vseg->length = vaddr_align_to((unsigned int)(cur_paddr - vseg->pbase), 12); |
---|
745 | |
---|
746 | // checking pseg overflow |
---|
747 | if ((vseg->pbase < pseg->base) || |
---|
748 | ((vseg->pbase + vseg->length) > (pseg->base + pseg->length))) |
---|
749 | { |
---|
750 | boot_puts("\n[BOOT ERROR] in boot_vseg_map() function\n"); |
---|
751 | boot_puts("impossible mapping for virtual segment: "); |
---|
752 | boot_puts(vseg->name); |
---|
753 | boot_puts("\n"); |
---|
754 | boot_puts("vseg pbase = "); |
---|
755 | boot_putl(vseg->pbase); |
---|
756 | boot_puts("\n"); |
---|
757 | boot_puts("vseg length = "); |
---|
758 | boot_putx(vseg->length); |
---|
759 | boot_puts("\n"); |
---|
760 | boot_puts("pseg pbase = "); |
---|
761 | boot_putl(pseg->base); |
---|
762 | boot_puts("\n"); |
---|
763 | boot_puts("pseg length = "); |
---|
764 | boot_putl(pseg->length); |
---|
765 | boot_puts("\n"); |
---|
766 | boot_exit(); |
---|
767 | } |
---|
768 | |
---|
769 | #if BOOT_DEBUG_PT |
---|
770 | boot_puts(vseg->name); |
---|
771 | boot_puts(" : len = "); |
---|
772 | boot_putx(vseg->length); |
---|
773 | boot_puts(" / vbase = "); |
---|
774 | boot_putx(vseg->vbase); |
---|
775 | boot_puts(" / pbase = "); |
---|
776 | boot_putl(vseg->pbase); |
---|
777 | boot_puts("\n"); |
---|
778 | #endif |
---|
779 | |
---|
780 | // set the next_base field in pseg when it's a RAM |
---|
781 | if ( pseg->type == PSEG_TYPE_RAM ) |
---|
782 | { |
---|
783 | pseg->next_base = vseg->pbase + vseg->length; |
---|
784 | } |
---|
785 | } // end boot_vseg_map() |
---|
786 | |
---|
787 | ///////////////////////////////////////////////////////////////////// |
---|
788 | // This function checks consistence beween the mapping_info data |
---|
789 | // structure (soft), and the giet_config file (hard). |
---|
790 | ///////////////////////////////////////////////////////////////////// |
---|
791 | void boot_check_mapping() |
---|
792 | { |
---|
793 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
---|
794 | mapping_cluster_t * cluster = boot_get_cluster_base(header); |
---|
795 | mapping_periph_t * periph = boot_get_periph_base(header); |
---|
796 | |
---|
797 | // checking mapping availability |
---|
798 | if (header->signature != IN_MAPPING_SIGNATURE) |
---|
799 | { |
---|
800 | boot_puts("\n[BOOT ERROR] Illegal mapping signature: "); |
---|
801 | boot_putx(header->signature); |
---|
802 | boot_puts("\n"); |
---|
803 | boot_exit(); |
---|
804 | } |
---|
805 | // checking number of clusters |
---|
806 | if (header->clusters != NB_CLUSTERS) |
---|
807 | { |
---|
808 | boot_puts("\n[BOOT ERROR] Incoherent NB_CLUSTERS"); |
---|
809 | boot_puts("\n - In giet_config, value = "); |
---|
810 | boot_putd(NB_CLUSTERS); |
---|
811 | boot_puts("\n - In mapping_info, value = "); |
---|
812 | boot_putd(header->clusters); |
---|
813 | boot_puts("\n"); |
---|
814 | boot_exit(); |
---|
815 | } |
---|
816 | // checking number of virtual spaces |
---|
817 | if (header->vspaces > GIET_NB_VSPACE_MAX) |
---|
818 | { |
---|
819 | boot_puts("\n[BOOT ERROR] : number of vspaces > GIET_NB_VSPACE_MAX\n"); |
---|
820 | boot_puts("\n"); |
---|
821 | boot_exit(); |
---|
822 | } |
---|
823 | // checking hardware |
---|
824 | unsigned int periph_id; |
---|
825 | unsigned int cluster_id; |
---|
826 | unsigned int tty_found = 0; |
---|
827 | unsigned int nic_found = 0; |
---|
828 | for (cluster_id = 0; cluster_id < NB_CLUSTERS; cluster_id++) |
---|
829 | { |
---|
830 | // NB_PROCS_MAX |
---|
831 | if (cluster[cluster_id].procs > NB_PROCS_MAX) |
---|
832 | { |
---|
833 | boot_puts("\n[BOOT ERROR] too many processors in cluster "); |
---|
834 | boot_putd(cluster_id); |
---|
835 | boot_puts(" : procs = "); |
---|
836 | boot_putd(cluster[cluster_id].procs); |
---|
837 | boot_puts("\n"); |
---|
838 | boot_exit(); |
---|
839 | } |
---|
840 | |
---|
841 | for (periph_id = cluster[cluster_id].periph_offset; |
---|
842 | periph_id < cluster[cluster_id].periph_offset + cluster[cluster_id].periphs; |
---|
843 | periph_id++) |
---|
844 | { |
---|
845 | // NB_TTY_CHANNELS |
---|
846 | if (periph[periph_id].type == PERIPH_TYPE_TTY) |
---|
847 | { |
---|
848 | if (tty_found) |
---|
849 | { |
---|
850 | boot_puts("\n[BOOT ERROR] TTY component should not be replicated\n"); |
---|
851 | boot_exit(); |
---|
852 | } |
---|
853 | if (periph[periph_id].channels > NB_TTY_CHANNELS) |
---|
854 | { |
---|
855 | boot_puts("\n[BOOT ERROR] Wrong NB_TTY_CHANNELS in cluster "); |
---|
856 | boot_putd(cluster_id); |
---|
857 | boot_puts(" : ttys = "); |
---|
858 | boot_putd(periph[periph_id].channels); |
---|
859 | boot_puts("\n"); |
---|
860 | boot_exit(); |
---|
861 | } |
---|
862 | tty_found = 1; |
---|
863 | } |
---|
864 | // NB_NIC_CHANNELS |
---|
865 | if (periph[periph_id].type == PERIPH_TYPE_NIC) |
---|
866 | { |
---|
867 | if (nic_found) |
---|
868 | { |
---|
869 | boot_puts("\n[BOOT ERROR] NIC component should not be replicated\n"); |
---|
870 | boot_exit(); |
---|
871 | } |
---|
872 | if (periph[periph_id].channels != NB_NIC_CHANNELS) |
---|
873 | { |
---|
874 | boot_puts("\n[BOOT ERROR] Wrong NB_NIC_CHANNELS in cluster "); |
---|
875 | boot_putd(cluster_id); |
---|
876 | boot_puts(" : nics = "); |
---|
877 | boot_putd(periph[periph_id].channels); |
---|
878 | boot_puts("\n"); |
---|
879 | boot_exit(); |
---|
880 | } |
---|
881 | nic_found = 1; |
---|
882 | } |
---|
883 | // NB_TIMERS |
---|
884 | if (periph[periph_id].type == PERIPH_TYPE_TIM) |
---|
885 | { |
---|
886 | if (periph[periph_id].channels > NB_TIM_CHANNELS) |
---|
887 | { |
---|
888 | boot_puts("\n[BOOT ERROR] Too much user timers in cluster "); |
---|
889 | boot_putd(cluster_id); |
---|
890 | boot_puts(" : timers = "); |
---|
891 | boot_putd(periph[periph_id].channels); |
---|
892 | boot_puts("\n"); |
---|
893 | boot_exit(); |
---|
894 | } |
---|
895 | } |
---|
896 | // NB_DMAS |
---|
897 | if (periph[periph_id].type == PERIPH_TYPE_DMA) |
---|
898 | { |
---|
899 | if (periph[periph_id].channels != NB_DMA_CHANNELS) |
---|
900 | { |
---|
901 | boot_puts("\n[BOOT ERROR] Too much DMA channels in cluster "); |
---|
902 | boot_putd(cluster_id); |
---|
903 | boot_puts(" : channels = "); |
---|
904 | boot_putd(periph[periph_id].channels); |
---|
905 | boot_puts(" - NB_DMA_CHANNELS : "); |
---|
906 | boot_putd(NB_DMA_CHANNELS); |
---|
907 | boot_puts("\n"); |
---|
908 | boot_exit(); |
---|
909 | } |
---|
910 | } |
---|
911 | } // end for periphs |
---|
912 | } // end for clusters |
---|
913 | } // end boot_check_mapping() |
---|
914 | |
---|
915 | ///////////////////////////////////////////////////////////////////// |
---|
916 | // This function initialises the physical pages table allocators |
---|
917 | // for all psegs (i.e. next_base field of the pseg). |
---|
918 | ///////////////////////////////////////////////////////////////////// |
---|
919 | void boot_psegs_init() |
---|
920 | { |
---|
921 | mapping_header_t* header = (mapping_header_t *) &seg_mapping_base; |
---|
922 | mapping_cluster_t* cluster = boot_get_cluster_base(header); |
---|
923 | mapping_pseg_t* pseg = boot_get_pseg_base(header); |
---|
924 | |
---|
925 | unsigned int cluster_id; |
---|
926 | unsigned int pseg_id; |
---|
927 | |
---|
928 | #if BOOT_DEBUG_PT |
---|
929 | boot_puts ("\n[BOOT DEBUG] ****** psegs allocators initialisation ******\n"); |
---|
930 | #endif |
---|
931 | |
---|
932 | for (cluster_id = 0; cluster_id < header->clusters; cluster_id++) |
---|
933 | { |
---|
934 | if (cluster[cluster_id].procs > NB_PROCS_MAX) |
---|
935 | { |
---|
936 | boot_puts("\n[BOOT ERROR] The number of processors in cluster "); |
---|
937 | boot_putd(cluster_id); |
---|
938 | boot_puts(" is larger than NB_PROCS_MAX \n"); |
---|
939 | boot_exit(); |
---|
940 | } |
---|
941 | |
---|
942 | for (pseg_id = cluster[cluster_id].pseg_offset; |
---|
943 | pseg_id < cluster[cluster_id].pseg_offset + cluster[cluster_id].psegs; |
---|
944 | pseg_id++) |
---|
945 | { |
---|
946 | pseg[pseg_id].next_base = pseg[pseg_id].base; |
---|
947 | |
---|
948 | #if BOOT_DEBUG_PT |
---|
949 | boot_puts("cluster "); |
---|
950 | boot_putd(cluster_id); |
---|
951 | boot_puts(" / pseg "); |
---|
952 | boot_puts(pseg[pseg_id].name); |
---|
953 | boot_puts(" : next_base = "); |
---|
954 | boot_putl(pseg[pseg_id].next_base); |
---|
955 | boot_puts("\n"); |
---|
956 | #endif |
---|
957 | } |
---|
958 | } |
---|
959 | } // end boot_psegs_init() |
---|
960 | |
---|
961 | ///////////////////////////////////////////////////////////////////// |
---|
962 | // This function builds the page tables for all virtual spaces |
---|
963 | // defined in the mapping_info data structure, in three steps: |
---|
964 | // - step 1 : It computes the physical base address for global vsegs |
---|
965 | // and for all associated vobjs. |
---|
966 | // - step 2 : It computes the physical base address for all private |
---|
967 | // vsegs and all vobjs in each virtual space. |
---|
968 | // - step 3 : It actually fill the page table for each vspace. |
---|
969 | ///////////////////////////////////////////////////////////////////// |
---|
970 | void boot_pt_init() |
---|
971 | { |
---|
972 | mapping_header_t * header = (mapping_header_t *) &seg_mapping_base; |
---|
973 | mapping_vspace_t * vspace = boot_get_vspace_base(header); |
---|
974 | mapping_vseg_t * vseg = boot_get_vseg_base(header); |
---|
975 | |
---|
976 | unsigned int vspace_id; |
---|
977 | unsigned int vseg_id; |
---|
978 | |
---|
979 | #if BOOT_DEBUG_PT |
---|
980 | boot_puts("\n[BOOT DEBUG] ****** mapping global vsegs ******\n"); |
---|
981 | #endif |
---|
982 | |
---|
983 | // step 1 : loop on virtual spaces to map global vsegs |
---|
984 | for (vseg_id = 0; vseg_id < header->globals; vseg_id++) |
---|
985 | { |
---|
986 | boot_vseg_map(&vseg[vseg_id], ((unsigned int) (-1))); |
---|
987 | } |
---|
988 | |
---|
989 | // step 2 : loop on virtual vspaces to map private vsegs |
---|
990 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
---|
991 | { |
---|
992 | |
---|
993 | #if BOOT_DEBUG_PT |
---|
994 | boot_puts("\n[BOOT DEBUG] ****** mapping private vsegs in vspace "); |
---|
995 | boot_puts(vspace[vspace_id].name); |
---|
996 | boot_puts(" ******\n"); |
---|
997 | #endif |
---|
998 | |
---|
999 | for (vseg_id = vspace[vspace_id].vseg_offset; |
---|
1000 | vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs); |
---|
1001 | vseg_id++) |
---|
1002 | { |
---|
1003 | boot_vseg_map(&vseg[vseg_id], vspace_id); |
---|
1004 | } |
---|
1005 | } |
---|
1006 | |
---|
1007 | // step 3 : loop on the vspaces to build the page tables |
---|
1008 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
---|
1009 | { |
---|
1010 | #if BOOT_DEBUG_PT |
---|
1011 | boot_puts("\n[BOOT DEBUG] ****** building page table for vspace "); |
---|
1012 | boot_puts(vspace[vspace_id].name); |
---|
1013 | boot_puts(" ******\n"); |
---|
1014 | #endif |
---|
1015 | boot_vspace_pt_build(vspace_id); |
---|
1016 | |
---|
1017 | #if BOOT_DEBUG_PT |
---|
1018 | boot_puts("\n>>> page table physical address = "); |
---|
1019 | boot_putl(boot_ptabs_paddr[vspace_id]); |
---|
1020 | boot_puts(", number of PT2 = "); |
---|
1021 | boot_putd((unsigned int) boot_max_pt2[vspace_id]); |
---|
1022 | boot_puts("\n"); |
---|
1023 | #endif |
---|
1024 | } |
---|
1025 | } // end boot_pt_init() |
---|
1026 | |
---|
1027 | /////////////////////////////////////////////////////////////////////////////// |
---|
1028 | // This function initializes all private vobjs defined in the vspaces, |
---|
1029 | // such as mwmr channels, barriers and locks, because these vobjs |
---|
1030 | // are not known, and not initialized by the compiler. |
---|
1031 | // Warning : The MMU is supposed to be activated... |
---|
1032 | /////////////////////////////////////////////////////////////////////////////// |
---|
1033 | void boot_vobjs_init() |
---|
1034 | { |
---|
1035 | mapping_header_t* header = (mapping_header_t *) & seg_mapping_base; |
---|
1036 | mapping_vspace_t* vspace = boot_get_vspace_base(header); |
---|
1037 | mapping_vobj_t* vobj = boot_get_vobj_base(header); |
---|
1038 | |
---|
1039 | unsigned int vspace_id; |
---|
1040 | unsigned int vobj_id; |
---|
1041 | |
---|
1042 | // loop on the vspaces |
---|
1043 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
---|
1044 | { |
---|
1045 | |
---|
1046 | #if BOOT_DEBUG_VOBJS |
---|
1047 | boot_puts("\n[BOOT DEBUG] ****** vobjs initialisation in vspace "); |
---|
1048 | boot_puts(vspace[vspace_id].name); |
---|
1049 | boot_puts(" ******\n"); |
---|
1050 | #endif |
---|
1051 | |
---|
1052 | unsigned int ptab_found = 0; |
---|
1053 | |
---|
1054 | // loop on the vobjs |
---|
1055 | for (vobj_id = vspace[vspace_id].vobj_offset; |
---|
1056 | vobj_id < (vspace[vspace_id].vobj_offset + vspace[vspace_id].vobjs); |
---|
1057 | vobj_id++) |
---|
1058 | { |
---|
1059 | switch (vobj[vobj_id].type) |
---|
1060 | { |
---|
1061 | case VOBJ_TYPE_MWMR: // storage capacity is (vobj.length/4 - 5) words |
---|
1062 | { |
---|
1063 | mwmr_channel_t* mwmr = (mwmr_channel_t *) (vobj[vobj_id].vaddr); |
---|
1064 | mwmr->ptw = 0; |
---|
1065 | mwmr->ptr = 0; |
---|
1066 | mwmr->sts = 0; |
---|
1067 | mwmr->width = vobj[vobj_id].init; |
---|
1068 | mwmr->depth = (vobj[vobj_id].length >> 2) - 6; |
---|
1069 | mwmr->lock = 0; |
---|
1070 | #if BOOT_DEBUG_VOBJS |
---|
1071 | boot_puts("MWMR : "); |
---|
1072 | boot_puts(vobj[vobj_id].name); |
---|
1073 | boot_puts(" / depth = "); |
---|
1074 | boot_putd(mwmr->depth); |
---|
1075 | boot_puts(" / width = "); |
---|
1076 | boot_putd(mwmr->width); |
---|
1077 | boot_puts("\n"); |
---|
1078 | #endif |
---|
1079 | break; |
---|
1080 | } |
---|
1081 | case VOBJ_TYPE_ELF: // initialisation done by the loader |
---|
1082 | { |
---|
1083 | #if BOOT_DEBUG_VOBJS |
---|
1084 | boot_puts("ELF : "); |
---|
1085 | boot_puts(vobj[vobj_id].name); |
---|
1086 | boot_puts(" / length = "); |
---|
1087 | boot_putx(vobj[vobj_id].length); |
---|
1088 | boot_puts("\n"); |
---|
1089 | #endif |
---|
1090 | break; |
---|
1091 | } |
---|
1092 | case VOBJ_TYPE_BLOB: // initialisation done by the loader |
---|
1093 | { |
---|
1094 | #if BOOT_DEBUG_VOBJS |
---|
1095 | boot_puts("BLOB : "); |
---|
1096 | boot_puts(vobj[vobj_id].name); |
---|
1097 | boot_puts(" / length = "); |
---|
1098 | boot_putx(vobj[vobj_id].length); |
---|
1099 | boot_puts("\n"); |
---|
1100 | #endif |
---|
1101 | break; |
---|
1102 | } |
---|
1103 | case VOBJ_TYPE_BARRIER: // init is the number of participants |
---|
1104 | { |
---|
1105 | giet_barrier_t* barrier = (giet_barrier_t *) (vobj[vobj_id].vaddr); |
---|
1106 | barrier->count = vobj[vobj_id].init; |
---|
1107 | barrier->init = vobj[vobj_id].init; |
---|
1108 | #if BOOT_DEBUG_VOBJS |
---|
1109 | boot_puts("BARRIER : "); |
---|
1110 | boot_puts(vobj[vobj_id].name); |
---|
1111 | boot_puts(" / init_value = "); |
---|
1112 | boot_putd(barrier->init); |
---|
1113 | boot_puts("\n"); |
---|
1114 | #endif |
---|
1115 | break; |
---|
1116 | } |
---|
1117 | case VOBJ_TYPE_LOCK: // init value is "not taken" |
---|
1118 | { |
---|
1119 | unsigned int* lock = (unsigned int *) (vobj[vobj_id].vaddr); |
---|
1120 | *lock = 0; |
---|
1121 | #if BOOT_DEBUG_VOBJS |
---|
1122 | boot_puts("LOCK : "); |
---|
1123 | boot_puts(vobj[vobj_id].name); |
---|
1124 | boot_puts("\n"); |
---|
1125 | #endif |
---|
1126 | break; |
---|
1127 | } |
---|
1128 | case VOBJ_TYPE_BUFFER: // nothing to initialise |
---|
1129 | { |
---|
1130 | #if BOOT_DEBUG_VOBJS |
---|
1131 | boot_puts("BUFFER : "); |
---|
1132 | boot_puts(vobj[vobj_id].name); |
---|
1133 | boot_puts(" / paddr = "); |
---|
1134 | boot_putx(vobj[vobj_id].paddr); |
---|
1135 | boot_puts(" / length = "); |
---|
1136 | boot_putx(vobj[vobj_id].length); |
---|
1137 | boot_puts("\n"); |
---|
1138 | #endif |
---|
1139 | break; |
---|
1140 | } |
---|
1141 | case VOBJ_TYPE_MEMSPACE: |
---|
1142 | { |
---|
1143 | giet_memspace_t* memspace = (giet_memspace_t *) vobj[vobj_id].vaddr; |
---|
1144 | memspace->buffer = (void *) vobj[vobj_id].vaddr + 8; |
---|
1145 | memspace->size = vobj[vobj_id].length - 8; |
---|
1146 | #if BOOT_DEBUG_VOBJS |
---|
1147 | boot_puts("MEMSPACE : "); |
---|
1148 | boot_puts(vobj[vobj_id].name); |
---|
1149 | boot_puts(" / vaddr = "); |
---|
1150 | boot_putx(vobj[vobj_id].vaddr); |
---|
1151 | boot_puts(" / length = "); |
---|
1152 | boot_putx(vobj[vobj_id].length); |
---|
1153 | boot_puts(" / buffer = "); |
---|
1154 | boot_putx((unsigned int)memspace->buffer); |
---|
1155 | boot_puts(" / size = "); |
---|
1156 | boot_putx(memspace->size); |
---|
1157 | boot_puts("\n"); |
---|
1158 | #endif |
---|
1159 | break; |
---|
1160 | } |
---|
1161 | case VOBJ_TYPE_PTAB: // nothing to initialize |
---|
1162 | { |
---|
1163 | ptab_found = 1; |
---|
1164 | #if BOOT_DEBUG_VOBJS |
---|
1165 | boot_puts("PTAB : "); |
---|
1166 | boot_puts(vobj[vobj_id].name); |
---|
1167 | boot_puts(" / length = "); |
---|
1168 | boot_putx(vobj[vobj_id].length); |
---|
1169 | boot_puts("\n"); |
---|
1170 | #endif |
---|
1171 | break; |
---|
1172 | } |
---|
1173 | case VOBJ_TYPE_CONST: |
---|
1174 | { |
---|
1175 | unsigned int* addr = (unsigned int *) vobj[vobj_id].vaddr; |
---|
1176 | *addr = vobj[vobj_id].init; |
---|
1177 | #if BOOT_DEBUG_VOBJS |
---|
1178 | boot_puts("CONST : "); |
---|
1179 | boot_puts(vobj[vobj_id].name); |
---|
1180 | boot_puts(" / Paddr :"); |
---|
1181 | boot_putx(vobj[vobj_id].paddr); |
---|
1182 | boot_puts(" / init = "); |
---|
1183 | boot_putx(*addr); |
---|
1184 | boot_puts("\n"); |
---|
1185 | #endif |
---|
1186 | break; |
---|
1187 | } |
---|
1188 | default: |
---|
1189 | { |
---|
1190 | boot_puts("\n[BOOT ERROR] illegal vobj type: "); |
---|
1191 | boot_putd(vobj[vobj_id].type); |
---|
1192 | boot_puts("\n"); |
---|
1193 | boot_exit(); |
---|
1194 | } |
---|
1195 | } // end switch type |
---|
1196 | } // end loop on vobjs |
---|
1197 | if (ptab_found == 0) |
---|
1198 | { |
---|
1199 | boot_puts("\n[BOOT ERROR] Missing PTAB for vspace "); |
---|
1200 | boot_putd(vspace_id); |
---|
1201 | boot_exit(); |
---|
1202 | } |
---|
1203 | } // end loop on vspaces |
---|
1204 | } // end boot_vobjs_init() |
---|
1205 | |
---|
1206 | //////////////////////////////////////////////////////////////////////////////// |
---|
1207 | // This function initializes one MWMR controller channel. |
---|
1208 | // - coproc_pbase : physical base address of the Coproc configuration segment |
---|
1209 | // - channel_pbase : physical base address of the MWMR channel segment |
---|
1210 | // Warning : the channel physical base address should be on 32 bits, as the |
---|
1211 | // MWMR controller configuration registers are 32 bits. |
---|
1212 | // TODO : Introduce a MWMR_CONFIG_PADDR_EXT register in the MWMR coprocessor |
---|
1213 | // To support addresses > 32 bits and remove this limitation... |
---|
1214 | /////////////////////////////////////////////////////////////////////////////// |
---|
1215 | void mwmr_hw_init(paddr_t coproc_pbase, |
---|
1216 | enum mwmrPortDirection way, |
---|
1217 | unsigned int no, |
---|
1218 | paddr_t channel_pbase) |
---|
1219 | { |
---|
1220 | if ( (channel_pbase>>32) != 0 ) |
---|
1221 | { |
---|
1222 | boot_puts("\n[BOOT ERROR] MWMR controller does not support address > 32 bits\n"); |
---|
1223 | boot_exit(); |
---|
1224 | } |
---|
1225 | |
---|
1226 | unsigned int lsb = (unsigned int)channel_pbase; |
---|
1227 | // unsigned int msb = (unsigned int)(channel_pbase>>32); |
---|
1228 | |
---|
1229 | unsigned int depth = boot_physical_read( channel_pbase + 16 ); |
---|
1230 | unsigned int width = boot_physical_read( channel_pbase + 20 ); |
---|
1231 | |
---|
1232 | boot_physical_write( coproc_pbase + MWMR_CONFIG_FIFO_WAY*4, way ); |
---|
1233 | boot_physical_write( coproc_pbase + MWMR_CONFIG_FIFO_NO*4, no ); |
---|
1234 | boot_physical_write( coproc_pbase + MWMR_CONFIG_WIDTH*4, width); |
---|
1235 | boot_physical_write( coproc_pbase + MWMR_CONFIG_DEPTH*4, depth); |
---|
1236 | boot_physical_write( coproc_pbase + MWMR_CONFIG_STATUS_ADDR*4, lsb); |
---|
1237 | boot_physical_write( coproc_pbase + MWMR_CONFIG_BUFFER_ADDR*4, lsb + 24 ); |
---|
1238 | // boot_physical_write( coproc_pbase + MWMR_CONFIG_PADDR_EXT*4, msb); |
---|
1239 | boot_physical_write( coproc_pbase + MWMR_CONFIG_RUNNING*4, 1 ); |
---|
1240 | } |
---|
1241 | |
---|
1242 | //////////////////////////////////////////////////////////////////////////////// |
---|
1243 | // This function intializes the periherals and coprocessors, as specified |
---|
1244 | // in the mapping_info file. |
---|
1245 | //////////////////////////////////////////////////////////////////////////////// |
---|
1246 | void boot_peripherals_init() |
---|
1247 | { |
---|
1248 | mapping_header_t * header = (mapping_header_t *) & seg_mapping_base; |
---|
1249 | mapping_cluster_t * cluster = boot_get_cluster_base(header); |
---|
1250 | mapping_periph_t * periph = boot_get_periph_base(header); |
---|
1251 | mapping_pseg_t * pseg = boot_get_pseg_base(header); |
---|
1252 | mapping_vobj_t * vobj = boot_get_vobj_base(header); |
---|
1253 | mapping_vspace_t * vspace = boot_get_vspace_base(header); |
---|
1254 | mapping_coproc_t * coproc = boot_get_coproc_base(header); |
---|
1255 | mapping_cp_port_t * cp_port = boot_get_cp_port_base(header); |
---|
1256 | |
---|
1257 | unsigned int cluster_id; |
---|
1258 | unsigned int periph_id; |
---|
1259 | unsigned int coproc_id; |
---|
1260 | unsigned int cp_port_id; |
---|
1261 | unsigned int channel_id; |
---|
1262 | |
---|
1263 | for (cluster_id = 0; cluster_id < header->clusters; cluster_id++) |
---|
1264 | { |
---|
1265 | |
---|
1266 | #if BOOT_DEBUG_PERI |
---|
1267 | boot_puts("\n[BOOT DEBUG] ****** peripherals initialisation in cluster "); |
---|
1268 | boot_putd(cluster_id); |
---|
1269 | boot_puts(" ******\n"); |
---|
1270 | #endif |
---|
1271 | |
---|
1272 | for (periph_id = cluster[cluster_id].periph_offset; |
---|
1273 | periph_id < cluster[cluster_id].periph_offset + |
---|
1274 | cluster[cluster_id].periphs; periph_id++) |
---|
1275 | { |
---|
1276 | unsigned int type = periph[periph_id].type; |
---|
1277 | unsigned int channels = periph[periph_id].channels; |
---|
1278 | unsigned int pseg_id = periph[periph_id].psegid; |
---|
1279 | |
---|
1280 | paddr_t pbase = pseg[pseg_id].base; |
---|
1281 | |
---|
1282 | #if BOOT_DEBUG_PERI |
---|
1283 | boot_puts("- peripheral type : "); |
---|
1284 | boot_putd(type); |
---|
1285 | boot_puts(" / pbase = "); |
---|
1286 | boot_putl(pbase); |
---|
1287 | boot_puts(" / channels = "); |
---|
1288 | boot_putd(channels); |
---|
1289 | boot_puts("\n"); |
---|
1290 | #endif |
---|
1291 | |
---|
1292 | switch (type) |
---|
1293 | { |
---|
1294 | case PERIPH_TYPE_IOC: // vci_block_device component |
---|
1295 | { |
---|
1296 | paddr_t paddr = pbase + BLOCK_DEVICE_IRQ_ENABLE*4; |
---|
1297 | boot_physical_write(paddr, 1); |
---|
1298 | #if BOOT_DEBUG_PERI |
---|
1299 | boot_puts("- IOC initialised\n"); |
---|
1300 | #endif |
---|
1301 | } |
---|
1302 | break; |
---|
1303 | case PERIPH_TYPE_DMA: // vci_multi_dma component |
---|
1304 | for (channel_id = 0; channel_id < channels; channel_id++) |
---|
1305 | { |
---|
1306 | paddr_t paddr = pbase + (channel_id*DMA_SPAN + DMA_IRQ_DISABLE) * 4; |
---|
1307 | boot_physical_write(paddr, 0); |
---|
1308 | } |
---|
1309 | #if BOOT_DEBUG_PERI |
---|
1310 | boot_puts("- DMA initialised\n"); |
---|
1311 | #endif |
---|
1312 | break; |
---|
1313 | case PERIPH_TYPE_NIC: // vci_multi_nic component |
---|
1314 | for (channel_id = 0; channel_id < channels; channel_id++) |
---|
1315 | { |
---|
1316 | // TODO |
---|
1317 | } |
---|
1318 | #if BOOT_DEBUG_PERI |
---|
1319 | boot_puts("- NIC initialised\n"); |
---|
1320 | #endif |
---|
1321 | break; |
---|
1322 | case PERIPH_TYPE_TTY: // vci_multi_tty component |
---|
1323 | #if BOOT_DEBUG_PERI |
---|
1324 | boot_puts("- TTY initialised\n"); |
---|
1325 | #endif |
---|
1326 | break; |
---|
1327 | case PERIPH_TYPE_IOB: // vci_io_bridge component |
---|
1328 | if (IOMMU_ACTIVE) |
---|
1329 | { |
---|
1330 | // TODO |
---|
1331 | // get the iommu page table physical address |
---|
1332 | // define IPI address mapping the IOC interrupt |
---|
1333 | // set IOMMU page table address |
---|
1334 | // pseg_base[IOB_IOMMU_PTPR] = ptab_pbase; |
---|
1335 | // activate IOMMU |
---|
1336 | // pseg_base[IOB_IOMMU_ACTIVE] = 1; |
---|
1337 | } |
---|
1338 | #if BOOT_DEBUG_PERI |
---|
1339 | boot_puts("- IOB initialised\n"); |
---|
1340 | #endif |
---|
1341 | break; |
---|
1342 | } // end switch periph type |
---|
1343 | } // end for periphs |
---|
1344 | |
---|
1345 | #if BOOT_DEBUG_PERI |
---|
1346 | boot_puts("\n[BOOT DEBUG] ****** coprocessors initialisation in cluster "); |
---|
1347 | boot_putd(cluster_id); |
---|
1348 | boot_puts(" ******\n"); |
---|
1349 | #endif |
---|
1350 | |
---|
1351 | for (coproc_id = cluster[cluster_id].coproc_offset; |
---|
1352 | coproc_id < cluster[cluster_id].coproc_offset + |
---|
1353 | cluster[cluster_id].coprocs; coproc_id++) |
---|
1354 | { |
---|
1355 | unsigned no_fifo_to = 0; //FIXME: should the map.xml define the order? |
---|
1356 | unsigned no_fifo_from = 0; |
---|
1357 | |
---|
1358 | // Get physical base address for MWMR controler |
---|
1359 | paddr_t coproc_pbase = pseg[coproc[coproc_id].psegid].base; |
---|
1360 | |
---|
1361 | #if BOOT_DEBUG_PERI |
---|
1362 | boot_puts("- coprocessor name : "); |
---|
1363 | boot_puts(coproc[coproc_id].name); |
---|
1364 | boot_puts(" / nb ports = "); |
---|
1365 | boot_putd((unsigned int) coproc[coproc_id].ports); |
---|
1366 | boot_puts("\n"); |
---|
1367 | #endif |
---|
1368 | |
---|
1369 | for (cp_port_id = coproc[coproc_id].port_offset; |
---|
1370 | cp_port_id < coproc[coproc_id].port_offset + coproc[coproc_id].ports; |
---|
1371 | cp_port_id++) |
---|
1372 | { |
---|
1373 | unsigned int vspace_id = cp_port[cp_port_id].vspaceid; |
---|
1374 | unsigned int vobj_id = cp_port[cp_port_id].mwmr_vobjid + |
---|
1375 | vspace[vspace_id].vobj_offset; |
---|
1376 | |
---|
1377 | // Get MWMR channel base address |
---|
1378 | paddr_t channel_pbase = vobj[vobj_id].paddr; |
---|
1379 | |
---|
1380 | if (cp_port[cp_port_id].direction == PORT_TO_COPROC) |
---|
1381 | { |
---|
1382 | #if BOOT_DEBUG_PERI |
---|
1383 | boot_puts(" port direction: PORT_TO_COPROC"); |
---|
1384 | #endif |
---|
1385 | mwmr_hw_init(coproc_pbase, |
---|
1386 | PORT_TO_COPROC, |
---|
1387 | no_fifo_to, |
---|
1388 | channel_pbase); |
---|
1389 | no_fifo_to++; |
---|
1390 | } |
---|
1391 | else |
---|
1392 | { |
---|
1393 | #if BOOT_DEBUG_PERI |
---|
1394 | boot_puts(" port direction: PORT_FROM_COPROC"); |
---|
1395 | #endif |
---|
1396 | mwmr_hw_init(coproc_pbase, |
---|
1397 | PORT_FROM_COPROC, |
---|
1398 | no_fifo_from, |
---|
1399 | channel_pbase); |
---|
1400 | no_fifo_from++; |
---|
1401 | } |
---|
1402 | #if BOOT_DEBUG_PERI |
---|
1403 | boot_puts(", with mwmr: "); |
---|
1404 | boot_puts(vobj[vobj_id].name); |
---|
1405 | boot_puts(" of vspace: "); |
---|
1406 | boot_puts(vspace[vspace_id].name); |
---|
1407 | #endif |
---|
1408 | } // end for cp_ports |
---|
1409 | } // end for coprocs |
---|
1410 | } // end for clusters |
---|
1411 | } // end boot_peripherals_init() |
---|
1412 | |
---|
1413 | /////////////////////////////////////////////////////////////////////////////// |
---|
1414 | // This function returns in the vbase and length buffers the virtual base |
---|
1415 | // address and the length of the segment allocated to the schedulers array |
---|
1416 | // in the cluster defined by the clusterid argument. |
---|
1417 | /////////////////////////////////////////////////////////////////////////////// |
---|
1418 | void boot_get_sched_vaddr( unsigned int cluster_id, |
---|
1419 | unsigned int* vbase, |
---|
1420 | unsigned int* length ) |
---|
1421 | { |
---|
1422 | mapping_header_t* header = (mapping_header_t *) & seg_mapping_base; |
---|
1423 | mapping_vobj_t* vobj = boot_get_vobj_base(header); |
---|
1424 | mapping_vseg_t* vseg = boot_get_vseg_base(header); |
---|
1425 | mapping_pseg_t* pseg = boot_get_pseg_base(header); |
---|
1426 | |
---|
1427 | unsigned int vseg_id; |
---|
1428 | unsigned int found = 0; |
---|
1429 | |
---|
1430 | for ( vseg_id = 0 ; (vseg_id < header->vsegs) && (found == 0) ; vseg_id++ ) |
---|
1431 | { |
---|
1432 | if ( (vobj[vseg[vseg_id].vobj_offset].type == VOBJ_TYPE_SCHED) && |
---|
1433 | (pseg[vseg[vseg_id].psegid].cluster == cluster_id ) ) |
---|
1434 | { |
---|
1435 | *vbase = vseg[vseg_id].vbase; |
---|
1436 | *length = vobj[vseg[vseg_id].vobj_offset].length; |
---|
1437 | found = 1; |
---|
1438 | } |
---|
1439 | } |
---|
1440 | if ( found == 0 ) |
---|
1441 | { |
---|
1442 | boot_puts("\n[BOOT ERROR] No vobj of type SCHED in cluster "); |
---|
1443 | boot_putd(cluster_id); |
---|
1444 | boot_puts("\n"); |
---|
1445 | boot_exit(); |
---|
1446 | } |
---|
1447 | } // end boot_get_sched_vaddr() |
---|
1448 | |
---|
1449 | /////////////////////////////////////////////////////////////////////////////// |
---|
1450 | // This function initialises all processors schedulers. |
---|
1451 | // This is done by processor 0, and the MMU must be activated. |
---|
1452 | // It initialises the boot_chedulers[gpid] pointers array. |
---|
1453 | // Finally, it scan all tasks in all vspaces to initialise the tasks contexts, |
---|
1454 | // as specified in the mapping_info data structure. |
---|
1455 | // For each task, a TTY channel, a TIMER channel, a FBDMA channel, and a NIC |
---|
1456 | // channel are allocated if required. |
---|
1457 | /////////////////////////////////////////////////////////////////////////////// |
---|
1458 | void boot_schedulers_init() |
---|
1459 | { |
---|
1460 | mapping_header_t* header = (mapping_header_t *) & seg_mapping_base; |
---|
1461 | mapping_cluster_t* cluster = boot_get_cluster_base(header); |
---|
1462 | mapping_vspace_t* vspace = boot_get_vspace_base(header); |
---|
1463 | mapping_task_t* task = boot_get_task_base(header); |
---|
1464 | mapping_vobj_t* vobj = boot_get_vobj_base(header); |
---|
1465 | mapping_proc_t* proc = boot_get_proc_base(header); |
---|
1466 | mapping_irq_t* irq = boot_get_irq_base(header); |
---|
1467 | |
---|
1468 | unsigned int cluster_id; // cluster index in mapping_info |
---|
1469 | unsigned int proc_id; // processor index in mapping_info |
---|
1470 | unsigned int irq_id; // irq index in mapping_info |
---|
1471 | unsigned int vspace_id; // vspace index in mapping_info |
---|
1472 | unsigned int task_id; // task index in mapping_info |
---|
1473 | |
---|
1474 | unsigned int alloc_tty_channel = 1; // TTY channel allocator |
---|
1475 | unsigned int alloc_nic_channel = 0; // NIC channel allocator |
---|
1476 | unsigned int alloc_cma_channel = 0; // CMA channel allocator |
---|
1477 | unsigned int alloc_ioc_channel = 0; // IOC channel allocator |
---|
1478 | unsigned int alloc_dma_channel[NB_CLUSTERS]; // DMA channel allocators |
---|
1479 | unsigned int alloc_tim_channel[NB_CLUSTERS]; // user TIMER allocators |
---|
1480 | |
---|
1481 | ///////////////////////////////////////////////////////////////////////// |
---|
1482 | // Step 1 : loop on the clusters and on the processors |
---|
1483 | // to initialize the schedulers[] array of pointers and |
---|
1484 | // the interrupt vectors. |
---|
1485 | // Implementation note: |
---|
1486 | // We need to use both proc_id to scan the mapping info structure, |
---|
1487 | // and lpid to access the schedulers array. |
---|
1488 | // - the boot_schedulers[] array of pointers can contain "holes", because |
---|
1489 | // it is indexed by the global pid = cluster_id*NB_PROCS_MAX + ltid |
---|
1490 | // - the mapping info array of processors is contiguous, it is indexed |
---|
1491 | // by proc_id, and use an offset specific in each cluster. |
---|
1492 | |
---|
1493 | for (cluster_id = 0; cluster_id < header->clusters; cluster_id++) |
---|
1494 | { |
---|
1495 | |
---|
1496 | #if BOOT_DEBUG_SCHED |
---|
1497 | boot_puts("\n[BOOT DEBUG] Initialise schedulers in cluster "); |
---|
1498 | boot_putd(cluster_id); |
---|
1499 | boot_puts("\n"); |
---|
1500 | #endif |
---|
1501 | |
---|
1502 | // TTY, NIC, CMA, IOC, TIM and DMA channels allocators |
---|
1503 | // - TTY[0] is reserved for the kernel |
---|
1504 | // - In all clusters the first NB_PROCS_MAX timers |
---|
1505 | // are reserved for the kernel (context switch) |
---|
1506 | |
---|
1507 | alloc_dma_channel[cluster_id] = 0; |
---|
1508 | alloc_tim_channel[cluster_id] = NB_PROCS_MAX; |
---|
1509 | |
---|
1510 | unsigned int lpid; // processor local index in cluster |
---|
1511 | unsigned int sched_vbase; // schedulers segment virtual base address |
---|
1512 | unsigned int sched_length; // schedulers segment length |
---|
1513 | unsigned int nprocs; // number of processors in cluster |
---|
1514 | |
---|
1515 | nprocs = cluster[cluster_id].procs; |
---|
1516 | |
---|
1517 | // checking processors number |
---|
1518 | if ( nprocs > NB_PROCS_MAX ) |
---|
1519 | { |
---|
1520 | boot_puts("\n[BOOT ERROR] Too much processors in cluster "); |
---|
1521 | boot_putd(cluster_id); |
---|
1522 | boot_puts("\n"); |
---|
1523 | boot_exit(); |
---|
1524 | } |
---|
1525 | |
---|
1526 | // get scheduler array virtual base address for cluster_id |
---|
1527 | boot_get_sched_vaddr( cluster_id, &sched_vbase, &sched_length ); |
---|
1528 | |
---|
1529 | // each processor scheduler requires 4 Kbytes |
---|
1530 | if ( sched_length < (nprocs<<12) ) |
---|
1531 | { |
---|
1532 | boot_puts("\n[BOOT ERROR] Schedulers segment too small in cluster "); |
---|
1533 | boot_putd(cluster_id); |
---|
1534 | boot_puts("\n"); |
---|
1535 | boot_exit(); |
---|
1536 | } |
---|
1537 | |
---|
1538 | for ( proc_id = cluster[cluster_id].proc_offset, lpid = 0 ; |
---|
1539 | proc_id < cluster[cluster_id].proc_offset + cluster[cluster_id].procs; |
---|
1540 | proc_id++, lpid++ ) |
---|
1541 | { |
---|
1542 | // set the schedulers pointers array |
---|
1543 | boot_schedulers[cluster_id * NB_PROCS_MAX + lpid] = |
---|
1544 | (static_scheduler_t*)( sched_vbase + (lpid<<12) ); |
---|
1545 | |
---|
1546 | #if BOOT_DEBUG_SCHED |
---|
1547 | boot_puts("\nProc "); |
---|
1548 | boot_putd(lpid); |
---|
1549 | boot_puts(" : scheduler virtual base address = "); |
---|
1550 | boot_putx( sched_vbase + (lpid<<12) ); |
---|
1551 | boot_puts("\n"); |
---|
1552 | #endif |
---|
1553 | // current processor scheduler pointer : psched |
---|
1554 | static_scheduler_t* psched = (static_scheduler_t*)(sched_vbase+(lpid<<12)); |
---|
1555 | |
---|
1556 | // initialise the "tasks" variable |
---|
1557 | psched->tasks = 0; |
---|
1558 | |
---|
1559 | // initialise the interrupt_vector with ISR_DEFAULT |
---|
1560 | unsigned int slot; |
---|
1561 | for (slot = 0; slot < 32; slot++) psched->interrupt_vector[slot] = 0; |
---|
1562 | |
---|
1563 | // scan the IRQs actually allocated to current processor |
---|
1564 | for (irq_id = proc[proc_id].irq_offset; |
---|
1565 | irq_id < proc[proc_id].irq_offset + proc[proc_id].irqs; |
---|
1566 | irq_id++) |
---|
1567 | { |
---|
1568 | unsigned int type = irq[irq_id].type; |
---|
1569 | unsigned int icu_id = irq[irq_id].icuid; |
---|
1570 | unsigned int isr_id = irq[irq_id].isr; |
---|
1571 | unsigned int channel = irq[irq_id].channel; |
---|
1572 | unsigned int value = isr_id | (type << 8) | (channel << 16); |
---|
1573 | psched->interrupt_vector[icu_id] = value; |
---|
1574 | |
---|
1575 | #if BOOT_DEBUG_SCHED |
---|
1576 | boot_puts("- IRQ : icu = "); |
---|
1577 | boot_putd(icu_id); |
---|
1578 | boot_puts(" / type = "); |
---|
1579 | boot_putd(type); |
---|
1580 | boot_puts(" / isr = "); |
---|
1581 | boot_putd(isr_id); |
---|
1582 | boot_puts(" / channel = "); |
---|
1583 | boot_putd(channel); |
---|
1584 | boot_puts(" => vector_entry = "); |
---|
1585 | boot_putx( value ); |
---|
1586 | boot_puts("\n"); |
---|
1587 | #endif |
---|
1588 | } |
---|
1589 | } // end for procs |
---|
1590 | } // end for clusters |
---|
1591 | |
---|
1592 | /////////////////////////////////////////////////////////////////// |
---|
1593 | // Step 2 : loop on the vspaces and the tasks |
---|
1594 | // to initialise the schedulers and the task contexts. |
---|
1595 | // Implementation note: |
---|
1596 | // This function initialises the task context for all tasks. |
---|
1597 | // For each processor, the scheduler virtual base address |
---|
1598 | // is written in the CP0_SCHED register in reset.S |
---|
1599 | |
---|
1600 | for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++) |
---|
1601 | { |
---|
1602 | |
---|
1603 | #if BOOT_DEBUG_SCHED |
---|
1604 | boot_puts("\n[BOOT DEBUG] Initialise task contexts for vspace "); |
---|
1605 | boot_puts(vspace[vspace_id].name); |
---|
1606 | boot_puts("\n"); |
---|
1607 | #endif |
---|
1608 | // We must set the PTPR depending on the vspace, because the start_vector |
---|
1609 | // and the stack address are defined in virtual space. |
---|
1610 | boot_set_mmu_ptpr( (unsigned int)(boot_ptabs_paddr[vspace_id] >> 13) ); |
---|
1611 | |
---|
1612 | // loop on the tasks in vspace (task_id is the global index) |
---|
1613 | for (task_id = vspace[vspace_id].task_offset; |
---|
1614 | task_id < (vspace[vspace_id].task_offset + vspace[vspace_id].tasks); |
---|
1615 | task_id++) |
---|
1616 | { |
---|
1617 | // compute gpid (global processor index) and scheduler base address |
---|
1618 | unsigned int gpid = task[task_id].clusterid * NB_PROCS_MAX + |
---|
1619 | task[task_id].proclocid; |
---|
1620 | static_scheduler_t* psched = boot_schedulers[gpid]; |
---|
1621 | |
---|
1622 | // ctx_ra : the return address is &boot_eret() |
---|
1623 | unsigned int ctx_ra = (unsigned int) &boot_eret; |
---|
1624 | |
---|
1625 | // ctx_sr : value required before an eret instruction |
---|
1626 | unsigned int ctx_sr = 0x0000FF13; |
---|
1627 | |
---|
1628 | // ctx_ptpr : page table physical base address (shifted by 13 bit) |
---|
1629 | unsigned int ctx_ptpr = (unsigned int)(boot_ptabs_paddr[vspace_id] >> 13); |
---|
1630 | |
---|
1631 | // ctx_ptab : page_table virtual base address |
---|
1632 | unsigned int ctx_ptab = boot_ptabs_vaddr[vspace_id]; |
---|
1633 | |
---|
1634 | // ctx_tty : terminal global index provided by the global allocator |
---|
1635 | unsigned int ctx_tty = 0xFFFFFFFF; |
---|
1636 | if (task[task_id].use_tty) |
---|
1637 | { |
---|
1638 | if (alloc_tty_channel >= NB_TTY_CHANNELS) |
---|
1639 | { |
---|
1640 | boot_puts("\n[BOOT ERROR] TTY index too large for task "); |
---|
1641 | boot_puts(task[task_id].name); |
---|
1642 | boot_puts(" in vspace "); |
---|
1643 | boot_puts(vspace[vspace_id].name); |
---|
1644 | boot_puts("\n"); |
---|
1645 | boot_exit(); |
---|
1646 | } |
---|
1647 | ctx_tty = alloc_tty_channel; |
---|
1648 | alloc_tty_channel++; |
---|
1649 | } |
---|
1650 | // ctx_nic : NIC channel global index provided by the global allocator |
---|
1651 | unsigned int ctx_nic = 0xFFFFFFFF; |
---|
1652 | if (task[task_id].use_nic) |
---|
1653 | { |
---|
1654 | if (alloc_nic_channel >= NB_NIC_CHANNELS) |
---|
1655 | { |
---|
1656 | boot_puts("\n[BOOT ERROR] NIC channel index too large for task "); |
---|
1657 | boot_puts(task[task_id].name); |
---|
1658 | boot_puts(" in vspace "); |
---|
1659 | boot_puts(vspace[vspace_id].name); |
---|
1660 | boot_puts("\n"); |
---|
1661 | boot_exit(); |
---|
1662 | } |
---|
1663 | ctx_nic = alloc_nic_channel; |
---|
1664 | alloc_nic_channel++; |
---|
1665 | } |
---|
1666 | // ctx_cma : CMA channel global index provided by the global allocator |
---|
1667 | unsigned int ctx_cma = 0xFFFFFFFF; |
---|
1668 | if (task[task_id].use_cma) |
---|
1669 | { |
---|
1670 | if (alloc_cma_channel >= NB_CMA_CHANNELS) |
---|
1671 | { |
---|
1672 | boot_puts("\n[BOOT ERROR] CMA channel index too large for task "); |
---|
1673 | boot_puts(task[task_id].name); |
---|
1674 | boot_puts(" in vspace "); |
---|
1675 | boot_puts(vspace[vspace_id].name); |
---|
1676 | boot_puts("\n"); |
---|
1677 | boot_exit(); |
---|
1678 | } |
---|
1679 | ctx_cma = alloc_cma_channel; |
---|
1680 | alloc_cma_channel++; |
---|
1681 | } |
---|
1682 | // ctx_ioc : IOC channel global index provided by the global allocator |
---|
1683 | unsigned int ctx_ioc = 0xFFFFFFFF; |
---|
1684 | if (task[task_id].use_ioc) |
---|
1685 | { |
---|
1686 | if (alloc_ioc_channel >= NB_IOC_CHANNELS) |
---|
1687 | { |
---|
1688 | boot_puts("\n[BOOT ERROR] IOC channel index too large for task "); |
---|
1689 | boot_puts(task[task_id].name); |
---|
1690 | boot_puts(" in vspace "); |
---|
1691 | boot_puts(vspace[vspace_id].name); |
---|
1692 | boot_puts("\n"); |
---|
1693 | boot_exit(); |
---|
1694 | } |
---|
1695 | ctx_ioc = alloc_ioc_channel; |
---|
1696 | alloc_ioc_channel++; |
---|
1697 | } |
---|
1698 | // ctx_tim : TIMER local channel index provided by the cluster allocator |
---|
1699 | unsigned int ctx_tim = 0xFFFFFFFF; |
---|
1700 | if (task[task_id].use_tim) |
---|
1701 | { |
---|
1702 | unsigned int cluster_id = task[task_id].clusterid; |
---|
1703 | |
---|
1704 | if ( alloc_tim_channel[cluster_id] >= NB_TIM_CHANNELS ) |
---|
1705 | { |
---|
1706 | boot_puts("\n[BOOT ERROR] local TIMER index too large for task "); |
---|
1707 | boot_puts(task[task_id].name); |
---|
1708 | boot_puts(" in vspace "); |
---|
1709 | boot_puts(vspace[vspace_id].name); |
---|
1710 | boot_puts("\n"); |
---|
1711 | boot_exit(); |
---|
1712 | } |
---|
1713 | |
---|
1714 | // checking that there is a well defined ISR_TIMER installed |
---|
1715 | unsigned int found = 0; |
---|
1716 | for ( irq_id = 0 ; irq_id < 32 ; irq_id++ ) |
---|
1717 | { |
---|
1718 | unsigned int entry = psched->interrupt_vector[irq_id]; |
---|
1719 | unsigned int isr = entry & 0x000000FF; |
---|
1720 | unsigned int channel = entry>>16; |
---|
1721 | if ( (isr == ISR_TIMER) && (channel == alloc_tim_channel[cluster_id]) ) |
---|
1722 | { |
---|
1723 | found = 1; |
---|
1724 | ctx_tim = alloc_tim_channel[cluster_id]; |
---|
1725 | alloc_tim_channel[cluster_id]++; |
---|
1726 | break; |
---|
1727 | } |
---|
1728 | } |
---|
1729 | if (!found) |
---|
1730 | { |
---|
1731 | boot_puts("\n[BOOT ERROR] No ISR_TIMER installed for task "); |
---|
1732 | boot_puts(task[task_id].name); |
---|
1733 | boot_puts(" in vspace "); |
---|
1734 | boot_puts(vspace[vspace_id].name); |
---|
1735 | boot_puts("\n"); |
---|
1736 | boot_exit(); |
---|
1737 | } |
---|
1738 | } |
---|
1739 | // ctx_dma : the local channel index is defined by the cluster allocator |
---|
1740 | // but the ctx_dma value is a global index |
---|
1741 | unsigned int ctx_dma = 0xFFFFFFFF; |
---|
1742 | if ( task[task_id].use_dma ) |
---|
1743 | { |
---|
1744 | unsigned int cluster_id = task[task_id].clusterid; |
---|
1745 | |
---|
1746 | if (alloc_dma_channel[cluster_id] >= NB_DMA_CHANNELS) |
---|
1747 | { |
---|
1748 | boot_puts("\n[BOOT ERROR] local DMA index too large for task "); |
---|
1749 | boot_puts(task[task_id].name); |
---|
1750 | boot_puts(" in vspace "); |
---|
1751 | boot_puts(vspace[vspace_id].name); |
---|
1752 | boot_puts("\n"); |
---|
1753 | boot_exit(); |
---|
1754 | } |
---|
1755 | ctx_dma = cluster_id * NB_DMA_CHANNELS + alloc_dma_channel[cluster_id]; |
---|
1756 | alloc_dma_channel[cluster_id]++; |
---|
1757 | } |
---|
1758 | // ctx_epc : Get the virtual address of the start function |
---|
1759 | mapping_vobj_t* pvobj = &vobj[vspace[vspace_id].vobj_offset + |
---|
1760 | vspace[vspace_id].start_offset]; |
---|
1761 | unsigned int* start_vector_vbase = (unsigned int *) pvobj->vaddr; |
---|
1762 | unsigned int ctx_epc = start_vector_vbase[task[task_id].startid]; |
---|
1763 | |
---|
1764 | // ctx_sp : Get the vobj containing the stack |
---|
1765 | unsigned int vobj_id = task[task_id].stack_vobjid + vspace[vspace_id].vobj_offset; |
---|
1766 | unsigned int ctx_sp = vobj[vobj_id].vaddr + vobj[vobj_id].length; |
---|
1767 | |
---|
1768 | // get local task index in scheduler |
---|
1769 | unsigned int ltid = psched->tasks; |
---|
1770 | |
---|
1771 | if (ltid >= IDLE_TASK_INDEX) |
---|
1772 | { |
---|
1773 | boot_puts("\n[BOOT ERROR] : "); |
---|
1774 | boot_putd(ltid); |
---|
1775 | boot_puts(" tasks allocated to processor "); |
---|
1776 | boot_putd(gpid); |
---|
1777 | boot_puts(" / max is 15\n"); |
---|
1778 | boot_exit(); |
---|
1779 | } |
---|
1780 | // update the "tasks" field in scheduler |
---|
1781 | psched->tasks = ltid + 1; |
---|
1782 | |
---|
1783 | // update the "current" field in scheduler |
---|
1784 | psched->current = 0; |
---|
1785 | |
---|
1786 | // initializes the task context in scheduler |
---|
1787 | psched->context[ltid][CTX_SR_ID] = ctx_sr; |
---|
1788 | psched->context[ltid][CTX_SP_ID] = ctx_sp; |
---|
1789 | psched->context[ltid][CTX_RA_ID] = ctx_ra; |
---|
1790 | psched->context[ltid][CTX_EPC_ID] = ctx_epc; |
---|
1791 | psched->context[ltid][CTX_PTPR_ID] = ctx_ptpr; |
---|
1792 | psched->context[ltid][CTX_TTY_ID] = ctx_tty; |
---|
1793 | psched->context[ltid][CTX_CMA_ID] = ctx_cma; |
---|
1794 | psched->context[ltid][CTX_IOC_ID] = ctx_ioc; |
---|
1795 | psched->context[ltid][CTX_NIC_ID] = ctx_nic; |
---|
1796 | psched->context[ltid][CTX_TIM_ID] = ctx_tim; |
---|
1797 | psched->context[ltid][CTX_DMA_ID] = ctx_dma; |
---|
1798 | psched->context[ltid][CTX_PTAB_ID] = ctx_ptab; |
---|
1799 | psched->context[ltid][CTX_LTID_ID] = ltid; |
---|
1800 | psched->context[ltid][CTX_GTID_ID] = task_id; |
---|
1801 | psched->context[ltid][CTX_VSID_ID] = vspace_id; |
---|
1802 | psched->context[ltid][CTX_RUN_ID] = 1; |
---|
1803 | |
---|
1804 | #if BOOT_DEBUG_SCHED |
---|
1805 | boot_puts("\nTask "); |
---|
1806 | boot_puts(task[task_id].name); |
---|
1807 | boot_puts(" ("); |
---|
1808 | boot_putd(task_id); |
---|
1809 | boot_puts(") allocated to processor "); |
---|
1810 | boot_putd(gpid); |
---|
1811 | boot_puts("\n - ctx[LTID] = "); |
---|
1812 | boot_putd(ltid); |
---|
1813 | boot_puts("\n - ctx[SR] = "); |
---|
1814 | boot_putx(ctx_sr); |
---|
1815 | boot_puts("\n - ctx[SR] = "); |
---|
1816 | boot_putx(ctx_sp); |
---|
1817 | boot_puts("\n - ctx[RA] = "); |
---|
1818 | boot_putx(ctx_ra); |
---|
1819 | boot_puts("\n - ctx[EPC] = "); |
---|
1820 | boot_putx(ctx_epc); |
---|
1821 | boot_puts("\n - ctx[PTPR] = "); |
---|
1822 | boot_putx(ctx_ptpr); |
---|
1823 | boot_puts("\n - ctx[TTY] = "); |
---|
1824 | boot_putd(ctx_tty); |
---|
1825 | boot_puts("\n - ctx[NIC] = "); |
---|
1826 | boot_putd(ctx_nic); |
---|
1827 | boot_puts("\n - ctx[CMA] = "); |
---|
1828 | boot_putd(ctx_cma); |
---|
1829 | boot_puts("\n - ctx[IOC] = "); |
---|
1830 | boot_putd(ctx_ioc); |
---|
1831 | boot_puts("\n - ctx[TIM] = "); |
---|
1832 | boot_putd(ctx_tim); |
---|
1833 | boot_puts("\n - ctx[DMA] = "); |
---|
1834 | boot_putd(ctx_dma); |
---|
1835 | boot_puts("\n - ctx[PTAB] = "); |
---|
1836 | boot_putx(ctx_ptab); |
---|
1837 | boot_puts("\n - ctx[GTID] = "); |
---|
1838 | boot_putd(task_id); |
---|
1839 | boot_puts("\n - ctx[VSID] = "); |
---|
1840 | boot_putd(vspace_id); |
---|
1841 | boot_puts("\n"); |
---|
1842 | #endif |
---|
1843 | |
---|
1844 | } // end loop on tasks |
---|
1845 | } // end loop on vspaces |
---|
1846 | } // end boot_schedulers_init() |
---|
1847 | |
---|
1848 | |
---|
1849 | ////////////////////////////////////////////////////////////////////////////////// |
---|
1850 | // This function is executed by P[0] to wakeup all processors. |
---|
1851 | ////////////////////////////////////////////////////////////////////////////////// |
---|
1852 | void boot_start_all_procs() |
---|
1853 | { |
---|
1854 | mapping_header_t * header = (mapping_header_t *) &seg_mapping_base; |
---|
1855 | header->signature = OUT_MAPPING_SIGNATURE; |
---|
1856 | } |
---|
1857 | |
---|
1858 | |
---|
1859 | ///////////////////////////////////////////////////////////////////// |
---|
1860 | // This function is the entry point of the initialisation procedure |
---|
1861 | ///////////////////////////////////////////////////////////////////// |
---|
1862 | void boot_init() { |
---|
1863 | |
---|
1864 | // mapping_info checking |
---|
1865 | boot_check_mapping(); |
---|
1866 | |
---|
1867 | boot_puts("\n[BOOT] Mapping check completed at cycle "); |
---|
1868 | boot_putd(boot_proctime()); |
---|
1869 | boot_puts("\n"); |
---|
1870 | |
---|
1871 | // pseg allocators initialisation |
---|
1872 | boot_psegs_init(); |
---|
1873 | |
---|
1874 | boot_puts("\n[BOOT] Pseg allocators initialisation completed at cycle "); |
---|
1875 | boot_putd(boot_proctime()); |
---|
1876 | boot_puts("\n"); |
---|
1877 | |
---|
1878 | // page table building |
---|
1879 | boot_pt_init(); |
---|
1880 | |
---|
1881 | boot_puts("\n[BOOT] Page Tables initialisation completed at cycle "); |
---|
1882 | boot_putd(boot_proctime()); |
---|
1883 | boot_puts("\n"); |
---|
1884 | |
---|
1885 | // mmu activation ( with page table [Ã] ) |
---|
1886 | boot_set_mmu_ptpr( (unsigned int)(boot_ptabs_paddr[0] >> 13) ); |
---|
1887 | boot_set_mmu_mode(0xF); |
---|
1888 | |
---|
1889 | boot_puts("\n[BOOT] Proc 0 MMU activation at cycle "); |
---|
1890 | boot_putd(boot_proctime()); |
---|
1891 | boot_puts("\n"); |
---|
1892 | |
---|
1893 | // vobjs initialisation |
---|
1894 | boot_vobjs_init(); |
---|
1895 | |
---|
1896 | boot_puts("\n[BOOT] Vobjs initialisation completed at cycle : "); |
---|
1897 | boot_putd(boot_proctime()); |
---|
1898 | boot_puts("\n"); |
---|
1899 | |
---|
1900 | // peripherals initialisation |
---|
1901 | boot_peripherals_init(); |
---|
1902 | |
---|
1903 | boot_puts("\n[BOOT] Peripherals initialisation completed at cycle "); |
---|
1904 | boot_putd(boot_proctime()); |
---|
1905 | boot_puts("\n"); |
---|
1906 | |
---|
1907 | // schedulers initialisation |
---|
1908 | boot_schedulers_init(); |
---|
1909 | |
---|
1910 | boot_puts("\n[BOOT] Schedulers initialisation completed at cycle "); |
---|
1911 | boot_putd(boot_proctime()); |
---|
1912 | boot_puts("\n"); |
---|
1913 | |
---|
1914 | // start all processors |
---|
1915 | boot_start_all_procs(); |
---|
1916 | |
---|
1917 | } // end boot_init() |
---|
1918 | |
---|
1919 | |
---|
1920 | // Local Variables: |
---|
1921 | // tab-width: 4 |
---|
1922 | // c-basic-offset: 4 |
---|
1923 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
---|
1924 | // indent-tabs-mode: nil |
---|
1925 | // End: |
---|
1926 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
---|
1927 | |
---|