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source: soft/giet_vm/giet_boot/boot.c @ 731

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1	///////////////////////////////////////////////////////////////////////////////////
2	// File : boot.c
3	// Date : 01/11/2013
4	// Author : alain greiner
5	// Copyright (c) UPMC-LIP6
6	///////////////////////////////////////////////////////////////////////////////////
7	// The boot.c file contains the bootloader for the GIET-VM static OS.
8	//
9	// This code has been written for the MIPS32 processor.
10	// The virtual adresses are on 32 bits and use the (unsigned int) type. The
11	// physicals addresses can have up to 40 bits, and use type (unsigned long long).
12	// It natively supports clusterised shared memory multi-processors architectures,
13	// where each processor is identified by a composite index [x,y,p],
14	// and where there is one physical memory bank per cluster.
15	//
16	// The boot.elf file is stored on disk and is loaded into memory by proc[0,0,0],
17	// executing the generic preloader (stored in ROM). The boot-loader code itself
18	// is executed in parallel by all proc[x,y,0], and performs the following tasks:
19	// - load into memory various binary files, from a FAT32 file system.
20	// - build the various page tables (one page table per vspace).
21	// - initialize the shedulers (one scheduler per processor).
22	//
23	// 1) The binary files to be loaded are:
24	// - the "map.bin" file contains the hardware architecture description,
25	// the set of user applications that will be mapped on the architecture,
26	// and the mapping directives. The mapping includes the placement of threads
27	// on processors, and the placement of virtual segments on the physical
28	// segments. It is stored in the the seg_boot_mapping segment
29	// (at address SEG_BOOT_MAPPING_BASE defined in hard_config.h file).
30	// - the "kernel.elf" file contains the kernel binary code and data.
31	// - the various "application.elf" files.
32	//
33	// 2) The GIET-VM uses the paged virtual memory to provides two services:
34	// - classical memory protection, when several independant applications compiled
35	// in different virtual spaces are executing on the same hardware platform.
36	// - data placement in NUMA architectures, to control the placement
37	// of the software objects (vsegs) on the physical memory banks (psegs).
38	// The max number of vspaces (GIET_NB_VSPACE_MAX) is a configuration parameter.
39	// The page tables are statically build in the boot phase, and they do not
40	// change during execution.
41	// For each application, the page tables are replicated in all clusters.
42	// The GIET_VM uses both small pages (4 Kbytes), and big pages (2 Mbytes).
43	// Each page table (one page table per virtual space) is monolithic, and
44	// contains one PT1 (8 Kbytes) and a variable number of PT2s (4 Kbytes each).
45	// For each vspace, the max number of PT2s is defined by the size of the PTAB
46	// vseg in the mapping.
47	// The PT1 is indexed by the ix1 field (11 bits) of the VPN. An entry is 32 bits.
48	// A PT2 is indexed the ix2 field (9 bits) of the VPN. An entry is 64 bits.
49	// The first word contains the flags, the second word contains the PPN.
50	//
51	// 3) The Giet-VM implement one private scheduler per processor.
52	// For each application, the threads are statically allocated to processors
53	// and there is no thread migration during execution.
54	// Each sheduler occupies 8K bytes, and contains up to 14 thread contexts
55	// The thread context [13] is reserved for the "idle" thread that does nothing,
56	// and is launched by the scheduler when there is no other runable thread.
57	///////////////////////////////////////////////////////////////////////////////////
58	// Implementation Notes:
59	//
60	// 1) The cluster_id variable is a linear index in the mapping_info array.
61	// The cluster_xy variable is the tological index = x << Y_WIDTH + y
62	//
63	// 2) We set the _tty0_boot_mode variable to force the _printf() function to use
64	// the tty0_spin_lock for exclusive access to TTY0.
65	///////////////////////////////////////////////////////////////////////////////////
66
67	#include <giet_config.h>
68	#include <hard_config.h>
69	#include <mapping_info.h>
70	#include <kernel_malloc.h>
71	#include <memspace.h>
72	#include <tty_driver.h>
73	#include <xcu_driver.h>
74	#include <bdv_driver.h>
75	#include <hba_driver.h>
76	#include <sdc_driver.h>
77	#include <cma_driver.h>
78	#include <nic_driver.h>
79	#include <iob_driver.h>
80	#include <pic_driver.h>
81	#include <mwr_driver.h>
82	#include <dma_driver.h>
83	#include <mmc_driver.h>
84	#include <ctx_handler.h>
85	#include <irq_handler.h>
86	#include <vmem.h>
87	#include <pmem.h>
88	#include <utils.h>
89	#include <tty0.h>
90	#include <kernel_locks.h>
91	#include <kernel_barriers.h>
92	#include <elf-types.h>
93	#include <fat32.h>
94	#include <mips32_registers.h>
95	#include <stdarg.h>
96
97	#if !defined(X_SIZE)
98	# error: The X_SIZE value must be defined in the 'hard_config.h' file !
99	#endif
100
101	#if !defined(Y_SIZE)
102	# error: The Y_SIZE value must be defined in the 'hard_config.h' file !
103	#endif
104
105	#if !defined(X_WIDTH)
106	# error: The X_WIDTH value must be defined in the 'hard_config.h' file !
107	#endif
108
109	#if !defined(Y_WIDTH)
110	# error: The Y_WIDTH value must be defined in the 'hard_config.h' file !
111	#endif
112
113	#if !defined(SEG_BOOT_MAPPING_BASE)
114	# error: The SEG_BOOT_MAPPING_BASE value must be defined in the hard_config.h file !
115	#endif
116
117	#if !defined(NB_PROCS_MAX)
118	# error: The NB_PROCS_MAX value must be defined in the 'hard_config.h' file !
119	#endif
120
121	#if !defined(GIET_NB_VSPACE_MAX)
122	# error: The GIET_NB_VSPACE_MAX value must be defined in the 'giet_config.h' file !
123	#endif
124
125	#if !defined(GIET_ELF_BUFFER_SIZE)
126	# error: The GIET_ELF_BUFFER_SIZE value must be defined in the giet_config.h file !
127	#endif
128
129	////////////////////////////////////////////////////////////////////////////
130	// Global variables for boot code
131	////////////////////////////////////////////////////////////////////////////
132
133	// Temporaty buffer used to load one complete .elf file
134	__attribute__((section(".kdata")))
135	unsigned char _boot_elf_buffer[GIET_ELF_BUFFER_SIZE] __attribute__((aligned(64)));
136
137	// Physical memory allocators array (one per cluster)
138	__attribute__((section(".kdata")))
139	pmem_alloc_t boot_pmem_alloc[X_SIZE][Y_SIZE];
140
141	// Schedulers virtual base addresses array (one per processor)
142	__attribute__((section(".kdata")))
143	static_scheduler_t* _schedulers[X_SIZE][Y_SIZE][NB_PROCS_MAX];
144
145	// Page tables virtual base addresses (one per vspace and per cluster)
146	__attribute__((section(".kdata")))
147	unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX][X_SIZE][Y_SIZE];
148
149	// Page tables physical base addresses (one per vspace and per cluster)
150	__attribute__((section(".kdata")))
151	paddr_t _ptabs_paddr[GIET_NB_VSPACE_MAX][X_SIZE][Y_SIZE];
152
153	// Page tables pt2 allocators (one per vspace and per cluster)
154	__attribute__((section(".kdata")))
155	unsigned int _ptabs_next_pt2[GIET_NB_VSPACE_MAX][X_SIZE][Y_SIZE];
156
157	// Page tables max_pt2 (same value for all page tables)
158	__attribute__((section(".kdata")))
159	unsigned int _ptabs_max_pt2;
160
161	// boot code uses a spin lock to protect TTY0
162	__attribute__((section(".kdata")))
163	unsigned int _tty0_boot_mode = 1;
164
165	// boot code does not uses a lock to protect HBA command list
166	__attribute__((section(".kdata")))
167	unsigned int _hba_boot_mode = 1;
168
169	// required for concurrent PTAB building
170	__attribute__((section(".kdata")))
171	spin_lock_t _ptabs_spin_lock[GIET_NB_VSPACE_MAX][X_SIZE][Y_SIZE];
172
173	// barrier used by boot code for parallel execution
174	__attribute__((section(".kdata")))
175	simple_barrier_t _barrier_all_clusters;
176
177	//////////////////////////////////////////////////////////////////////////////
178	// Extern variables
179	//////////////////////////////////////////////////////////////////////////////
180
181	// this variable is allocated in the tty0.c file
182	extern spin_lock_t _tty0_spin_lock;
183
184	// this variable is allocated in the mmc_driver.c
185	extern unsigned int _mmc_boot_mode;
186
187	// these variables are allocated in the bdv_driver.c file
188	extern spin_lock_t _bdv_lock __attribute__((aligned(64)));
189	extern unsigned int _bdv_trdid;
190	extern unsigned int _bdv_status;
191
192	extern void boot_entry();
193
194	//////////////////////////////////////////////////////////////////////////////
195	// This function registers a new PTE1 in the page table defined
196	// by the vspace_id argument, and the (x,y) coordinates.
197	// It updates only the first level PT1.
198	// As each vseg is mapped by a different processor, the PT1 entry cannot
199	// be concurrently accessed, and we don't need to take any lock.
200	//////////////////////////////////////////////////////////////////////////////
201	void boot_add_pte1( unsigned int vspace_id,
202	unsigned int x,
203	unsigned int y,
204	unsigned int vpn, // 20 bits right-justified
205	unsigned int flags, // 10 bits left-justified
206	unsigned int ppn ) // 28 bits right-justified
207	{
208	// compute index in PT1
209	unsigned int ix1 = vpn >> 9; // 11 bits for ix1
210
211	// get page table physical base address
212	paddr_t pt1_pbase = _ptabs_paddr[vspace_id][x][y];
213
214	if ( pt1_pbase == 0 )
215	{
216	_printf("\n[BOOT ERROR] in boot_add_pte1() : no PTAB in cluster[%d,%d]"
217	" containing processors\n", x , y );
218	_exit();
219	}
220
221	// compute pte1 : 2 bits V T / 8 bits flags / 3 bits RSVD / 19 bits bppi
222	unsigned int pte1 = PTE_V \|
223	(flags & 0x3FC00000) \|
224	((ppn>>9) & 0x0007FFFF);
225
226	// write pte1 in PT1
227	_physical_write( pt1_pbase + 4*ix1, pte1 );
228
229	asm volatile ("sync");
230
231	} // end boot_add_pte1()
232
233	//////////////////////////////////////////////////////////////////////////////
234	// This function registers a new PTE2 in the page table defined
235	// by the vspace_id argument, and the (x,y) coordinates.
236	// It updates both the first level PT1 and the second level PT2.
237	// As the set of PT2s is implemented as a fixed size array (no dynamic
238	// allocation), this function checks a possible overflow of the PT2 array.
239	// As a given entry in PT1 can be shared by several vsegs, mapped by
240	// different processors, we need to take the lock protecting PTAB[v][x]y].
241	//////////////////////////////////////////////////////////////////////////////
242	void boot_add_pte2( unsigned int vspace_id,
243	unsigned int x,
244	unsigned int y,
245	unsigned int vpn, // 20 bits right-justified
246	unsigned int flags, // 10 bits left-justified
247	unsigned int ppn ) // 28 bits right-justified
248	{
249	unsigned int ix1;
250	unsigned int ix2;
251	paddr_t pt2_pbase; // PT2 physical base address
252	paddr_t pte2_paddr; // PTE2 physical address
253	unsigned int pt2_id; // PT2 index
254	unsigned int ptd; // PTD : entry in PT1
255
256	ix1 = vpn >> 9; // 11 bits for ix1
257	ix2 = vpn & 0x1FF; // 9 bits for ix2
258
259	// get page table physical base address
260	paddr_t pt1_pbase = _ptabs_paddr[vspace_id][x][y];
261
262	if ( pt1_pbase == 0 )
263	{
264	_printf("\n[BOOT ERROR] in boot_add_pte2() : no PTAB for vspace %d "
265	"in cluster[%d,%d]\n", vspace_id , x , y );
266	_exit();
267	}
268
269	// get lock protecting PTAB[vspace_id][x][y]
270	_spin_lock_acquire( &_ptabs_spin_lock[vspace_id][x][y] );
271
272	// get ptd in PT1
273	ptd = _physical_read( pt1_pbase + 4 * ix1 );
274
275	if ((ptd & PTE_V) == 0) // undefined PTD: compute PT2 base address,
276	// and set a new PTD in PT1
277	{
278	// get a new pt2_id
279	pt2_id = _ptabs_next_pt2[vspace_id][x][y];
280	_ptabs_next_pt2[vspace_id][x][y] = pt2_id + 1;
281
282	// check overflow
283	if (pt2_id == _ptabs_max_pt2)
284	{
285	_printf("\n[BOOT ERROR] in boot_add_pte2() : PTAB[%d,%d,%d]"
286	" contains not enough PT2s\n", vspace_id, x, y );
287	_exit();
288	}
289
290	pt2_pbase = pt1_pbase + PT1_SIZE + PT2_SIZE * pt2_id;
291	ptd = PTE_V \| PTE_T \| (unsigned int) (pt2_pbase >> 12);
292
293	// set PTD into PT1
294	_physical_write( pt1_pbase + 4*ix1, ptd);
295	}
296	else // valid PTD: compute PT2 base address
297	{
298	pt2_pbase = ((paddr_t)(ptd & 0x0FFFFFFF)) << 12;
299	}
300
301	// set PTE in PT2 : flags & PPN in two 32 bits words
302	pte2_paddr = pt2_pbase + 8 * ix2;
303	_physical_write(pte2_paddr , (PTE_V \| flags) );
304	_physical_write(pte2_paddr + 4 , ppn );
305
306	// release lock protecting PTAB[vspace_id][x][y]
307	_spin_lock_release( &_ptabs_spin_lock[vspace_id][x][y] );
308
309	asm volatile ("sync");
310
311	} // end boot_add_pte2()
312
313	////////////////////////////////////////////////////////////////////////////////////
314	// Align the value of paddr or vaddr to the required alignement,
315	// defined by alignPow2 == L2(alignement).
316	////////////////////////////////////////////////////////////////////////////////////
317	paddr_t paddr_align_to( paddr_t paddr, unsigned int alignPow2 )
318	{
319	paddr_t mask = (1 << alignPow2) - 1;
320	return ((paddr + mask) & ~mask);
321	}
322
323	unsigned int vaddr_align_to( unsigned int vaddr, unsigned int alignPow2 )
324	{
325	unsigned int mask = (1 << alignPow2) - 1;
326	return ((vaddr + mask) & ~mask);
327	}
328
329	/////////////////////////////////////////////////////////////////////////////////////
330	// This function map a vseg identified by the vseg pointer.
331	//
332	// A given vseg can be mapped in a Big Physical Pages (BPP: 2 Mbytes) or in a
333	// Small Physical Pages (SPP: 4 Kbytes), depending on the "big" attribute of vseg,
334	// with the following rules:
335	// - SPP : There is only one vseg in a small physical page, but a single vseg
336	// can cover several contiguous small physical pages.
337	// - BPP : It can exist several vsegs in a single big physical page, and a single
338	// vseg can cover several contiguous big physical pages.
339	//
340	// 1) First step: it computes various vseg attributes and checks
341	// alignment constraints.
342	//
343	// 2) Second step: it allocates the required number of contiguous physical pages,
344	// computes the physical base address (if the vseg is not identity mapping),
345	// and register it in the vseg pbase field.
346	// Only the vsegs used by the boot code and the peripheral vsegs
347	// can be identity mapping. The first big physical page in cluster[0,0]
348	// is reserved for the boot vsegs.
349	//
350	// 3) Third step (only for vseg that have the VSEG_TYPE_PTAB): the M page tables
351	// associated to the M vspaces must be packed in the same vseg.
352	// We divide this vseg in M sub-segments, and compute the vbase and pbase
353	// addresses for M page tables, and register these addresses in the _ptabs_paddr
354	// and _ptabs_vaddr arrays.
355	//
356	/////////////////////////////////////////////////////////////////////////////////////
357	void boot_vseg_map( mapping_vseg_t* vseg,
358	unsigned int vspace_id )
359	{
360	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
361	mapping_cluster_t* cluster = _get_cluster_base(header);
362	mapping_pseg_t* pseg = _get_pseg_base(header);
363
364	//////////// First step : compute vseg attributes
365
366	// compute destination cluster pointer & coordinates
367	pseg = pseg + vseg->psegid;
368	cluster = cluster + pseg->clusterid;
369	unsigned int x_dest = cluster->x;
370	unsigned int y_dest = cluster->y;
371
372	// compute the "big" vseg attribute
373	unsigned int big = vseg->big;
374
375	// all vsegs must be aligned on 4Kbytes
376	if ( vseg->vbase & 0x00000FFF )
377	{
378	_printf("\n[BOOT ERROR] vseg %s not aligned : vbase = %x\n",
379	vseg->name, vseg->vbase );
380	_exit();
381	}
382
383	// compute the "is_ram" vseg attribute
384	unsigned int is_ram;
385	if ( pseg->type == PSEG_TYPE_RAM ) is_ram = 1;
386	else is_ram = 0;
387
388	// compute the "is_ptab" attribute
389	unsigned int is_ptab;
390	if ( vseg->type == VSEG_TYPE_PTAB ) is_ptab = 1;
391	else is_ptab = 0;
392
393	// compute actual vspace index
394	unsigned int vsid;
395	if ( vspace_id == 0xFFFFFFFF ) vsid = 0;
396	else vsid = vspace_id;
397
398	//////////// Second step : compute ppn and npages
399	//////////// - if identity mapping : ppn <= vpn
400	//////////// - if vseg is periph : ppn <= pseg.base >> 12
401	//////////// - if vseg is ram : ppn <= physical memory allocator
402
403	unsigned int ppn; // first physical page index (28 bits = \|x\|y\|bppi\|sppi\|)
404	unsigned int vpn; // first virtual page index (20 bits = \|ix1\|ix2\|)
405	unsigned int vpn_max; // last virtual page index (20 bits = \|ix1\|ix2\|)
406
407	vpn = vseg->vbase >> 12;
408	vpn_max = (vseg->vbase + vseg->length - 1) >> 12;
409
410	// compute npages
411	unsigned int npages; // number of required (big or small) pages
412	if ( big == 0 ) npages = vpn_max - vpn + 1; // number of small pages
413	else npages = (vpn_max>>9) - (vpn>>9) + 1; // number of big pages
414
415	// compute ppn
416	if ( vseg->ident ) // identity mapping
417	{
418	ppn = vpn;
419	}
420	else // not identity mapping
421	{
422	if ( is_ram ) // RAM : physical memory allocation required
423	{
424	// compute pointer on physical memory allocator in dest cluster
425	pmem_alloc_t* palloc = &boot_pmem_alloc[x_dest][y_dest];
426
427	if ( big == 0 ) // SPP : small physical pages
428	{
429	// allocate contiguous small physical pages
430	ppn = _get_small_ppn( palloc, npages );
431	}
432	else // BPP : big physical pages
433	{
434
435	// one big page can be shared by several vsegs
436	// we must chek if BPP already allocated
437	if ( is_ptab ) // It cannot be mapped
438	{
439	ppn = _get_big_ppn( palloc, npages );
440	}
441	else // It can be mapped
442	{
443	unsigned int ix1 = vpn >> 9; // 11 bits
444	paddr_t paddr = _ptabs_paddr[vsid][x_dest][y_dest] + (ix1<<2);
445	unsigned int pte1 = _physical_read( paddr );
446
447	if ( (pte1 & PTE_V) == 0 ) // BPP not allocated yet
448	{
449	// allocate contiguous big physical pages
450	ppn = _get_big_ppn( palloc, npages );
451	}
452	else // BPP already allocated
453	{
454	// test if new vseg has the same mode bits than
455	// the other vsegs in the same big page
456	unsigned int pte1_mode = 0;
457	if (pte1 & PTE_C) pte1_mode \|= C_MODE_MASK;
458	if (pte1 & PTE_X) pte1_mode \|= X_MODE_MASK;
459	if (pte1 & PTE_W) pte1_mode \|= W_MODE_MASK;
460	if (pte1 & PTE_U) pte1_mode \|= U_MODE_MASK;
461	if (vseg->mode != pte1_mode)
462	{
463	_printf("\n[BOOT ERROR] in boot_vseg_map() : "
464	"vseg %s has different flags than another vseg "
465	"in the same BPP\n", vseg->name );
466	_exit();
467	}
468	ppn = ((pte1 << 9) & 0x0FFFFE00);
469	}
470	}
471	ppn = ppn \| (vpn & 0x1FF);
472	}
473	}
474	else // PERI : no memory allocation required
475	{
476	ppn = pseg->base >> 12;
477	}
478	}
479
480	// update vseg.pbase field and update vsegs chaining
481	vseg->pbase = ((paddr_t)ppn) << 12;
482	vseg->mapped = 1;
483
484
485	//////////// Third step : (only if the vseg is a page table)
486	//////////// - compute the physical & virtual base address for each vspace
487	//////////// by dividing the vseg in several sub-segments.
488	//////////// - register it in _ptabs_vaddr & _ptabs_paddr arrays,
489	//////////// and initialize next_pt2 allocators.
490	//////////// - reset all entries in first level page tables
491
492	if ( is_ptab )
493	{
494	unsigned int vs; // vspace index
495	unsigned int nspaces; // number of vspaces
496	unsigned int nsp; // number of small pages for one PTAB
497	unsigned int offset; // address offset for current PTAB
498
499	nspaces = header->vspaces;
500	offset = 0;
501
502	// each PTAB must be aligned on a 8 Kbytes boundary
503	nsp = ( vseg->length >> 12 ) / nspaces;
504	if ( (nsp & 0x1) == 0x1 ) nsp = nsp - 1;
505
506	// compute max_pt2
507	_ptabs_max_pt2 = ((nsp<<12) - PT1_SIZE) / PT2_SIZE;
508
509	for ( vs = 0 ; vs < nspaces ; vs++ )
510	{
511	_ptabs_vaddr [vs][x_dest][y_dest] = (vpn + offset) << 12;
512	_ptabs_paddr [vs][x_dest][y_dest] = ((paddr_t)(ppn + offset)) << 12;
513	_ptabs_next_pt2[vs][x_dest][y_dest] = 0;
514	offset += nsp;
515
516	// reset all entries in PT1 (8 Kbytes)
517	_physical_memset( _ptabs_paddr[vs][x_dest][y_dest], PT1_SIZE, 0 );
518	}
519	}
520
521	asm volatile ("sync");
522
523	#if BOOT_DEBUG_PT
524	if ( big )
525	_printf("\n[BOOT] vseg %s : cluster[%d,%d] / "
526	"vbase = %x / length = %x / BIG / npages = %d / pbase = %l\n",
527	vseg->name, x_dest, y_dest, vseg->vbase, vseg->length, npages, vseg-> pbase );
528	else
529	_printf("\n[BOOT] vseg %s : cluster[%d,%d] / "
530	"vbase = %x / length = %x / SMALL / npages = %d / pbase = %l\n",
531	vseg->name, x_dest, y_dest, vseg->vbase, vseg->length, npages, vseg-> pbase );
532	#endif
533
534	} // end boot_vseg_map()
535
536	/////////////////////////////////////////////////////////////////////////////////////
537	// For the vseg defined by the vseg pointer, this function register PTEs
538	// in one or several page tables.
539	// It is a global vseg (kernel vseg) if (vspace_id == 0xFFFFFFFF).
540	// The number of involved PTABs depends on the "local" and "global" attributes:
541	// - PTEs are replicated in all vspaces for a global vseg.
542	// - PTEs are replicated in all clusters containing procs for a non local vseg.
543	/////////////////////////////////////////////////////////////////////////////////////
544	void boot_vseg_pte( mapping_vseg_t* vseg,
545	unsigned int vspace_id )
546	{
547	// compute the "global" vseg attribute and actual vspace index
548	unsigned int global;
549	unsigned int vsid;
550	if ( vspace_id == 0xFFFFFFFF )
551	{
552	global = 1;
553	vsid = 0;
554	}
555	else
556	{
557	global = 0;
558	vsid = vspace_id;
559	}
560
561	// compute the "local" and "big" attributes
562	unsigned int local = vseg->local;
563	unsigned int big = vseg->big;
564
565	// compute vseg flags
566	// The three flags (Local, Remote and Dirty) are set to 1
567	// to avoid hardware update for these flags, because GIET_VM
568	// does use these flags.
569	unsigned int flags = 0;
570	if (vseg->mode & C_MODE_MASK) flags \|= PTE_C;
571	if (vseg->mode & X_MODE_MASK) flags \|= PTE_X;
572	if (vseg->mode & W_MODE_MASK) flags \|= PTE_W;
573	if (vseg->mode & U_MODE_MASK) flags \|= PTE_U;
574	if ( global ) flags \|= PTE_G;
575	flags \|= PTE_L;
576	flags \|= PTE_R;
577	flags \|= PTE_D;
578
579	// compute VPN, PPN and number of pages (big or small)
580	unsigned int vpn = vseg->vbase >> 12;
581	unsigned int vpn_max = (vseg->vbase + vseg->length - 1) >> 12;
582	unsigned int ppn = (unsigned int)(vseg->pbase >> 12);
583	unsigned int npages;
584	if ( big == 0 ) npages = vpn_max - vpn + 1;
585	else npages = (vpn_max>>9) - (vpn>>9) + 1;
586
587	// compute destination cluster coordinates, for local vsegs
588	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
589	mapping_cluster_t* cluster = _get_cluster_base(header);
590	mapping_pseg_t* pseg = _get_pseg_base(header);
591	mapping_pseg_t* pseg_dest = &pseg[vseg->psegid];
592	mapping_cluster_t* cluster_dest = &cluster[pseg_dest->clusterid];
593	unsigned int x_dest = cluster_dest->x;
594	unsigned int y_dest = cluster_dest->y;
595
596	unsigned int p; // iterator for physical page index
597	unsigned int x; // iterator for cluster x coordinate
598	unsigned int y; // iterator for cluster y coordinate
599	unsigned int v; // iterator for vspace index
600
601	// loop on PTEs
602	for ( p = 0 ; p < npages ; p++ )
603	{
604	if ( (local != 0) && (global == 0) ) // one cluster / one vspace
605	{
606	if ( big ) // big pages => PTE1s
607	{
608	boot_add_pte1( vsid,
609	x_dest,
610	y_dest,
611	vpn + (p<<9),
612	flags,
613	ppn + (p<<9) );
614	}
615	else // small pages => PTE2s
616	{
617	boot_add_pte2( vsid,
618	x_dest,
619	y_dest,
620	vpn + p,
621	flags,
622	ppn + p );
623	}
624	}
625	else if ( (local == 0) && (global == 0) ) // all clusters / one vspace
626	{
627	for ( x = 0 ; x < X_SIZE ; x++ )
628	{
629	for ( y = 0 ; y < Y_SIZE ; y++ )
630	{
631	if ( cluster[(x * Y_SIZE) + y].procs )
632	{
633	if ( big ) // big pages => PTE1s
634	{
635	boot_add_pte1( vsid,
636	x,
637	y,
638	vpn + (p<<9),
639	flags,
640	ppn + (p<<9) );
641	}
642	else // small pages => PTE2s
643	{
644	boot_add_pte2( vsid,
645	x,
646	y,
647	vpn + p,
648	flags,
649	ppn + p );
650	}
651	}
652	}
653	}
654	}
655	else if ( (local != 0) && (global != 0) ) // one cluster / all vspaces
656	{
657	for ( v = 0 ; v < header->vspaces ; v++ )
658	{
659	if ( big ) // big pages => PTE1s
660	{
661	boot_add_pte1( v,
662	x_dest,
663	y_dest,
664	vpn + (p<<9),
665	flags,
666	ppn + (p<<9) );
667	}
668	else // small pages = PTE2s
669	{
670	boot_add_pte2( v,
671	x_dest,
672	y_dest,
673	vpn + p,
674	flags,
675	ppn + p );
676	}
677	}
678	}
679	else if ( (local == 0) && (global != 0) ) // all clusters / all vspaces
680	{
681	for ( x = 0 ; x < X_SIZE ; x++ )
682	{
683	for ( y = 0 ; y < Y_SIZE ; y++ )
684	{
685	if ( cluster[(x * Y_SIZE) + y].procs )
686	{
687	for ( v = 0 ; v < header->vspaces ; v++ )
688	{
689	if ( big ) // big pages => PTE1s
690	{
691	boot_add_pte1( v,
692	x,
693	y,
694	vpn + (p<<9),
695	flags,
696	ppn + (p<<9) );
697	}
698	else // small pages -> PTE2s
699	{
700	boot_add_pte2( v,
701	x,
702	y,
703	vpn + p,
704	flags,
705	ppn + p );
706	}
707	}
708	}
709	}
710	}
711	}
712	} // end for pages
713
714	asm volatile ("sync");
715
716	} // end boot_vseg_pte()
717
718
719	///////////////////////////////////////////////////////////////////////////////
720	// This function is executed by processor[x][y][0] in each cluster
721	// containing at least one processor.
722	// It initialises all page table for all global or private vsegs
723	// mapped in cluster[x][y], as specified in the mapping.
724	// In each cluster all page tables for the different vspaces must be
725	// packed in one vseg occupying one single BPP (Big Physical Page).
726	//
727	// For each vseg, the mapping is done in two steps:
728	// 1) mapping : the boot_vseg_map() function allocates contiguous BPPs
729	// or SPPs (if the vseg is not associated to a peripheral), and register
730	// the physical base address in the vseg pbase field. It initialises the
731	// _ptabs_vaddr[] and _ptabs_paddr[] arrays if the vseg is a PTAB.
732	//
733	// 2) page table initialisation : the boot_vseg_pte() function initialise
734	// the PTEs (both PTE1 and PTE2) in one or several page tables:
735	// - PTEs are replicated in all vspaces for a global vseg.
736	// - PTEs are replicated in all clusters for a non local vseg.
737	//
738	// We must handle vsegs in the following order
739	// 1) global vseg containing PTAB mapped in cluster[x][y],
740	// 2) global vsegs occupying more than one BPP mapped in cluster[x][y],
741	// 3) others global vsegs mapped in cluster[x][y],
742	// 4) all private vsegs in all user spaces mapped in cluster[x][y].
743	///////////////////////////////////////////////////////////////////////////////
744	void boot_ptab_init( unsigned int cx,
745	unsigned int cy )
746	{
747	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
748	mapping_vspace_t* vspace = _get_vspace_base(header);
749	mapping_vseg_t* vseg = _get_vseg_base(header);
750	mapping_cluster_t* cluster ;
751	mapping_pseg_t* pseg ;
752
753	unsigned int vspace_id;
754	unsigned int vseg_id;
755
756	unsigned int procid = _get_procid();
757	unsigned int lpid = procid & ((1<<P_WIDTH)-1);
758
759	if( lpid )
760	{
761	_printf("\n[BOOT ERROR] in boot_ptab_init() : "
762	"P[%d][%d][%d] should not execute it\n", cx, cy, lpid );
763	_exit();
764	}
765
766	if ( header->vspaces == 0 )
767	{
768	_printf("\n[BOOT ERROR] in boot_ptab_init() : "
769	"mapping %s contains no vspace\n", header->name );
770	_exit();
771	}
772
773	///////// Phase 1 : global vseg containing the PTAB (two barriers required)
774
775	// get PTAB global vseg in cluster(cx,cy)
776	unsigned int found = 0;
777	for (vseg_id = 0; vseg_id < header->globals; vseg_id++)
778	{
779	pseg = _get_pseg_base(header) + vseg[vseg_id].psegid;
780	cluster = _get_cluster_base(header) + pseg->clusterid;
781	if ( (vseg[vseg_id].type == VSEG_TYPE_PTAB) &&
782	(cluster->x == cx) && (cluster->y == cy) )
783	{
784	found = 1;
785	break;
786	}
787	}
788	if ( found == 0 )
789	{
790	_printf("\n[BOOT ERROR] in boot_ptab_init() : "
791	"cluster[%d][%d] contains no PTAB vseg\n", cx , cy );
792	_exit();
793	}
794
795	boot_vseg_map( &vseg[vseg_id], 0xFFFFFFFF );
796
797	//////////////////////////////////////////////
798	_simple_barrier_wait( &_barrier_all_clusters );
799	//////////////////////////////////////////////
800
801	boot_vseg_pte( &vseg[vseg_id], 0xFFFFFFFF );
802
803	//////////////////////////////////////////////
804	_simple_barrier_wait( &_barrier_all_clusters );
805	//////////////////////////////////////////////
806
807	///////// Phase 2 : global vsegs occupying more than one BPP
808
809	for (vseg_id = 0; vseg_id < header->globals; vseg_id++)
810	{
811	pseg = _get_pseg_base(header) + vseg[vseg_id].psegid;
812	cluster = _get_cluster_base(header) + pseg->clusterid;
813	if ( (vseg[vseg_id].length > 0x200000) &&
814	(vseg[vseg_id].mapped == 0) &&
815	(cluster->x == cx) && (cluster->y == cy) )
816	{
817	boot_vseg_map( &vseg[vseg_id], 0xFFFFFFFF );
818	boot_vseg_pte( &vseg[vseg_id], 0xFFFFFFFF );
819	}
820	}
821
822	///////// Phase 3 : all others global vsegs
823
824	for (vseg_id = 0; vseg_id < header->globals; vseg_id++)
825	{
826	pseg = _get_pseg_base(header) + vseg[vseg_id].psegid;
827	cluster = _get_cluster_base(header) + pseg->clusterid;
828	if ( (vseg[vseg_id].mapped == 0) &&
829	(cluster->x == cx) && (cluster->y == cy) )
830	{
831	boot_vseg_map( &vseg[vseg_id], 0xFFFFFFFF );
832	boot_vseg_pte( &vseg[vseg_id], 0xFFFFFFFF );
833	}
834	}
835
836	///////// Phase 4 : all private vsegs
837
838	for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++)
839	{
840	for (vseg_id = vspace[vspace_id].vseg_offset;
841	vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs);
842	vseg_id++)
843	{
844	pseg = _get_pseg_base(header) + vseg[vseg_id].psegid;
845	cluster = _get_cluster_base(header) + pseg->clusterid;
846	if ( (cluster->x == cx) && (cluster->y == cy) )
847	{
848	boot_vseg_map( &vseg[vseg_id], vspace_id );
849	boot_vseg_pte( &vseg[vseg_id], vspace_id );
850	}
851	}
852	}
853
854	//////////////////////////////////////////////
855	_simple_barrier_wait( &_barrier_all_clusters );
856	//////////////////////////////////////////////
857
858	} // end boot_ptab_init()
859
860	////////////////////////////////////////////////////////////////////////////////
861	// This function should be executed by P[0][0][0] only. It complete the
862	// page table initialisation, taking care of all global vsegs that are
863	// not mapped in a cluster containing a processor, and have not been
864	// handled by the boot_ptab_init(x,y) function.
865	// An example of such vsegs are the external peripherals in TSAR_LETI platform.
866	////////////////////////////////////////////////////////////////////////////////
867	void boot_ptab_extend()
868	{
869
870	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
871	mapping_vseg_t* vseg = _get_vseg_base(header);
872
873	unsigned int vseg_id;
874
875	for (vseg_id = 0; vseg_id < header->globals; vseg_id++)
876	{
877	if ( vseg[vseg_id].mapped == 0 )
878	{
879	boot_vseg_map( &vseg[vseg_id], 0xFFFFFFFF );
880	boot_vseg_pte( &vseg[vseg_id], 0xFFFFFFFF );
881	}
882	}
883	} // end boot_ptab_extend()
884
885	///////////////////////////////////////////////////////////////////////////////
886	// This function returns in the vbase and length buffers the virtual base
887	// address and the length of the segment allocated to the schedulers array
888	// in the cluster defined by the clusterid argument.
889	///////////////////////////////////////////////////////////////////////////////
890	void boot_get_sched_vaddr( unsigned int cluster_id,
891	unsigned int* vbase,
892	unsigned int* length )
893	{
894	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
895	mapping_vseg_t* vseg = _get_vseg_base(header);
896	mapping_pseg_t* pseg = _get_pseg_base(header);
897
898	unsigned int vseg_id;
899	unsigned int found = 0;
900
901	for ( vseg_id = 0 ; (vseg_id < header->vsegs) && (found == 0) ; vseg_id++ )
902	{
903	if ( (vseg[vseg_id].type == VSEG_TYPE_SCHED) &&
904	(pseg[vseg[vseg_id].psegid].clusterid == cluster_id ) )
905	{
906	*vbase = vseg[vseg_id].vbase;
907	*length = vseg[vseg_id].length;
908	found = 1;
909	}
910	}
911	if ( found == 0 )
912	{
913	mapping_cluster_t* cluster = _get_cluster_base(header);
914	_printf("\n[BOOT ERROR] No vseg of type SCHED in cluster [%d,%d]\n",
915	cluster[cluster_id].x, cluster[cluster_id].y );
916	_exit();
917	}
918	} // end boot_get_sched_vaddr()
919
920	#if BOOT_DEBUG_SCHED
921	/////////////////////////////////////////////////////////////////////////////
922	// This debug function should be executed by only one procesor.
923	// It loops on all processors in all clusters to display
924	// the HWI / PTI / WTI interrupt vectors for each processor.
925	/////////////////////////////////////////////////////////////////////////////
926	void boot_sched_irq_display()
927	{
928	unsigned int cx;
929	unsigned int cy;
930	unsigned int lpid;
931	unsigned int slot;
932	unsigned int entry;
933	unsigned int type;
934	unsigned int channel;
935
936	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
937	mapping_cluster_t* cluster = _get_cluster_base(header);
938
939	static_scheduler_t* psched;
940
941	for ( cx = 0 ; cx < X_SIZE ; cx++ )
942	{
943	for ( cy = 0 ; cy < Y_SIZE ; cy++ )
944	{
945	unsigned int cluster_id = (cx * Y_SIZE) + cy;
946	unsigned int nprocs = cluster[cluster_id].procs;
947
948	for ( lpid = 0 ; lpid < nprocs ; lpid++ )
949	{
950	psched = _schedulers[cx][cy][lpid];
951
952	_printf("\n[BOOT] interrupt vectors for proc[%d,%d,%d]\n",
953	cx , cy , lpid );
954
955	for ( slot = 0 ; slot < 32 ; slot++ )
956	{
957	entry = psched->hwi_vector[slot];
958	type = entry & 0xFFFF;
959	channel = entry >> 16;
960	if ( type != ISR_DEFAULT )
961	_printf(" - HWI : index = %d / type = %s / channel = %d\n",
962	slot , _isr_type_str[type] , channel );
963	}
964	for ( slot = 0 ; slot < 32 ; slot++ )
965	{
966	entry = psched->wti_vector[slot];
967	type = entry & 0xFFFF;
968	channel = entry >> 16;
969	if ( type != ISR_DEFAULT )
970	_printf(" - WTI : index = %d / type = %s / channel = %d\n",
971	slot , _isr_type_str[type] , channel );
972	}
973	for ( slot = 0 ; slot < 32 ; slot++ )
974	{
975	entry = psched->pti_vector[slot];
976	type = entry & 0xFFFF;
977	channel = entry >> 16;
978	if ( type != ISR_DEFAULT )
979	_printf(" - PTI : index = %d / type = %s / channel = %d\n",
980	slot , _isr_type_str[type] , channel );
981	}
982	}
983	}
984	}
985	} // end boot_sched_irq_display()
986	#endif
987
988
989	////////////////////////////////////////////////////////////////////////////////////
990	// This function is executed in parallel by all processors P[x][y][0].
991	// P[x][y][0] initialises all schedulers in cluster[x][y]. The MMU must be activated.
992	// It is split in two phases separated by a synchronisation barrier.
993	// - In Step 1, it initialises the _schedulers[x][y][p] pointers array, the
994	// idle_thread context, the HWI / PTI / WTI interrupt vectors,
995	// and the XCU HWI / PTI / WTI masks.
996	// - In Step 2, it scan all threads in all vspaces to complete the threads contexts,
997	// initialisation as specified in the mapping_info data structure,
998	// and set the CP0_SCHED register.
999	////////////////////////////////////////////////////////////////////////////////////
1000	void boot_scheduler_init( unsigned int x,
1001	unsigned int y )
1002	{
1003	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
1004	mapping_cluster_t* cluster = _get_cluster_base(header);
1005	mapping_vspace_t* vspace = _get_vspace_base(header);
1006	mapping_vseg_t* vseg = _get_vseg_base(header);
1007	mapping_thread_t* thread = _get_thread_base(header);
1008	mapping_periph_t* periph = _get_periph_base(header);
1009	mapping_irq_t* irq = _get_irq_base(header);
1010
1011	unsigned int periph_id;
1012	unsigned int irq_id;
1013	unsigned int vspace_id;
1014	unsigned int vseg_id;
1015	unsigned int thread_id;
1016
1017	unsigned int sched_vbase; // schedulers array vbase address
1018	unsigned int sched_length; // schedulers array length
1019	static_scheduler_t* psched; // pointer on processor scheduler
1020
1021	unsigned int cluster_id = (x * Y_SIZE) + y;
1022	unsigned int cluster_xy = (x << Y_WIDTH) + y;
1023	unsigned int nprocs = cluster[cluster_id].procs;
1024	unsigned int lpid;
1025
1026	if ( nprocs > 8 )
1027	{
1028	_printf("\n[BOOT ERROR] cluster[%d,%d] contains more than 8 procs\n", x, y );
1029	_exit();
1030	}
1031
1032	////////////////////////////////////////////////////////////////////////////////
1033	// Step 1 : - initialize the schedulers[] array of pointers,
1034	// - initialize the "threads" and "current variables.
1035	// - initialise the idle_thread context.
1036	// - initialize the HWI, PTI and WTI interrupt vectors.
1037	// - initialize the XCU masks for HWI / WTI / PTI interrupts.
1038	//
1039	// The general policy for interrupts routing is the following:
1040	// - the local HWI are statically allocatedted to local processors.
1041	// - the nprocs first PTI are allocated for TICK (one per processor).
1042	// - we allocate 4 WTI per processor: the first one is for WAKUP,
1043	// the 3 others WTI are used for external interrupts (from PIC),
1044	// and are dynamically allocated by kernel on demand.
1045	///////////////////////////////////////////////////////////////////////////////
1046
1047	// get scheduler array virtual base address in cluster[x,y]
1048	boot_get_sched_vaddr( cluster_id, &sched_vbase, &sched_length );
1049
1050	if ( sched_length < (nprocs<<13) ) // 8 Kbytes per scheduler
1051	{
1052	_printf("\n[BOOT ERROR] Sched segment too small in cluster[%d,%d]\n",
1053	x, y );
1054	_exit();
1055	}
1056
1057	// loop on local processors
1058	for ( lpid = 0 ; lpid < nprocs ; lpid++ )
1059	{
1060	// get scheduler pointer and initialise the schedulers pointers array
1061	psched = (static_scheduler_t*)(sched_vbase + (lpid<<13));
1062	_schedulers[x][y][lpid] = psched;
1063
1064	// initialise the "threads" and "current" variables default values
1065	psched->threads = 0;
1066	psched->current = IDLE_THREAD_INDEX;
1067
1068	// set default values for HWI / PTI / SWI vectors (valid bit = 0)
1069	unsigned int slot;
1070	for (slot = 0; slot < 32; slot++)
1071	{
1072	psched->hwi_vector[slot] = 0;
1073	psched->pti_vector[slot] = 0;
1074	psched->wti_vector[slot] = 0;
1075	}
1076
1077	// initializes the idle_thread context:
1078	// - the SR slot is 0xFF03 because this thread run in kernel mode.
1079	// - it uses the page table of vspace[0]
1080	// - it uses the kernel TTY0 terminal
1081	// - slots containing addresses (SP,RA,EPC) are initialised by kernel_init()
1082	// - It is always executable (NORUN == 0)
1083
1084	psched->context[IDLE_THREAD_INDEX].slot[CTX_CR_ID] = 0;
1085	psched->context[IDLE_THREAD_INDEX].slot[CTX_SR_ID] = 0xFF03;
1086	psched->context[IDLE_THREAD_INDEX].slot[CTX_PTPR_ID] = _ptabs_paddr[0][x][y]>>13;
1087	psched->context[IDLE_THREAD_INDEX].slot[CTX_PTAB_ID] = _ptabs_vaddr[0][x][y];
1088	psched->context[IDLE_THREAD_INDEX].slot[CTX_TTY_ID] = 0;
1089	psched->context[IDLE_THREAD_INDEX].slot[CTX_LTID_ID] = IDLE_THREAD_INDEX;
1090	psched->context[IDLE_THREAD_INDEX].slot[CTX_VSID_ID] = 0;
1091	psched->context[IDLE_THREAD_INDEX].slot[CTX_NORUN_ID] = 0;
1092	psched->context[IDLE_THREAD_INDEX].slot[CTX_SIGS_ID] = 0;
1093	psched->context[IDLE_THREAD_INDEX].slot[CTX_LOCKS_ID] = 0;
1094	}
1095
1096	// HWI / PTI / WTI masks (up to 8 local processors)
1097	unsigned int hwi_mask[8] = {0,0,0,0,0,0,0,0};
1098	unsigned int pti_mask[8] = {0,0,0,0,0,0,0,0};
1099	unsigned int wti_mask[8] = {0,0,0,0,0,0,0,0};
1100
1101	// scan local peripherals to get and check local XCU
1102	mapping_periph_t* xcu = NULL;
1103	unsigned int min = cluster[cluster_id].periph_offset ;
1104	unsigned int max = min + cluster[cluster_id].periphs ;
1105
1106	for ( periph_id = min ; periph_id < max ; periph_id++ )
1107	{
1108	if( periph[periph_id].type == PERIPH_TYPE_XCU )
1109	{
1110	xcu = &periph[periph_id];
1111
1112	// check nb_hwi_in
1113	if ( xcu->arg0 < xcu->irqs )
1114	{
1115	_printf("\n[BOOT ERROR] Not enough HWI inputs for XCU[%d,%d]"
1116	" : nb_hwi = %d / nb_irqs = %d\n",
1117	x , y , xcu->arg0 , xcu->irqs );
1118	_exit();
1119	}
1120	// check nb_pti_in
1121	if ( xcu->arg2 < nprocs )
1122	{
1123	_printf("\n[BOOT ERROR] Not enough PTI inputs for XCU[%d,%d]\n",
1124	x, y );
1125	_exit();
1126	}
1127	// check nb_wti_in
1128	if ( xcu->arg1 < (4 * nprocs) )
1129	{
1130	_printf("\n[BOOT ERROR] Not enough WTI inputs for XCU[%d,%d]\n",
1131	x, y );
1132	_exit();
1133	}
1134	// check nb_irq_out
1135	if ( xcu->channels < (nprocs * header->irq_per_proc) )
1136	{
1137	_printf("\n[BOOT ERROR] Not enough outputs for XCU[%d,%d]\n",
1138	x, y );
1139	_exit();
1140	}
1141	}
1142	}
1143
1144	if ( xcu == NULL )
1145	{
1146	_printf("\n[BOOT ERROR] missing XCU in cluster[%d,%d]\n", x , y );
1147	_exit();
1148	}
1149
1150	// HWI interrupt vector definition
1151	// scan HWI connected to local XCU
1152	// for round-robin allocation to local processors
1153	lpid = 0;
1154	for ( irq_id = xcu->irq_offset ;
1155	irq_id < xcu->irq_offset + xcu->irqs ;
1156	irq_id++ )
1157	{
1158	unsigned int type = irq[irq_id].srctype;
1159	unsigned int srcid = irq[irq_id].srcid;
1160	unsigned int isr = irq[irq_id].isr & 0xFFFF;
1161	unsigned int channel = irq[irq_id].channel << 16;
1162
1163	if ( (type != IRQ_TYPE_HWI) \|\| (srcid > 31) )
1164	{
1165	_printf("\n[BOOT ERROR] Bad IRQ in cluster[%d,%d]\n", x, y );
1166	_exit();
1167	}
1168
1169	// register entry in HWI interrupt vector
1170	_schedulers[x][y][lpid]->hwi_vector[srcid] = isr \| channel;
1171
1172	// update XCU HWI mask for P[x,y,lpid]
1173	hwi_mask[lpid] = hwi_mask[lpid] \| (1<<srcid);
1174
1175	lpid = (lpid + 1) % nprocs;
1176	} // end for irqs
1177
1178	// PTI interrupt vector definition
1179	// one PTI for TICK per processor
1180	for ( lpid = 0 ; lpid < nprocs ; lpid++ )
1181	{
1182	// register entry in PTI interrupt vector
1183	_schedulers[x][y][lpid]->pti_vector[lpid] = ISR_TICK;
1184
1185	// update XCU PTI mask for P[x,y,lpid]
1186	pti_mask[lpid] = pti_mask[lpid] \| (1<<lpid);
1187	}
1188
1189	// WTI interrupt vector definition
1190	// 4 WTI per processor, first for WAKUP
1191	for ( lpid = 0 ; lpid < nprocs ; lpid++ )
1192	{
1193	// register WAKUP ISR in WTI interrupt vector
1194	_schedulers[x][y][lpid]->wti_vector[lpid] = ISR_WAKUP;
1195
1196	// update XCU WTI mask for P[x,y,lpid] (4 entries per proc)
1197	wti_mask[lpid] = wti_mask[lpid] \| (0x1<<(lpid ));
1198	wti_mask[lpid] = wti_mask[lpid] \| (0x1<<(lpid + NB_PROCS_MAX ));
1199	wti_mask[lpid] = wti_mask[lpid] \| (0x1<<(lpid + 2*NB_PROCS_MAX));
1200	wti_mask[lpid] = wti_mask[lpid] \| (0x1<<(lpid + 3*NB_PROCS_MAX));
1201	}
1202
1203	// set the XCU masks for HWI / WTI / PTI interrupts
1204	for ( lpid = 0 ; lpid < nprocs ; lpid++ )
1205	{
1206	unsigned int channel = lpid * IRQ_PER_PROCESSOR;
1207
1208	_xcu_set_mask( cluster_xy, channel, hwi_mask[lpid], IRQ_TYPE_HWI );
1209	_xcu_set_mask( cluster_xy, channel, wti_mask[lpid], IRQ_TYPE_WTI );
1210	_xcu_set_mask( cluster_xy, channel, pti_mask[lpid], IRQ_TYPE_PTI );
1211	}
1212
1213	//////////////////////////////////////////////
1214	_simple_barrier_wait( &_barrier_all_clusters );
1215	//////////////////////////////////////////////
1216
1217	#if BOOT_DEBUG_SCHED
1218	if ( cluster_xy == 0 ) boot_sched_irq_display();
1219	_simple_barrier_wait( &_barrier_all_clusters );
1220	#endif
1221
1222	///////////////////////////////////////////////////////////////////////////////
1223	// Step 2 : Initialise the threads context. The context of a thread placed
1224	// on processor P must be stored in the scheduler of P.
1225	// For each vspace, this require two nested loops: loop on the threads,
1226	// and loop on the local processors in cluster[x,y].
1227	// We complete the scheduler when the required placement matches
1228	// the local processor.
1229	///////////////////////////////////////////////////////////////////////////////
1230
1231	for (vspace_id = 0; vspace_id < header->vspaces; vspace_id++)
1232	{
1233	// We must set the PTPR depending on the vspace, because the start_vector
1234	// and the stack address are defined in virtual space.
1235	_set_mmu_ptpr( (unsigned int)(_ptabs_paddr[vspace_id][x][y] >> 13) );
1236
1237	// loop on the threads in vspace (thread_id is the global index in mapping)
1238	for (thread_id = vspace[vspace_id].thread_offset;
1239	thread_id < (vspace[vspace_id].thread_offset + vspace[vspace_id].threads);
1240	thread_id++)
1241	{
1242	// get the required thread placement coordinates [x,y,p]
1243	unsigned int req_x = cluster[thread[thread_id].clusterid].x;
1244	unsigned int req_y = cluster[thread[thread_id].clusterid].y;
1245	unsigned int req_p = thread[thread_id].proclocid;
1246
1247	// ctx_norun : two conditions to activate a thread
1248	// - The vspace.active flag is set in the mapping
1249	// - The thread.is_main flag is set in the mapping
1250	unsigned int ctx_norun = (unsigned int)(vspace[vspace_id].active == 0) \|
1251	(unsigned int)(thread[thread_id].is_main == 0);
1252
1253	// ctx_ptpr : page table physical base address (shifted by 13 bit)
1254	unsigned int ctx_ptpr = (_ptabs_paddr[vspace_id][req_x][req_y] >> 13);
1255
1256	// ctx_ptab : page_table virtual base address
1257	unsigned int ctx_ptab = _ptabs_vaddr[vspace_id][req_x][req_y];
1258
1259	// ctx_entry : Get the virtual address of the memory location containing
1260	// the thread entry point : the start_vector is stored by GCC in the
1261	// seg_data segment, and we must wait the application.elf loading to get
1262	// the entry point value...
1263	vseg_id = vspace[vspace_id].start_vseg_id;
1264	unsigned int ctx_entry = vseg[vseg_id].vbase + (thread[thread_id].startid)*4;
1265
1266	// ctx_sp : Get the vseg containing the stack
1267	// allocate 16 slots (64 bytes) for possible arguments.
1268	vseg_id = thread[thread_id].stack_vseg_id;
1269	unsigned int ctx_sp = vseg[vseg_id].vbase + vseg[vseg_id].length - 64;
1270
1271	// loop on the local processors
1272	for ( lpid = 0 ; lpid < nprocs ; lpid++ )
1273	{
1274	if ( (x == req_x) && (y == req_y) && (req_p == lpid) ) // fit
1275	{
1276	// pointer on selected scheduler
1277	psched = _schedulers[x][y][lpid];
1278
1279	// ltid : compute local thread index in scheduler
1280	unsigned int ltid = psched->threads;
1281
1282	// update the threads field in scheduler:
1283	psched->threads = ltid + 1;
1284
1285	// ctx_trdid : compute pthread global identifier
1286	unsigned int ctx_trdid = x << 24 \| y<<16 \| lpid<<8 \| ltid;
1287
1288	// initializes the thread context
1289	psched->context[ltid].slot[CTX_CR_ID] = 0;
1290	psched->context[ltid].slot[CTX_SR_ID] = GIET_SR_INIT_VALUE;
1291	psched->context[ltid].slot[CTX_SP_ID] = ctx_sp;
1292	psched->context[ltid].slot[CTX_EPC_ID] = ctx_entry;
1293	psched->context[ltid].slot[CTX_ENTRY_ID] = ctx_entry;
1294	psched->context[ltid].slot[CTX_PTPR_ID] = ctx_ptpr;
1295	psched->context[ltid].slot[CTX_PTAB_ID] = ctx_ptab;
1296	psched->context[ltid].slot[CTX_LTID_ID] = ltid;
1297	psched->context[ltid].slot[CTX_TRDID_ID] = ctx_trdid;
1298	psched->context[ltid].slot[CTX_VSID_ID] = vspace_id;
1299	psched->context[ltid].slot[CTX_NORUN_ID] = ctx_norun;
1300	psched->context[ltid].slot[CTX_SIGS_ID] = 0;
1301	psched->context[ltid].slot[CTX_LOCKS_ID] = 0;
1302
1303	psched->context[ltid].slot[CTX_TTY_ID] = 0xFFFFFFFF;
1304	psched->context[ltid].slot[CTX_CMA_FB_ID] = 0xFFFFFFFF;
1305	psched->context[ltid].slot[CTX_CMA_RX_ID] = 0xFFFFFFFF;
1306	psched->context[ltid].slot[CTX_CMA_TX_ID] = 0xFFFFFFFF;
1307	psched->context[ltid].slot[CTX_NIC_RX_ID] = 0xFFFFFFFF;
1308	psched->context[ltid].slot[CTX_NIC_TX_ID] = 0xFFFFFFFF;
1309	psched->context[ltid].slot[CTX_TIM_ID] = 0xFFFFFFFF;
1310	psched->context[ltid].slot[CTX_HBA_ID] = 0xFFFFFFFF;
1311
1312	// update thread ltid field in the mapping
1313	thread[thread_id].ltid = ltid;
1314
1315	#if BOOT_DEBUG_SCHED
1316	_printf("\nThread %s in vspace %s allocated to P[%d,%d,%d]\n"
1317	" - ctx[LTID] = %d\n"
1318	" - ctx[TRDID] = %d\n"
1319	" - ctx[SR] = %x\n"
1320	" - ctx[SP] = %x\n"
1321	" - ctx[ENTRY] = %x\n"
1322	" - ctx[PTPR] = %x\n"
1323	" - ctx[PTAB] = %x\n"
1324	" - ctx[VSID] = %d\n"
1325	" - ctx[NORUN] = %x\n"
1326	" - ctx[SIG] = %x\n",
1327	thread[thread_id].name,
1328	vspace[vspace_id].name,
1329	x, y, lpid,
1330	psched->context[ltid].slot[CTX_LTID_ID],
1331	psched->context[ltid].slot[CTX_TRDID_ID],
1332	psched->context[ltid].slot[CTX_SR_ID],
1333	psched->context[ltid].slot[CTX_SP_ID],
1334	psched->context[ltid].slot[CTX_ENTRY_ID],
1335	psched->context[ltid].slot[CTX_PTPR_ID],
1336	psched->context[ltid].slot[CTX_PTAB_ID],
1337	psched->context[ltid].slot[CTX_VSID_ID],
1338	psched->context[ltid].slot[CTX_NORUN_ID],
1339	psched->context[ltid].slot[CTX_SIG_ID] );
1340	#endif
1341	} // end if FIT
1342	} // end for loop on local procs
1343	} // end loop on threads
1344	} // end loop on vspaces
1345	} // end boot_scheduler_init()
1346
1347
1348
1349	//////////////////////////////////////////////////////////////////////////////////
1350	// This function loads the map.bin file from block device.
1351	//////////////////////////////////////////////////////////////////////////////////
1352	void boot_mapping_init()
1353	{
1354
1355	#if BOOT_DEBUG_MAPPING
1356	_printf("\n[BOOT DEBUG] boot_mapin_init() : enter\n");
1357	#endif
1358
1359	// load map.bin file into buffer
1360	if ( _fat_load_no_cache( "map.bin",
1361	SEG_BOOT_MAPPING_BASE,
1362	SEG_BOOT_MAPPING_SIZE ) )
1363	{
1364	_printf("\n[BOOT ERROR] : map.bin file not found \n");
1365	_exit();
1366	}
1367
1368	// check mapping signature, number of clusters, number of vspaces
1369	mapping_header_t * header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
1370	if ( (header->signature != IN_MAPPING_SIGNATURE) \|\|
1371	(header->x_size != X_SIZE) \|\|
1372	(header->y_size != Y_SIZE) \|\|
1373	(header->vspaces > GIET_NB_VSPACE_MAX) )
1374	{
1375	_printf("\n[BOOT ERROR] Illegal mapping : signature = %x\n", header->signature );
1376	_exit();
1377	}
1378
1379	#if BOOT_DEBUG_MAPPING
1380	unsigned int line;
1381	unsigned int* pointer = (unsigned int*)SEG_BOOT_MAPPING_BASE;
1382	_printf("\n[BOOT] First block of mapping\n");
1383	for ( line = 0 ; line < 8 ; line++ )
1384	{
1385	_printf(" \| %X \| %X \| %X \| %X \| %X \| %X \| %X \| %X \|\n",
1386	*(pointer + 0),
1387	*(pointer + 1),
1388	*(pointer + 2),
1389	*(pointer + 3),
1390	*(pointer + 4),
1391	*(pointer + 5),
1392	*(pointer + 6),
1393	*(pointer + 7) );
1394
1395	pointer = pointer + 8;
1396	}
1397	#endif
1398
1399	} // end boot_mapping_init()
1400
1401
1402	///////////////////////////////////////////////////
1403	void boot_dma_copy( unsigned int cluster_xy,
1404	unsigned long long dst_paddr,
1405	unsigned long long src_paddr,
1406	unsigned int size )
1407	{
1408	// size must be multiple of 64 bytes
1409	if ( size & 0x3F ) size = (size & (~0x3F)) + 0x40;
1410
1411	unsigned int mode = MODE_DMA_NO_IRQ;
1412
1413	unsigned int src = 0;
1414	unsigned int src_lsb = (unsigned int)src_paddr;
1415	unsigned int src_msb = (unsigned int)(src_paddr>>32);
1416
1417	unsigned int dst = 1;
1418	unsigned int dst_lsb = (unsigned int)dst_paddr;
1419	unsigned int dst_msb = (unsigned int)(dst_paddr>>32);
1420
1421	// initializes src channel
1422	_mwr_set_channel_register( cluster_xy , src , MWR_CHANNEL_MODE , mode );
1423	_mwr_set_channel_register( cluster_xy , src , MWR_CHANNEL_SIZE , size );
1424	_mwr_set_channel_register( cluster_xy , src , MWR_CHANNEL_BUFFER_LSB , src_lsb );
1425	_mwr_set_channel_register( cluster_xy , src , MWR_CHANNEL_BUFFER_MSB , src_msb );
1426	_mwr_set_channel_register( cluster_xy , src , MWR_CHANNEL_RUNNING , 1 );
1427
1428	// initializes dst channel
1429	_mwr_set_channel_register( cluster_xy , dst , MWR_CHANNEL_MODE , mode );
1430	_mwr_set_channel_register( cluster_xy , dst , MWR_CHANNEL_SIZE , size );
1431	_mwr_set_channel_register( cluster_xy , dst , MWR_CHANNEL_BUFFER_LSB , dst_lsb );
1432	_mwr_set_channel_register( cluster_xy , dst , MWR_CHANNEL_BUFFER_MSB , dst_msb );
1433	_mwr_set_channel_register( cluster_xy , dst , MWR_CHANNEL_RUNNING , 1 );
1434
1435	// start CPY coprocessor (write non-zero value into config register)
1436	_mwr_set_coproc_register( cluster_xy, 0 , 1 );
1437
1438	// poll dst channel status register to detect completion
1439	unsigned int status;
1440	do
1441	{
1442	status = _mwr_get_channel_register( cluster_xy , dst , MWR_CHANNEL_STATUS );
1443	} while ( status == MWR_CHANNEL_BUSY );
1444
1445	if ( status )
1446	{
1447	_printf("\n[BOOT ERROR] in boot_dma_copy()\n");
1448	_exit();
1449	}
1450
1451	// stop CPY coprocessor and DMA channels
1452	_mwr_set_channel_register( cluster_xy , src , MWR_CHANNEL_RUNNING , 0 );
1453	_mwr_set_channel_register( cluster_xy , dst , MWR_CHANNEL_RUNNING , 0 );
1454	_mwr_set_coproc_register ( cluster_xy , 0 , 0 );
1455
1456	} // end boot_dma_copy()
1457
1458	//////////////////////////////////////////////////////////////////////////////////
1459	// This function load all loadable segments contained in the .elf file identified
1460	// by the "pathname" argument. Some loadable segments can be copied in several
1461	// clusters: same virtual address but different physical addresses.
1462	// - It open the file.
1463	// - It loads the complete file in the dedicated _boot_elf_buffer.
1464	// - It copies each loadable segments at the virtual address defined in
1465	// the .elf file, making several copies if the target vseg is not local.
1466	// - It closes the file.
1467	// This function is supposed to be executed by all processors[x,y,0].
1468	//
1469	// Note: We must use physical addresses to reach the destination buffers that
1470	// can be located in remote clusters. We use either a _physical_memcpy(),
1471	// or a _dma_physical_copy() if DMA is available.
1472	//////////////////////////////////////////////////////////////////////////////////
1473	void load_one_elf_file( unsigned int is_kernel, // kernel file if non zero
1474	char* pathname,
1475	unsigned int vspace_id ) // to scan the proper vspace
1476	{
1477	mapping_header_t * header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
1478	mapping_vspace_t * vspace = _get_vspace_base(header);
1479	mapping_vseg_t * vseg = _get_vseg_base(header);
1480
1481	unsigned int procid = _get_procid();
1482	unsigned int cxy = procid >> P_WIDTH;
1483	unsigned int x = cxy >> Y_WIDTH;
1484	unsigned int y = cxy & ((1<<Y_WIDTH)-1);
1485	unsigned int p = procid & ((1<<P_WIDTH)-1);
1486
1487	#if BOOT_DEBUG_ELF
1488	_printf("\n[DEBUG BOOT_ELF] load_one_elf_file() : P[%d,%d,%d] enters for %s\n",
1489	x , y , p , pathname );
1490	#endif
1491
1492	Elf32_Ehdr* elf_header_ptr = NULL; // avoid a warning
1493
1494	// only P[0,0,0] load file
1495	if ( (cxy == 0) && (p == 0) )
1496	{
1497	if ( _fat_load_no_cache( pathname,
1498	(unsigned int)_boot_elf_buffer,
1499	GIET_ELF_BUFFER_SIZE ) )
1500	{
1501	_printf("\n[BOOT ERROR] in load_one_elf_file() : %s\n", pathname );
1502	_exit();
1503	}
1504
1505	// Check ELF Magic Number in ELF header
1506	Elf32_Ehdr* ptr = (Elf32_Ehdr*)_boot_elf_buffer;
1507
1508	if ( (ptr->e_ident[EI_MAG0] != ELFMAG0) \|\|
1509	(ptr->e_ident[EI_MAG1] != ELFMAG1) \|\|
1510	(ptr->e_ident[EI_MAG2] != ELFMAG2) \|\|
1511	(ptr->e_ident[EI_MAG3] != ELFMAG3) )
1512	{
1513	_printf("\n[BOOT ERROR] load_one_elf_file() : %s not ELF format\n",
1514	pathname );
1515	_exit();
1516	}
1517
1518	#if BOOT_DEBUG_ELF
1519	_printf("\n[DEBUG BOOT_ELF] load_one_elf_file() : P[%d,%d,%d] load %s at cycle %d\n",
1520	x , y , p , pathname , _get_proctime() );
1521	#endif
1522
1523	} // end if P[0,0,0]
1524
1525	//////////////////////////////////////////////
1526	_simple_barrier_wait( &_barrier_all_clusters );
1527	//////////////////////////////////////////////
1528
1529	// Each processor P[x,y,0] copy replicated segments in cluster[x,y]
1530	elf_header_ptr = (Elf32_Ehdr*)_boot_elf_buffer;
1531
1532	// get program header table pointer
1533	unsigned int offset = elf_header_ptr->e_phoff;
1534	if( offset == 0 )
1535	{
1536	_printf("\n[BOOT ERROR] load_one_elf_file() : file %s "
1537	"does not contain loadable segment\n", pathname );
1538	_exit();
1539	}
1540
1541	Elf32_Phdr* elf_pht_ptr = (Elf32_Phdr*)(_boot_elf_buffer + offset);
1542
1543	// get number of segments
1544	unsigned int nsegments = elf_header_ptr->e_phnum;
1545
1546	// First loop on loadable segments in the .elf file
1547	unsigned int seg_id;
1548	for (seg_id = 0 ; seg_id < nsegments ; seg_id++)
1549	{
1550	if(elf_pht_ptr[seg_id].p_type == PT_LOAD)
1551	{
1552	// Get segment attributes
1553	unsigned int seg_vaddr = elf_pht_ptr[seg_id].p_vaddr;
1554	unsigned int seg_offset = elf_pht_ptr[seg_id].p_offset;
1555	unsigned int seg_filesz = elf_pht_ptr[seg_id].p_filesz;
1556	unsigned int seg_memsz = elf_pht_ptr[seg_id].p_memsz;
1557
1558	if( seg_memsz != seg_filesz )
1559	{
1560	_printf("\n[BOOT ERROR] load_one_elf_file() : segment at vaddr = %x\n"
1561	" in file %s has memsize = %x / filesize = %x \n"
1562	" check that all global variables are in data segment\n",
1563	seg_vaddr, pathname , seg_memsz , seg_filesz );
1564	_exit();
1565	}
1566
1567	unsigned int src_vaddr = (unsigned int)_boot_elf_buffer + seg_offset;
1568
1569	// search all vsegs matching the virtual address
1570	unsigned int vseg_first;
1571	unsigned int vseg_last;
1572	unsigned int vseg_id;
1573	unsigned int found = 0;
1574	if ( is_kernel )
1575	{
1576	vseg_first = 0;
1577	vseg_last = header->globals;
1578	}
1579	else
1580	{
1581	vseg_first = vspace[vspace_id].vseg_offset;
1582	vseg_last = vseg_first + vspace[vspace_id].vsegs;
1583	}
1584
1585	// Second loop on vsegs in the mapping
1586	for ( vseg_id = vseg_first ; vseg_id < vseg_last ; vseg_id++ )
1587	{
1588	if ( seg_vaddr == vseg[vseg_id].vbase ) // matching
1589	{
1590	found = 1;
1591
1592	// get destination buffer physical address, size, coordinates
1593	paddr_t seg_paddr = vseg[vseg_id].pbase;
1594	unsigned int seg_size = vseg[vseg_id].length;
1595	unsigned int cluster_xy = (unsigned int)(seg_paddr>>32);
1596	unsigned int cx = cluster_xy >> Y_WIDTH;
1597	unsigned int cy = cluster_xy & ((1<<Y_WIDTH)-1);
1598
1599	// check vseg size
1600	if ( seg_size < seg_filesz )
1601	{
1602	_printf("\n[BOOT ERROR] in load_one_elf_file() : vseg %s "
1603	"is too small for segment %x\n"
1604	" file = %s / vseg_size = %x / seg_file_size = %x\n",
1605	vseg[vseg_id].name , seg_vaddr , pathname,
1606	seg_size , seg_filesz );
1607	_exit();
1608	}
1609
1610	// P[x,y,0] copy the segment from boot buffer in cluster[0,0]
1611	// to destination buffer in cluster[x,y], using DMA if available
1612	if ( (cx == x) && (cy == y) )
1613	{
1614	if( USE_MWR_CPY )
1615	{
1616	boot_dma_copy( cluster_xy, // DMA in cluster[x,y]
1617	seg_paddr,
1618	(paddr_t)src_vaddr,
1619	seg_filesz );
1620	#if BOOT_DEBUG_ELF
1621	_printf("\n[DEBUG BOOT_ELF] load_one_elf_file() : DMA[%d,%d] copy segment %d :\n"
1622	" vaddr = %x / size = %x / paddr = %l\n",
1623	x , y , seg_id , seg_vaddr , seg_memsz , seg_paddr );
1624	#endif
1625	}
1626	else
1627	{
1628	_physical_memcpy( seg_paddr, // dest paddr
1629	(paddr_t)src_vaddr, // source paddr
1630	seg_filesz ); // size
1631	#if BOOT_DEBUG_ELF
1632	_printf("\n[DEBUG BOOT_ELF] load_one_elf_file() : P[%d,%d,%d] copy segment %d :\n"
1633	" vaddr = %x / size = %x / paddr = %l\n",
1634	x , y , p , seg_id , seg_vaddr , seg_memsz , seg_paddr );
1635	#endif
1636	}
1637	}
1638	}
1639	} // end for vsegs
1640
1641	// check at least one matching vseg
1642	if ( found == 0 )
1643	{
1644	_printf("\n[BOOT ERROR] in load_one_elf_file() : vseg for loadable "
1645	"segment %x in file %s not found "
1646	"check consistency between the .py and .ld files\n",
1647	seg_vaddr, pathname );
1648	_exit();
1649	}
1650	}
1651	} // end for loadable segments
1652
1653	//////////////////////////////////////////////
1654	_simple_barrier_wait( &_barrier_all_clusters );
1655	//////////////////////////////////////////////
1656
1657	// only P[0,0,0] signals completion
1658	if ( (cxy == 0) && (p == 0) )
1659	{
1660	_printf("\n[BOOT] File %s loaded at cycle %d\n",
1661	pathname , _get_proctime() );
1662	}
1663
1664	} // end load_one_elf_file()
1665
1666
1667	/////i////////////////////////////////////////////////////////////////////////////////
1668	// This function uses the map.bin data structure to load the "kernel.elf" file
1669	// as well as the various "application.elf" files into memory.
1670	// - The "preloader.elf" file is not loaded, because it has been burned in the ROM.
1671	// - The "boot.elf" file is not loaded, because it has been loaded by the preloader.
1672	// This function scans all vsegs defined in the map.bin data structure to collect
1673	// all .elf files pathnames, and calls the load_one_elf_file() for each .elf file.
1674	// As the code can be replicated in several vsegs, the same code can be copied
1675	// in one or several clusters by the load_one_elf_file() function.
1676	//////////////////////////////////////////////////////////////////////////////////////
1677	void boot_elf_load()
1678	{
1679	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
1680	mapping_vspace_t* vspace = _get_vspace_base( header );
1681	mapping_vseg_t* vseg = _get_vseg_base( header );
1682
1683	unsigned int vspace_id;
1684	unsigned int vseg_id;
1685	unsigned int found;
1686
1687	// Scan all global vsegs to find the pathname to the kernel.elf file
1688	found = 0;
1689	for( vseg_id = 0 ; vseg_id < header->globals ; vseg_id++ )
1690	{
1691	if(vseg[vseg_id].type == VSEG_TYPE_ELF)
1692	{
1693	found = 1;
1694	break;
1695	}
1696	}
1697
1698	// We need one kernel.elf file
1699	if (found == 0)
1700	{
1701	_printf("\n[BOOT ERROR] boot_elf_load() : kernel.elf file not found\n");
1702	_exit();
1703	}
1704
1705	// Load the kernel
1706	load_one_elf_file( 1, // kernel file
1707	vseg[vseg_id].binpath, // file pathname
1708	0 ); // vspace 0
1709
1710	// loop on the vspaces, scanning all vsegs in the vspace,
1711	// to find the pathname of the .elf file associated to the vspace.
1712	for( vspace_id = 0 ; vspace_id < header->vspaces ; vspace_id++ )
1713	{
1714	// loop on the private vsegs
1715	unsigned int found = 0;
1716	for (vseg_id = vspace[vspace_id].vseg_offset;
1717	vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs);
1718	vseg_id++)
1719	{
1720	if(vseg[vseg_id].type == VSEG_TYPE_ELF)
1721	{
1722	found = 1;
1723	break;
1724	}
1725	}
1726
1727	// We want one .elf file per vspace
1728	if (found == 0)
1729	{
1730	_printf("\n[BOOT ERROR] boot_elf_load() : "
1731	".elf file not found for vspace %s\n", vspace[vspace_id].name );
1732	_exit();
1733	}
1734
1735	load_one_elf_file( 0, // not a kernel file
1736	vseg[vseg_id].binpath, // file pathname
1737	vspace_id ); // vspace index
1738
1739	} // end for vspaces
1740
1741	} // end boot_elf_load()
1742
1743
1744	/////////////////////////////////////////////////////////////////////////////////
1745	// This function is executed in parallel by all processors[x][y][0].
1746	// It initialises the physical memory allocator in each cluster containing
1747	// a RAM pseg.
1748	/////////////////////////////////////////////////////////////////////////////////
1749	void boot_pmem_init( unsigned int cx,
1750	unsigned int cy )
1751	{
1752	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
1753	mapping_cluster_t* cluster = _get_cluster_base(header);
1754	mapping_pseg_t* pseg = _get_pseg_base(header);
1755
1756	unsigned int pseg_id;
1757	unsigned int procid = _get_procid();
1758	unsigned int lpid = procid & ((1<<P_WIDTH)-1);
1759
1760	if( lpid )
1761	{
1762	_printf("\n[BOOT ERROR] boot_pmem_init() : "
1763	"P[%d][%d][%d] should not execute it\n", cx, cy, lpid );
1764	_exit();
1765	}
1766
1767	// scan the psegs in local cluster to find pseg of type RAM
1768	unsigned int found = 0;
1769	unsigned int cluster_id = cx * Y_SIZE + cy;
1770	unsigned int pseg_min = cluster[cluster_id].pseg_offset;
1771	unsigned int pseg_max = pseg_min + cluster[cluster_id].psegs;
1772	for ( pseg_id = pseg_min ; pseg_id < pseg_max ; pseg_id++ )
1773	{
1774	if ( pseg[pseg_id].type == PSEG_TYPE_RAM )
1775	{
1776	unsigned int base = (unsigned int)pseg[pseg_id].base;
1777	unsigned int size = (unsigned int)pseg[pseg_id].length;
1778	_pmem_alloc_init( cx, cy, base, size );
1779	found = 1;
1780
1781	#if BOOT_DEBUG_PT
1782	_printf("\n[BOOT] pmem allocator initialised in cluster[%d][%d]"
1783	" : base = %x / size = %x\n", cx , cy , base , size );
1784	#endif
1785	break;
1786	}
1787	}
1788
1789	if ( found == 0 )
1790	{
1791	_printf("\n[BOOT ERROR] boot_pmem_init() : no RAM in cluster[%d][%d]\n",
1792	cx , cy );
1793	_exit();
1794	}
1795	} // end boot_pmem_init()
1796
1797	/////////////////////////////////////////////////////////////////////////
1798	// This function is the entry point of the boot code for all processors.
1799	/////////////////////////////////////////////////////////////////////////
1800	void boot_init()
1801	{
1802
1803	unsigned int gpid = _get_procid();
1804	unsigned int cx = gpid >> (Y_WIDTH + P_WIDTH);
1805	unsigned int cy = (gpid >> P_WIDTH) & ((1<<Y_WIDTH)-1);
1806	unsigned int lpid = gpid & ((1 << P_WIDTH) -1);
1807
1808	//////////////////////////////////////////////////////////
1809	// Phase ONE : only P[0][0][0] execute it
1810	//////////////////////////////////////////////////////////
1811	if ( gpid == 0 )
1812	{
1813	unsigned int cid; // index for loop on clusters
1814
1815	// initialises the TTY0 spin lock
1816	_spin_lock_init( &_tty0_spin_lock );
1817
1818	_printf("\n[BOOT] P[0,0,0] starts at cycle %d\n", _get_proctime() );
1819
1820	// initialise the MMC locks array
1821	_mmc_boot_mode = 1;
1822	_mmc_init_locks();
1823
1824	// initialises the IOC peripheral
1825	if ( USE_IOC_BDV != 0 ) _bdv_init();
1826	else if ( USE_IOC_HBA != 0 ) _hba_init();
1827	else if ( USE_IOC_SDC != 0 ) _sdc_init();
1828	else if ( USE_IOC_RDK == 0 )
1829	{
1830	_printf("\n[BOOT ERROR] boot_init() : no IOC peripheral\n");
1831	_exit();
1832	}
1833
1834	// initialises the FAT
1835	_fat_init( 0 ); // don't use Inode-Tree, Fat-Cache, etc.
1836
1837	_printf("\n[BOOT] FAT initialised at cycle %d\n", _get_proctime() );
1838
1839	// Load the map.bin file into memory
1840	boot_mapping_init();
1841
1842	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
1843	mapping_cluster_t* cluster = _get_cluster_base(header);
1844
1845	_printf("\n[BOOT] Mapping %s loaded at cycle %d\n",
1846	header->name , _get_proctime() );
1847
1848	// initialises the barrier for all clusters containing processors
1849	unsigned int nclusters = 0;
1850	for ( cid = 0 ; cid < X_SIZE*Y_SIZE ; cid++ )
1851	{
1852	if ( cluster[cid].procs ) nclusters++ ;
1853	}
1854
1855	_simple_barrier_init( &_barrier_all_clusters , nclusters );
1856
1857	// wake up all processors P[x][y][0]
1858	for ( cid = 1 ; cid < X_SIZE*Y_SIZE ; cid++ )
1859	{
1860	unsigned int x = cluster[cid].x;
1861	unsigned int y = cluster[cid].y;
1862	unsigned int cluster_xy = (x << Y_WIDTH) + y;
1863
1864	if ( cluster[cid].procs )
1865	{
1866	unsigned long long paddr = (((unsigned long long)cluster_xy)<<32) +
1867	SEG_XCU_BASE+XCU_REG( XCU_WTI_REG , 0 );
1868
1869	_physical_write( paddr , (unsigned int)boot_entry );
1870	}
1871	}
1872
1873	_printf("\n[BOOT] Processors P[x,y,0] start at cycle %d\n",
1874	_get_proctime() );
1875	}
1876
1877	/////////////////////////////////////////////////////////////////
1878	// Phase TWO : All processors P[x][y][0] execute it in parallel
1879	/////////////////////////////////////////////////////////////////
1880	if( lpid == 0 )
1881	{
1882	// Initializes physical memory allocator in cluster[cx][cy]
1883	boot_pmem_init( cx , cy );
1884
1885	// Build page table in cluster[cx][cy]
1886	boot_ptab_init( cx , cy );
1887
1888	//////////////////////////////////////////////
1889	_simple_barrier_wait( &_barrier_all_clusters );
1890	//////////////////////////////////////////////
1891
1892	// P[0][0][0] complete page tables with vsegs
1893	// mapped in clusters without processors
1894	if ( gpid == 0 )
1895	{
1896	// complete page tables initialisation
1897	boot_ptab_extend();
1898
1899	_printf("\n[BOOT] Physical memory allocators and page tables"
1900	" initialized at cycle %d\n", _get_proctime() );
1901	}
1902
1903	//////////////////////////////////////////////
1904	_simple_barrier_wait( &_barrier_all_clusters );
1905	//////////////////////////////////////////////
1906
1907	// All processors P[x,y,0] activate MMU (using local PTAB)
1908	_set_mmu_ptpr( (unsigned int)(_ptabs_paddr[0][cx][cy]>>13) );
1909	_set_mmu_mode( 0xF );
1910
1911	// Each processor P[x,y,0] initialises all schedulers in cluster[x,y]
1912	boot_scheduler_init( cx , cy );
1913
1914	// Each processor P[x][y][0] initialises its CP0_SCHED register
1915	_set_sched( (unsigned int)_schedulers[cx][cy][0] );
1916
1917	//////////////////////////////////////////////
1918	_simple_barrier_wait( &_barrier_all_clusters );
1919	//////////////////////////////////////////////
1920
1921	if ( gpid == 0 )
1922	{
1923	_printf("\n[BOOT] Schedulers initialised at cycle %d\n",
1924	_get_proctime() );
1925	}
1926
1927	// All processor P[x,y,0] contributes to load .elf files into clusters.
1928	boot_elf_load();
1929
1930	//////////////////////////////////////////////
1931	_simple_barrier_wait( &_barrier_all_clusters );
1932	//////////////////////////////////////////////
1933
1934	// Each processor P[x][y][0] wake up other processors in same cluster
1935	mapping_header_t* header = (mapping_header_t *)SEG_BOOT_MAPPING_BASE;
1936	mapping_cluster_t* cluster = _get_cluster_base(header);
1937	unsigned int cluster_xy = (cx << Y_WIDTH) + cy;
1938	unsigned int cluster_id = (cx * Y_SIZE) + cy;
1939	unsigned int p;
1940	for ( p = 1 ; p < cluster[cluster_id].procs ; p++ )
1941	{
1942	_xcu_send_wti( cluster_xy , p , (unsigned int)boot_entry );
1943	}
1944
1945	// only P[0][0][0] makes display
1946	if ( gpid == 0 )
1947	{
1948	_printf("\n[BOOT] All processors start at cycle %d\n",
1949	_get_proctime() );
1950	}
1951	}
1952	// All other processors activate MMU (using local PTAB)
1953	if ( lpid != 0 )
1954	{
1955	_set_mmu_ptpr( (unsigned int)(_ptabs_paddr[0][cx][cy]>>13) );
1956	_set_mmu_mode( 0xF );
1957	}
1958
1959	// All processors set CP0_SCHED register
1960	_set_sched( (unsigned int)_schedulers[cx][cy][lpid] );
1961
1962	// All processors reset BEV bit in SR to use GIET_VM exception handler
1963	_set_sr( 0 );
1964
1965	// Each processor get kernel entry virtual address
1966	unsigned int kernel_entry = (unsigned int)&kernel_init_vbase;
1967
1968	#if BOOT_DEBUG_ELF
1969	_printf("\n[DEBUG BOOT_ELF] P[%d,%d,%d] exit boot & jump to %x at cycle %d\n",
1970	cx, cy, lpid, kernel_entry , _get_proctime() );
1971	#endif
1972
1973	// All processors jump to kernel_init
1974	asm volatile( "jr %0" ::"r"(kernel_entry) );
1975
1976	} // end boot_init()
1977
1978
1979	// Local Variables:
1980	// tab-width: 4
1981	// c-basic-offset: 4
1982	// c-file-offsets:((innamespace . 0)(inline-open . 0))
1983	// indent-tabs-mode: nil
1984	// End:
1985	// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
1986

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