source: soft/giet_vm/giet_common/mips32_registers.h @ 396

Last change on this file since 396 was 295, checked in by alain, 11 years ago

Introducing a major release, to suppoort the tsar_generic_leti platform
and the various (external or internal) peripherals configurations.
The map.xml format has been modified, in order to support the new
vci_iopic componentand a new policy for peripherals initialisation.
The IRQs are nom described in the XICU and IOPIC components
(and not anymore in the processors).
To enforce this major change, the map.xml file signature changed:
The signature value must be: 0xDACE2014

This new release has been tested on the tsar_generic_leti platform
for the following mappings:

  • 4c_4p_sort_leti
  • 4c_4p_sort_leti_ext
  • 4c_4p_transpose_leti
  • 4c_4p_transpose_leti_ext
  • 4c_1p_four_leti_ext
  • Property svn:executable set to *
File size: 2.3 KB
Line 
1/********************************************************************************/
2/*    File : mips32_registers.h                        */
3/*    Author : Alain Greiner                            */
4/*    Date : 26/03/2012                            */
5/********************************************************************************/
6/*     We define mnemonics for MIPS32 registers                          */
7/********************************************************************************/
8
9#ifndef _MIPS32_REGISTER_H
10#define _MIPS32_REGISTER_H
11
12/* processor registers */
13
14#define zero  $0
15#define at    $1
16#define v0    $2
17#define v1    $3
18#define a0    $4
19#define a1    $5
20#define a2    $6
21#define a3    $7
22#define t0    $8
23#define t1    $9
24#define t2    $10
25#define t3    $11
26#define t4    $12
27#define t5    $13
28#define t6    $14
29#define t7    $15
30#define s0    $16
31#define s1    $17
32#define s2    $18
33#define s3    $19
34#define s4    $20
35#define s5    $21
36#define s6    $22
37#define s7    $23
38#define t8    $24
39#define t9    $25
40#define k0    $26
41#define k1    $27
42#define gp    $28
43#define sp    $29
44#define fp    $30
45#define ra    $31
46
47/* CP0 registers */
48
49#define CP0_BVAR       $8
50#define CP0_TIME       $9
51#define CP0_SR         $12
52#define CP0_CR         $13
53#define CP0_EPC        $14
54#define CP0_PROCID     $15,1
55#define CP0_SCHED      $4,2
56#define CP0_SRSAVE     $8
57
58/* CP2 registers */
59
60#define CP2_PTPR             $0
61#define CP2_MODE             $1
62#define CP2_ICACHE_FLUSH     $2
63#define CP2_DCACHE_FLUSH     $3
64#define CP2_ITLB_INVAL       $4
65#define CP2_DTLB_INVAL       $5
66#define CP2_ICACHE_INVAL     $6
67#define CP2_DCACHE_INVAL     $7
68#define CP2_ICACHE_PREFETCH  $8
69#define CP2_DCACHE_PREFETCH  $9
70#define CP2_SYNC             $10
71#define CP2_IETR             $11
72#define CP2_DETR             $12
73#define CP2_IBVAR            $13
74#define CP2_DBVAR            $14
75#define CP2_PARAMS           $15
76#define CP2_RELEASE          $16
77#define CP2_DATA_LO          $17     
78#define CP2_DATA_HI          $18         
79#define CP2_ICACHE_INVAL_PA  $19         
80#define CP2_DCACHE_INVAL_PA  $20
81#define CP2_PADDR_EXT        $24
82#endif
83
84// Local Variables:
85// tab-width: 4
86// c-basic-offset: 4
87// c-file-offsets:((innamespace . 0)(inline-open . 0))
88// indent-tabs-mode: nil
89// End:
90// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
91
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