[258] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : dma_driver.c |
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| 3 | // Date : 23/11/2013 |
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| 4 | // Author : alain greiner |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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| 7 | |
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| 8 | #include <giet_config.h> |
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[320] | 9 | #include <hard_config.h> |
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[258] | 10 | #include <dma_driver.h> |
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[456] | 11 | #include <tty0.h> |
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[258] | 12 | #include <vmem.h> |
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[320] | 13 | #include <utils.h> |
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[345] | 14 | #include <io.h> |
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[258] | 15 | |
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[263] | 16 | #if !defined(X_SIZE) |
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| 17 | # error: You must define X_SIZE in the hard_config.h file |
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[258] | 18 | #endif |
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| 19 | |
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[263] | 20 | #if !defined(Y_SIZE) |
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| 21 | # error: You must define X_SIZE in the hard_config.h file |
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[258] | 22 | #endif |
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| 23 | |
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[263] | 24 | #if !defined(X_WIDTH) |
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| 25 | # error: You must define X_WIDTH in the hard_config.h file |
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[258] | 26 | #endif |
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| 27 | |
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[263] | 28 | #if !defined(Y_WIDTH) |
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| 29 | # error: You must define X_WIDTH in the hard_config.h file |
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[258] | 30 | #endif |
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| 31 | |
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[263] | 32 | #if !defined(NB_DMA_CHANNELS) |
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| 33 | # error: You must define NB_DMA_CHANNELS in the hard_config.h file |
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[258] | 34 | #endif |
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| 35 | |
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[320] | 36 | #if !defined(SEG_DMA_BASE) |
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| 37 | # error: You must define SEG_DMA_BASE in the hard_config.h file |
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| 38 | #endif |
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| 39 | |
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[333] | 40 | #if !defined(PERI_CLUSTER_INCREMENT) |
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| 41 | # error: You must define PERI_CLUSTER_INCREMENT in the hard_config.h file |
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[320] | 42 | #endif |
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| 43 | |
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[345] | 44 | extern volatile unsigned int _ptabs_vaddr[]; |
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[258] | 45 | |
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[345] | 46 | /////////////////////////////////////////////////////////////////////////////// |
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| 47 | // This low level function returns the value contained in register "index" |
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| 48 | // in the DMA component contained in cluster "cluster_xy" |
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| 49 | /////////////////////////////////////////////////////////////////////////////// |
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[496] | 50 | |
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| 51 | #if NB_DMA_CHANNELS > 0 |
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[345] | 52 | static |
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| 53 | unsigned int _dma_get_register( unsigned int cluster_xy, // cluster index |
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| 54 | unsigned int channel_id, // channel index |
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| 55 | unsigned int index ) // register index |
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| 56 | { |
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| 57 | unsigned int vaddr = |
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| 58 | SEG_DMA_BASE + |
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| 59 | (cluster_xy * PERI_CLUSTER_INCREMENT) + |
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| 60 | (channel_id * DMA_SPAN) + |
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| 61 | (index << 2); |
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| 62 | |
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| 63 | return ioread32( (void*)vaddr ); |
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| 64 | } |
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[496] | 65 | #endif |
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[345] | 66 | |
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| 67 | /////////////////////////////////////////////////////////////////////////////// |
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| 68 | // This low level function sets a new value in register "index" |
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| 69 | // in the DMA component contained in cluster "cluster_xy" |
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| 70 | /////////////////////////////////////////////////////////////////////////////// |
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[496] | 71 | |
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| 72 | #if NB_DMA_CHANNELS > 0 |
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[345] | 73 | static |
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| 74 | void _dma_set_register( unsigned int cluster_xy, // cluster index |
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| 75 | unsigned int channel_id, // channel index |
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| 76 | unsigned int index, // register index |
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| 77 | unsigned int value ) // value to be written |
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| 78 | { |
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| 79 | unsigned int vaddr = |
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| 80 | SEG_DMA_BASE + |
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| 81 | (cluster_xy * PERI_CLUSTER_INCREMENT) + |
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| 82 | (channel_id * DMA_SPAN) + |
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| 83 | (index << 2); |
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| 84 | |
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| 85 | iowrite32( (void*)vaddr, value ); |
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| 86 | } |
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[496] | 87 | #endif |
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[345] | 88 | |
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[437] | 89 | //////////////////////////////////////////////// |
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[529] | 90 | void _dma_disable_irq( unsigned int cluster_xy, |
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| 91 | unsigned int channel_id ) |
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[258] | 92 | { |
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| 93 | #if NB_DMA_CHANNELS > 0 |
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[263] | 94 | |
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[529] | 95 | // check DMA channel parameters |
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[263] | 96 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 97 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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[529] | 98 | if ( (x >= X_SIZE) || (y >= Y_SIZE) || (channel_id >= NB_DMA_CHANNELS) ) |
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| 99 | { |
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| 100 | _puts("\n[DMA ERROR] in _dma_disable_irq() : illegal DMA channel "); |
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| 101 | _exit(); |
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| 102 | } |
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[258] | 103 | |
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| 104 | // disable interrupt for selected channel |
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[345] | 105 | _dma_set_register(cluster_xy, channel_id, DMA_IRQ_DISABLE, 1); |
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[529] | 106 | |
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[258] | 107 | #endif |
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| 108 | } |
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| 109 | |
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[529] | 110 | ///////////////////////////////////////////////// |
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| 111 | void _dma_reset_channel( unsigned int cluster_xy, |
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[258] | 112 | unsigned int channel_id ) |
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| 113 | { |
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| 114 | #if NB_DMA_CHANNELS > 0 |
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[263] | 115 | |
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[529] | 116 | // check DMA channel parameters |
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[263] | 117 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 118 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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[529] | 119 | if ( (x >= X_SIZE) || (y >= Y_SIZE) || (channel_id >= NB_DMA_CHANNELS) ) |
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| 120 | { |
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| 121 | _puts("\n[DMA ERROR] in _dma_reset_channel() : illegal DMA channel "); |
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| 122 | _exit(); |
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| 123 | } |
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[258] | 124 | |
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| 125 | // reset selected channel |
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[345] | 126 | _dma_set_register(cluster_xy, channel_id, DMA_RESET, 0); |
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[529] | 127 | |
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[258] | 128 | #endif |
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| 129 | } |
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| 130 | |
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[529] | 131 | /////////////////////////////////////////////////////// |
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| 132 | void _dma_get_status( unsigned int cluster_xy, |
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| 133 | unsigned int channel_id, |
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| 134 | unsigned int* status ) |
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[258] | 135 | { |
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| 136 | #if NB_DMA_CHANNELS > 0 |
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[263] | 137 | |
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[529] | 138 | // check DMA channel parameters |
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[263] | 139 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 140 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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[529] | 141 | if ( (x >= X_SIZE) || (y >= Y_SIZE) || (channel_id >= NB_DMA_CHANNELS) ) |
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| 142 | { |
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| 143 | _puts("\n[DMA ERROR] in _dma_get_status() : illegal DMA channel "); |
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| 144 | _exit(); |
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| 145 | } |
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[258] | 146 | |
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[529] | 147 | // returns selected channel status |
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| 148 | *status = _dma_get_register(cluster_xy, channel_id, DMA_LEN); |
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| 149 | |
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[258] | 150 | #endif |
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| 151 | } |
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| 152 | |
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[437] | 153 | //////////////////////////////////////////////////////// |
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[343] | 154 | void _dma_start_transfer( unsigned int cluster_xy, // DMA cluster |
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| 155 | unsigned int channel_id, // DMA channel |
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| 156 | unsigned long long dst_paddr, // physical address |
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| 157 | unsigned long long src_paddr, // physical address |
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| 158 | unsigned int size ) // bytes |
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[258] | 159 | { |
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| 160 | #if NB_DMA_CHANNELS > 0 |
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[263] | 161 | |
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[529] | 162 | // check DMA channel parameters |
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| 163 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 164 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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| 165 | if ( (x >= X_SIZE) || (y >= Y_SIZE) || (channel_id >= NB_DMA_CHANNELS) ) |
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| 166 | { |
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| 167 | _puts("\n[DMA ERROR] in _dma_start_transfer() : illegal DMA channel "); |
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| 168 | _exit(); |
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| 169 | } |
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| 170 | |
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[258] | 171 | // selected channel configuration and lauching |
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[345] | 172 | _dma_set_register(cluster_xy, channel_id, DMA_SRC, |
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| 173 | (unsigned int)(src_paddr)); |
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| 174 | _dma_set_register(cluster_xy, channel_id, DMA_SRC_EXT, |
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| 175 | (unsigned int)(src_paddr>>32)); |
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| 176 | _dma_set_register(cluster_xy, channel_id, DMA_DST, |
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| 177 | (unsigned int)(dst_paddr)); |
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| 178 | _dma_set_register(cluster_xy, channel_id, DMA_DST_EXT, |
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| 179 | (unsigned int)(dst_paddr>>32)); |
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| 180 | _dma_set_register(cluster_xy, channel_id, DMA_LEN, |
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| 181 | (unsigned int)size); |
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[258] | 182 | #endif |
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| 183 | } |
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[343] | 184 | |
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[437] | 185 | /////////////////////////////////////////////////////// |
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[343] | 186 | void _dma_physical_copy( unsigned int cluster_xy, // DMA cluster |
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| 187 | unsigned int channel_id, // DMA channel |
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[529] | 188 | unsigned long long dst_paddr, // dest physical address |
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| 189 | unsigned long long src_paddr, // src physical address |
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[343] | 190 | unsigned int size ) // bytes |
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| 191 | { |
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| 192 | #if NB_DMA_CHANNELS > 0 |
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| 193 | |
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| 194 | // check buffers alignment constraints |
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| 195 | if ( (dst_paddr & 0x3) || (src_paddr & 0x3) || (size & 0x3) ) |
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| 196 | { |
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[437] | 197 | _puts("\n[DMA ERROR] in _dma_physical_copy() : buffer unaligned\n"); |
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[343] | 198 | _exit(); |
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| 199 | } |
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| 200 | |
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| 201 | #if GIET_DEBUG_DMA_DRIVER |
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[529] | 202 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 203 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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[437] | 204 | _puts("\n[DMA DEBUG] enter _dma_physical_copy() for channel["); |
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| 205 | _putd( x ); |
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| 206 | _puts(","); |
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| 207 | _putd( y ); |
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| 208 | _puts(","); |
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| 209 | _putd( channel_id ); |
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| 210 | _puts("] at cycle "); |
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| 211 | _putd( _get_proctime() ); |
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| 212 | _puts("\n - src_paddr = "); |
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| 213 | _putl( src_paddr ); |
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| 214 | _puts("\n - dst_paddr = "); |
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| 215 | _putl( dst_paddr ); |
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| 216 | _puts("\n - bytes = "); |
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[529] | 217 | _putx( size ); |
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[437] | 218 | _puts("\n"); |
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[343] | 219 | #endif |
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| 220 | |
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[529] | 221 | // dma channel configuration |
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| 222 | _dma_disable_irq( cluster_xy, channel_id ); |
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| 223 | |
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| 224 | // dma transfer lauching |
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[343] | 225 | _dma_start_transfer( cluster_xy, channel_id, dst_paddr, src_paddr, size ); |
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| 226 | |
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| 227 | // scan dma channel status |
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[529] | 228 | unsigned int status; |
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| 229 | do |
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[343] | 230 | { |
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[529] | 231 | _dma_get_status( cluster_xy, channel_id , &status ); |
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[343] | 232 | |
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| 233 | #if GIET_DEBUG_DMA_DRIVER |
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[529] | 234 | _puts("\n[DMA DEBUG] _dma_physical_copy() : ... waiting on DMA_STATUS\n"); |
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[343] | 235 | #endif |
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| 236 | |
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| 237 | } |
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[529] | 238 | while( (status != DMA_SUCCESS) && |
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| 239 | (status != DMA_READ_ERROR) && |
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| 240 | (status != DMA_WRITE_ERROR) ); |
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[343] | 241 | |
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| 242 | // analyse status |
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| 243 | if( status != DMA_SUCCESS ) |
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| 244 | { |
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[529] | 245 | _puts("\n[DMA ERROR] in _dma_physical_copy() : ERROR_STATUS"); |
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[343] | 246 | _exit(); |
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| 247 | } |
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[437] | 248 | |
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[343] | 249 | // reset dma channel |
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[529] | 250 | _dma_reset_channel( cluster_xy , channel_id ); |
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[343] | 251 | |
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| 252 | #if GIET_DEBUG_DMA_DRIVER |
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[437] | 253 | _puts("\n[DMA DEBUG] exit _dma_physical_copy() at cycle "); |
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| 254 | _putd( _get_proctime() ); |
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| 255 | _puts("\n"); |
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[343] | 256 | #endif |
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| 257 | |
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| 258 | #else // NB_DMA_CHANNELS == 0 |
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[437] | 259 | |
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| 260 | _puts("\n[DMA ERROR] in _dma_physical_copy() : NB_DMA_CHANNELS == 0\n"); |
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[343] | 261 | _exit(); |
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[437] | 262 | |
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[343] | 263 | #endif |
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| 264 | } |
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| 265 | |
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[437] | 266 | |
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| 267 | //////////////////////////////////////// |
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[343] | 268 | void _dma_copy( unsigned int cluster_xy, // DMA cluster |
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| 269 | unsigned int channel_id, // DMA channel |
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| 270 | unsigned int dst_vaddr, // dst_vaddr buffer vbase |
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| 271 | unsigned int src_vaddr, // src_vaddr buffer vbase |
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| 272 | unsigned int size ) // bytes |
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[258] | 273 | { |
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| 274 | #if NB_DMA_CHANNELS > 0 |
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| 275 | |
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[343] | 276 | // check buffers alignment constraints |
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| 277 | if ( (dst_vaddr & 0x3) || (src_vaddr & 0x3) || (size & 0x3) ) |
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| 278 | { |
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[437] | 279 | _puts("\n[DMA ERROR] in _dma_copy() : buffer unaligned\n"); |
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[343] | 280 | _exit(); |
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| 281 | } |
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| 282 | |
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[529] | 283 | unsigned long long src_paddr; |
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| 284 | unsigned long long dst_paddr; |
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[258] | 285 | unsigned int flags; |
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| 286 | |
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| 287 | #if GIET_DEBUG_DMA_DRIVER |
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[529] | 288 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 289 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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[437] | 290 | _puts("\n[DMA DEBUG] enter _dma_copy() for channel["); |
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| 291 | _putd( x ); |
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| 292 | _puts(","); |
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| 293 | _putd( y ); |
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| 294 | _puts(","); |
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| 295 | _putd( channel_id ); |
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| 296 | _puts("] at cycle "); |
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| 297 | _putd( _get_proctime() ); |
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| 298 | _puts("\n - src_vaddr = "); |
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| 299 | _putx( src_vaddr ); |
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| 300 | _puts("\n - dst_vaddr = "); |
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| 301 | _putx( dst_vaddr ); |
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| 302 | _puts("\n - bytes = "); |
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| 303 | _putd( size ); |
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| 304 | _puts("\n"); |
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[258] | 305 | #endif |
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| 306 | |
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[343] | 307 | // get src_paddr buffer physical addresse |
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[529] | 308 | src_paddr = _v2p_translate( src_vaddr , &flags ); |
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[258] | 309 | |
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[343] | 310 | // get dst_paddr buffer physical addresse |
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[529] | 311 | dst_paddr = _v2p_translate( dst_vaddr , &flags ); |
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[258] | 312 | |
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| 313 | #if GIET_DEBUG_DMA_DRIVER |
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[437] | 314 | _puts("\n - src_paddr = "); |
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| 315 | _putl( src_paddr ); |
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| 316 | _puts("\n - dst_paddr = "); |
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| 317 | _putl( dst_paddr ); |
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| 318 | _puts("\n"); |
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[258] | 319 | #endif |
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| 320 | |
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| 321 | // dma channel configuration & lauching |
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[343] | 322 | _dma_start_transfer( cluster_xy, channel_id, dst_paddr, src_paddr, size ); |
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[258] | 323 | |
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| 324 | // scan dma channel status |
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[529] | 325 | unsigned int status; |
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| 326 | do |
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[258] | 327 | { |
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[529] | 328 | _dma_get_status( cluster_xy, channel_id , &status ); |
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[258] | 329 | |
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| 330 | #if GIET_DEBUG_DMA_DRIVER |
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[529] | 331 | _puts("\n[DMA DEBUG] _dma_physical_copy() : ... waiting on DMA_STATUS\n"); |
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[258] | 332 | #endif |
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| 333 | |
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| 334 | } |
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[529] | 335 | while( (status != DMA_SUCCESS) && |
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| 336 | (status != DMA_READ_ERROR) && |
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| 337 | (status != DMA_WRITE_ERROR) ); |
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[258] | 338 | |
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| 339 | // analyse status |
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| 340 | if( status != DMA_SUCCESS ) |
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| 341 | { |
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[437] | 342 | _puts("\n[DMA ERROR] in _dma_copy() : bad DMA_STATUS\n"); |
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[258] | 343 | _exit(); |
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| 344 | } |
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| 345 | // reset dma channel |
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[529] | 346 | _dma_reset_channel( cluster_xy, channel_id ); |
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[258] | 347 | |
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| 348 | #if GIET_DEBUG_DMA_DRIVER |
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[437] | 349 | _puts("\n[DMA DEBUG] exit _dma_copy() at cycle "); |
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| 350 | _putd( _get_proctime() ); |
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| 351 | _puts("\n"); |
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[258] | 352 | #endif |
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| 353 | |
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| 354 | #else // NB_DMA_CHANNELS == 0 |
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[437] | 355 | |
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| 356 | _puts("\n[DMA ERROR] in _dma_copy() : NB_DMA_CHANNELS == 0\n"); |
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[258] | 357 | _exit(); |
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[437] | 358 | |
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[258] | 359 | #endif |
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| 360 | } // end _dma_copy |
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| 361 | |
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[529] | 362 | |
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[437] | 363 | ///////////////////////////////////// |
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[320] | 364 | void _dma_isr( unsigned int irq_type, |
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| 365 | unsigned int irq_id, |
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| 366 | unsigned int channel ) |
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| 367 | { |
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[437] | 368 | _puts("\n[DMA ERROR] _dma_isr() not implemented\n"); |
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[320] | 369 | _exit(); |
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| 370 | } |
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[258] | 371 | |
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| 372 | |
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| 373 | |
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[320] | 374 | |
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[258] | 375 | // tab-width: 4 |
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| 376 | // c-basic-offset: 4 |
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| 377 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 378 | // indent-tabs-mode: nil |
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| 379 | // End: |
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| 380 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 381 | |
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