[258] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : hba_driver.c |
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| 3 | // Date : 23/11/2013 |
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[295] | 4 | // Author : alain greiner |
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[258] | 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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[295] | 7 | // Implementation notes: |
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| 8 | // 1. In order to share code, the two _hba_read() and _hba_write() functions |
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| 9 | // call the same _hba_set_cmd() function. |
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| 10 | // 2. All accesses to HBA registers are done by the two |
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| 11 | // _hba_set_register() and _hba_get_register() low-level functions, |
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| 12 | // that are handling virtual / physical extended addressing. |
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[258] | 13 | /////////////////////////////////////////////////////////////////////////////////// |
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| 14 | |
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| 15 | #include <giet_config.h> |
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| 16 | #include <ioc_driver.h> |
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| 17 | #include <utils.h> |
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[456] | 18 | #include <tty0.h> |
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[258] | 19 | #include <iob_driver.h> |
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| 20 | #include <ctx_handler.h> |
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| 21 | #include <mmc_driver.h> |
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[289] | 22 | #include <hba_driver.h> |
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[258] | 23 | #include <vmem.h> |
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| 24 | |
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[295] | 25 | #if !defined( NB_IOC_CHANNELS ) |
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| 26 | # error: You must define NB_IOC_CHANNELS in the hard_config.h file |
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[258] | 27 | #endif |
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| 28 | |
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[295] | 29 | #if ( NB_IOC_CHANNELS > 8 ) |
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| 30 | # error: NB_IOC_CHANNELS cannot be larger than 8 |
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[258] | 31 | #endif |
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| 32 | |
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| 33 | #define in_unckdata __attribute__((section (".unckdata"))) |
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| 34 | |
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| 35 | ////////////////////////////////////////////////////////////////// |
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[437] | 36 | // Global variables |
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[258] | 37 | ////////////////////////////////////////////////////////////////// |
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| 38 | |
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| 39 | // command list array (one per channel) |
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[295] | 40 | hba_cmd_list_t hba_cmd_list[NB_IOC_CHANNELS] __attribute__((aligned(0x1000))); |
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[258] | 41 | |
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| 42 | // command tables array (32 command tables per channel) |
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[295] | 43 | hba_cmd_table_t hba_cmd_table[NB_IOC_CHANNELS][32] __attribute__((aligned(0x1000))); |
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[258] | 44 | |
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| 45 | // command list physical addresses array (one per channel) |
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[295] | 46 | paddr_t hba_cmd_list_paddr[NB_IOC_CHANNELS]; |
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[258] | 47 | |
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| 48 | // command tables physical addresses array (32 command tables per channel) |
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[295] | 49 | paddr_t hba_cmd_table_paddr[NB_IOC_CHANNELS][32]; |
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[258] | 50 | |
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| 51 | // command list pointer array (one per channel) |
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[295] | 52 | unsigned int hba_cmd_slot[NB_IOC_CHANNELS]; |
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[258] | 53 | |
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[295] | 54 | ////////////////////////////////////////////////////////////////////////////// |
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| 55 | // This low level function returns the value of register (channel / index) |
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| 56 | ////////////////////////////////////////////////////////////////////////////// |
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| 57 | unsigned int _hba_get_register( unsigned int channel, |
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| 58 | unsigned int index ) |
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[258] | 59 | { |
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[320] | 60 | unsigned int* vaddr = (unsigned int*)SEG_IOC_BASE + channel*HBA_SPAN + index; |
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[295] | 61 | return _io_extended_read( vaddr ); |
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| 62 | } |
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[258] | 63 | |
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[295] | 64 | ////////////////////////////////////////////////////////////////////////////// |
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| 65 | // This low level function set a new value in register (channel / index) |
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| 66 | ////////////////////////////////////////////////////////////////////////////// |
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| 67 | void _hba_set_register( unsigned int channel, |
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| 68 | unsigned int index, |
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| 69 | unsigned int value ) |
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| 70 | { |
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[320] | 71 | unsigned int* vaddr = (unsigned int*)SEG_IOC_BASE + channel*HBA_SPAN + index; |
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[295] | 72 | _io_extended_write( vaddr, value ); |
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[258] | 73 | } |
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| 74 | |
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[295] | 75 | |
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[258] | 76 | /////////////////////////////////////////////////////////////////////////////// |
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| 77 | // This function register a command in both the command list |
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| 78 | // and the command table, and updates the HBA_PXCI register. |
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| 79 | // It uses the AHCI Scatter/Gather mechanisme to split the user |
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| 80 | // buffer in several physical buffers, with the constraint that each physical |
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| 81 | // buffer must be an integer number of blocks entirely contained in a single |
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| 82 | // page frame. |
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[437] | 83 | // return 0 if success, -1 if error |
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[258] | 84 | /////////////////////////////////////////////////////////////////////////////// |
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[295] | 85 | unsigned int _hba_cmd_set( unsigned int channel, // channel index |
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| 86 | unsigned int is_read, // to memory |
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[258] | 87 | unsigned int lba, // logic block address |
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[295] | 88 | paddr_t buffer, // buffer physical address |
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[258] | 89 | unsigned int count ) // number of blocks |
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| 90 | { |
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| 91 | unsigned int block_size; // defined by the block device (bytes) |
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| 92 | unsigned int pxci; // command list status |
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| 93 | unsigned int cmd_id; // command index in command list |
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[295] | 94 | |
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[258] | 95 | hba_cmd_desc_t* cmd_desc; // command descriptor pointer |
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| 96 | hba_cmd_table_t* cmd_table; // command table pointer |
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| 97 | |
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[289] | 98 | block_size = _hba_get_block_size(); |
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[258] | 99 | |
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| 100 | // check buffer alignment |
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[295] | 101 | if( buffer & (block_size-1) ) |
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[258] | 102 | { |
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[437] | 103 | _puts("\n[GIET ERROR] in _hba_set_cmd() : user buffer not block aligned\n"); |
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| 104 | return -1; |
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[258] | 105 | } |
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| 106 | |
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[295] | 107 | // get command list status from PXCI register |
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| 108 | pxci = _hba_get_register( channel, HBA_PXCI ); |
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[258] | 109 | |
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| 110 | // get command index and return error if command list full |
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[295] | 111 | cmd_id = hba_cmd_slot[channel]; |
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[258] | 112 | if( pxci & (1<<cmd_id ) ) |
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| 113 | { |
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[437] | 114 | _puts("\n[GIET ERROR] in _hba_set_cmd() : command list full for channel "); |
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| 115 | _putd( channel ); |
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| 116 | _puts("\n"); |
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| 117 | return -1; |
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[258] | 118 | } |
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| 119 | |
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| 120 | // compute pointers on command descriptor and command table |
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[295] | 121 | cmd_desc = (hba_cmd_desc_t*)(&(hba_cmd_list[channel].desc[cmd_id])); |
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| 122 | cmd_table = (hba_cmd_table_t*)(&(hba_cmd_table[channel][cmd_id])); |
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[258] | 123 | |
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[295] | 124 | // set buffer descriptor in command table |
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| 125 | cmd_table->entry[0].dba = (unsigned int)(buffer); |
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| 126 | cmd_table->entry[0].dbau = (unsigned int)(buffer >> 32); |
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| 127 | cmd_table->entry[0].dbc = count * block_size; |
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| 128 | |
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| 129 | // initialize command table header |
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| 130 | cmd_table->header.lba0 = (char)lba; |
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| 131 | cmd_table->header.lba1 = (char)(lba>>8); |
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| 132 | cmd_table->header.lba2 = (char)(lba>>16); |
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| 133 | cmd_table->header.lba3 = (char)(lba>>24); |
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| 134 | cmd_table->header.lba4 = 0; |
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| 135 | cmd_table->header.lba5 = 0; |
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| 136 | |
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| 137 | // initialise command descriptor |
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| 138 | cmd_desc->prdtl[0] = 1; |
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| 139 | cmd_desc->prdtl[1] = 0; |
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| 140 | cmd_desc->ctba = (unsigned int)(hba_cmd_table_paddr[channel][cmd_id]); |
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| 141 | cmd_desc->ctbau = (unsigned int)(hba_cmd_table_paddr[channel][cmd_id]>>32); |
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| 142 | if( is_read ) cmd_desc->flag[0] = 0x00; |
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| 143 | else cmd_desc->flag[0] = 0x40; |
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| 144 | |
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| 145 | // update PXCI register |
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| 146 | _hba_set_register( channel, HBA_PXCI, (1<<cmd_id) ); |
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| 147 | |
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| 148 | // update command pointer |
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| 149 | hba_cmd_slot[channel] = (cmd_id + 1)%32; |
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| 150 | |
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| 151 | return 0; |
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| 152 | } |
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| 153 | |
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| 154 | /* This can be used for a future use with buffer in virtual space |
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| 155 | |
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[258] | 156 | // get user space page table virtual address |
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| 157 | user_pt_vbase = _get_context_slot(CTX_PTAB_ID); |
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| 158 | vpn_min = buf_vaddr >> 12; |
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| 159 | vpn_max = (buf_vaddr + (block_size*count) - 1) >> 12; |
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| 160 | offset = buf_vaddr & 0xFFF; |
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| 161 | offset_last = (buf_vaddr + (block_size*count) - 1) & 0xFFF; |
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| 162 | |
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| 163 | // initialize all buffer descriptors in command table |
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| 164 | // (loop on all virtual pages covering the user buffer) |
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| 165 | for( vpn = vpn_min, buf_id = 0 ; vpn <= vpn_max ; vpn++ ) |
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| 166 | { |
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| 167 | paddr_t paddr; |
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| 168 | unsigned int count; |
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| 169 | unsigned int ppn; |
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| 170 | unsigned int flags; |
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| 171 | unsigned int ko; |
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| 172 | unsigned int buf_id = 0; |
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| 173 | |
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| 174 | // get ppn and flags |
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[481] | 175 | _v2p_translate( (page_table_t*)user_pt_vbase, |
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| 176 | vpn, |
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| 177 | &ppn, |
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| 178 | &flags ); |
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[258] | 179 | |
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| 180 | // check access rights |
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| 181 | if ((flags & PTE_U) == 0) |
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| 182 | { |
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[437] | 183 | _puts("[GIET ERROR] in _hba_set_cmd() : user buffer not in user space\n"); |
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| 184 | return -1; |
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[258] | 185 | } |
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| 186 | if (((flags & PTE_W) == 0 ) && (is_read == 0) ) |
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| 187 | { |
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[437] | 188 | _puts("[GIET ERROR] in _hba_set_cmd() : user buffer not writable\n"); |
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| 189 | return -1; |
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[258] | 190 | } |
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| 191 | |
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| 192 | // check buffer index overflow |
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| 193 | if( buf_id > 245 ) |
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| 194 | { |
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[437] | 195 | _puts("[GIET ERROR] in _hba_set_cmd() : max number of buffers is 248\n"); |
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| 196 | return -1; |
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[258] | 197 | } |
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| 198 | |
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| 199 | // buffer allocation |
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| 200 | if( vpn == vpn_min ) // first page: one single buffer |
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| 201 | { |
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| 202 | paddr = (((paddr_t)ppn) << 12) + offset; |
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| 203 | count = 0x1000 - offset; |
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| 204 | cmd_table->entry[buf_id].dba = (unsigned int)(paddr); |
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| 205 | cmd_table->entry[buf_id].dbau = (unsigned int)(paddr >> 32); |
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| 206 | cmd_table->entry[buf_id].dbc = count; |
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| 207 | |
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| 208 | buf_id++; |
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| 209 | } |
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| 210 | else if( vpn == vpn_max ) // last page: one single buffer |
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| 211 | { |
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| 212 | paddr = (((paddr_t)ppn) << 12); |
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| 213 | count = offset_last; |
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| 214 | cmd_table->entry[buf_id].dba = (unsigned int)(paddr); |
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| 215 | cmd_table->entry[buf_id].dbau = (unsigned int)(paddr >> 32); |
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| 216 | cmd_table->entry[buf_id].dbc = count; |
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| 217 | |
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| 218 | buf_id++; |
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| 219 | } |
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| 220 | else if( offset ) // midle page and offset != 0: two buffers |
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| 221 | { |
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| 222 | paddr = (((paddr_t)ppn) << 12); |
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| 223 | |
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| 224 | count = offset; |
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| 225 | cmd_table->entry[buf_id].dba = (unsigned int)(paddr); |
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| 226 | cmd_table->entry[buf_id].dbau = (unsigned int)(paddr >> 32); |
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| 227 | cmd_table->entry[buf_id].dbc = count; |
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| 228 | |
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| 229 | buf_id++; |
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| 230 | |
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| 231 | paddr = (((paddr_t)ppn) << 12) + offset; |
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| 232 | count = 0x1000 - offset; |
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| 233 | cmd_table->entry[buf_id].dba = (unsigned int)(paddr); |
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| 234 | cmd_table->entry[buf_id].dbau = (unsigned int)(paddr >> 32); |
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| 235 | cmd_table->entry[buf_id].dbc = count; |
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| 236 | |
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| 237 | buf_id++; |
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| 238 | } |
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| 239 | else // middle page and offset == 0: one buffer |
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| 240 | { |
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| 241 | paddr = (((paddr_t)ppn) << 12); |
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| 242 | count = 0x1000; |
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| 243 | cmd_table->entry[buf_id].dba = (unsigned int)(paddr); |
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| 244 | cmd_table->entry[buf_id].dbau = (unsigned int)(paddr >> 32); |
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| 245 | cmd_table->entry[buf_id].dbc = count; |
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| 246 | |
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| 247 | buf_id++; |
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| 248 | } |
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| 249 | } |
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[295] | 250 | */ |
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[258] | 251 | |
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| 252 | |
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[437] | 253 | ////////////////////////////////////////////// |
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[289] | 254 | unsigned int _hba_init( unsigned int channel ) |
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[258] | 255 | { |
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| 256 | unsigned int ppn; |
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| 257 | unsigned int flags; |
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| 258 | unsigned int vbase; |
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| 259 | unsigned int c; // c == command index |
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| 260 | |
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| 261 | // get page_table pointer |
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| 262 | unsigned int pt = _get_context_slot(CTX_PTAB_ID); |
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| 263 | |
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[295] | 264 | // HBA registers TODO: ne faut_il pas un V2P pour PXCLB/PXCLBU ? (AG) |
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| 265 | _hba_set_register( channel, HBA_PXCLB , (unsigned int)&hba_cmd_list[channel] ); |
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| 266 | _hba_set_register( channel, HBA_PXCLBU, 0 ); |
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| 267 | _hba_set_register( channel, HBA_PXIE , 0x40000001 ); |
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| 268 | _hba_set_register( channel, HBA_PXIS , 0 ); |
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| 269 | _hba_set_register( channel, HBA_PXCI , 0 ); |
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| 270 | _hba_set_register( channel, HBA_PXCMD , 1 ); |
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[258] | 271 | |
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| 272 | // command list pointer |
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[289] | 273 | hba_cmd_slot[channel] = 0; |
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[258] | 274 | |
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| 275 | // Command list physical addresse |
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[289] | 276 | vbase = (unsigned int)(&hba_cmd_list[channel]); |
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[481] | 277 | _v2p_translate( (page_table_t*)pt, |
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| 278 | vbase>>12, |
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| 279 | &ppn, |
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| 280 | &flags ); |
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[289] | 281 | hba_cmd_list_paddr[channel] = ((paddr_t)ppn) | (vbase & 0xFFF); |
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[258] | 282 | |
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| 283 | // Command tables physical addresses |
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| 284 | for( c=0 ; c<32 ; c++ ) |
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| 285 | { |
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[289] | 286 | vbase = (unsigned int)(&hba_cmd_table[channel][c]); |
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[481] | 287 | _v2p_translate( (page_table_t*)pt, |
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| 288 | vbase>>12, |
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| 289 | &ppn, |
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| 290 | &flags ); |
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[289] | 291 | hba_cmd_table_paddr[channel][c] = ((paddr_t)ppn) | (vbase & 0xFFF); |
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[258] | 292 | } |
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[289] | 293 | |
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| 294 | return 0; |
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[258] | 295 | } |
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| 296 | |
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[437] | 297 | /////////////////////////////////////////////// |
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| 298 | unsigned int _hba_write( unsigned int channel, |
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| 299 | unsigned int mode, |
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| 300 | unsigned int lba, |
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| 301 | paddr_t buffer, |
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| 302 | unsigned int count ) |
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| 303 | { |
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| 304 | return _hba_cmd_set( channel, |
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| 305 | 0, // write |
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| 306 | lba, |
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| 307 | buffer, |
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| 308 | count ); |
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| 309 | } |
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| 310 | |
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| 311 | ////////////////////////////////////////////// |
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| 312 | unsigned int _hba_read( unsigned int channel, |
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| 313 | unsigned int mode, |
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| 314 | unsigned int lba, |
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| 315 | paddr_t buffer, |
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| 316 | unsigned int count ) |
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| 317 | { |
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| 318 | return _hba_cmd_set( channel, |
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| 319 | 1, // read |
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| 320 | lba, |
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| 321 | buffer, |
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| 322 | count ); |
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| 323 | } |
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| 324 | |
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| 325 | ////////////////////////////////// |
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[289] | 326 | unsigned int _hba_get_block_size() |
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| 327 | { |
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| 328 | // TODO The block size must be obtained from the hardware... |
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| 329 | return 512; |
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| 330 | } |
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[258] | 331 | |
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[437] | 332 | //////////////////////////////////////////////////// |
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[295] | 333 | unsigned int _hba_get_status( unsigned int channel ) |
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| 334 | { |
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[258] | 335 | |
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[295] | 336 | if( channel >= NB_IOC_CHANNELS ) |
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| 337 | { |
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[437] | 338 | _puts("\n[GIET ERROR] in _hba_get_status() : illegal channel\n"); |
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[295] | 339 | _exit(); |
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| 340 | } |
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| 341 | |
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| 342 | // get HBA_PXIS value |
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| 343 | unsigned int status = _hba_get_register( channel, HBA_PXIS ); |
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| 344 | |
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| 345 | // reset HBA_PXIS |
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| 346 | _hba_set_register( channel, HBA_PXIS, 0 ); |
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| 347 | |
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| 348 | return status; |
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| 349 | } |
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| 350 | |
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[258] | 351 | // Local Variables: |
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| 352 | // tab-width: 4 |
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| 353 | // c-basic-offset: 4 |
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| 354 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 355 | // indent-tabs-mode: nil |
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| 356 | // End: |
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| 357 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 358 | |
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