[529] | 1 | ////////////////////////////////////////////////////////////////////////////////// |
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[258] | 2 | // File : hba_driver.c |
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| 3 | // Date : 23/11/2013 |
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[295] | 4 | // Author : alain greiner |
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[258] | 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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[295] | 7 | // Implementation notes: |
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[529] | 8 | // All accesses to HBA registers are done by the two |
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| 9 | // _hba_set_register() and _hba_get_register() low-level functions, |
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| 10 | // that are handling virtual / physical extended addressing. |
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[258] | 11 | /////////////////////////////////////////////////////////////////////////////////// |
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| 12 | |
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| 13 | #include <giet_config.h> |
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[529] | 14 | #include <hard_config.h> |
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| 15 | #include <hba_driver.h> |
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| 16 | #include <xcu_driver.h> |
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[545] | 17 | #include <mmc_driver.h> |
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[529] | 18 | #include <kernel_locks.h> |
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[258] | 19 | #include <utils.h> |
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[456] | 20 | #include <tty0.h> |
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[258] | 21 | #include <ctx_handler.h> |
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[529] | 22 | #include <irq_handler.h> |
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[258] | 23 | #include <vmem.h> |
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| 24 | |
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[529] | 25 | /////////////////////////////////////////////////////////////////////////////////// |
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| 26 | // Global variables |
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| 27 | /////////////////////////////////////////////////////////////////////////////////// |
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[258] | 28 | |
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[529] | 29 | // global index ot the task, for each entry in the command list |
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| 30 | __attribute__((section(".kdata"))) |
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| 31 | unsigned int _hba_gtid[32]; |
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[258] | 32 | |
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[529] | 33 | // status of the command, for each entry in the command list |
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| 34 | __attribute__((section(".kdata"))) |
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| 35 | unsigned int _hba_status[32]; |
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[258] | 36 | |
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[529] | 37 | // command list : up to 32 commands |
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| 38 | __attribute__((section(".kdata"))) |
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[545] | 39 | hba_cmd_desc_t _hba_cmd_list[32] __attribute__((aligned(0x40))); |
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[258] | 40 | |
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[529] | 41 | // command tables array : one command table per entry in command list |
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| 42 | __attribute__((section(".kdata"))) |
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[545] | 43 | hba_cmd_table_t _hba_cmd_table[32] __attribute__((aligned(0x40))); |
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[258] | 44 | |
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[529] | 45 | // command list write index : next slot to register a command |
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| 46 | __attribute__((section(".kdata"))) |
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| 47 | unsigned int _hba_cmd_ptw; |
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[258] | 48 | |
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[529] | 49 | // command list read index : next slot to poll a completed command |
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| 50 | __attribute__((section(".kdata"))) |
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| 51 | unsigned int _hba_cmd_ptr; |
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[258] | 52 | |
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[295] | 53 | ////////////////////////////////////////////////////////////////////////////// |
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[529] | 54 | // This low level function returns the value of register (index) |
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[295] | 55 | ////////////////////////////////////////////////////////////////////////////// |
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[529] | 56 | unsigned int _hba_get_register( unsigned int index ) |
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[258] | 57 | { |
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[529] | 58 | unsigned int* vaddr = (unsigned int*)SEG_IOC_BASE + index; |
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[295] | 59 | return _io_extended_read( vaddr ); |
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| 60 | } |
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[258] | 61 | |
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[295] | 62 | ////////////////////////////////////////////////////////////////////////////// |
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[529] | 63 | // This low level function set a new value in register (index) |
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[295] | 64 | ////////////////////////////////////////////////////////////////////////////// |
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[529] | 65 | void _hba_set_register( unsigned int index, |
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[295] | 66 | unsigned int value ) |
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| 67 | { |
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[529] | 68 | unsigned int* vaddr = (unsigned int*)SEG_IOC_BASE + index; |
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[295] | 69 | _io_extended_write( vaddr, value ); |
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[258] | 70 | } |
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| 71 | |
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[529] | 72 | /////////////////////////////////////////////////////////////////////////////// |
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| 73 | // Extern functions |
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| 74 | /////////////////////////////////////////////////////////////////////////////// |
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[295] | 75 | |
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[258] | 76 | /////////////////////////////////////////////////////////////////////////////// |
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| 77 | // This function register a command in both the command list |
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| 78 | // and the command table, and updates the HBA_PXCI register. |
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[437] | 79 | // return 0 if success, -1 if error |
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[258] | 80 | /////////////////////////////////////////////////////////////////////////////// |
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[529] | 81 | unsigned int _hba_access( unsigned int use_irq, |
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| 82 | unsigned int to_mem, |
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| 83 | unsigned int lba, |
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| 84 | unsigned long long buf_paddr, |
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| 85 | unsigned int count ) |
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[258] | 86 | { |
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[529] | 87 | unsigned int procid = _get_procid(); |
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| 88 | unsigned int x = procid >> (Y_WIDTH + P_WIDTH); |
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| 89 | unsigned int y = (procid >> P_WIDTH) & ((1<<Y_WIDTH) - 1); |
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| 90 | unsigned int p = procid & ((1<<P_WIDTH)-1); |
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[295] | 91 | |
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[529] | 92 | #if GIET_DEBUG_IOC_DRIVER |
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[545] | 93 | _printf("\n[DEBUG HBA] _hba_access() : P[%d,%d,%d] enters at cycle %d\n" |
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[529] | 94 | " use_irq = %d / to_mem = %d / lba = %x / paddr = %l / count = %d\n", |
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| 95 | x , y , p , _get_proctime() , use_irq , to_mem , lba , buf_paddr, count ); |
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| 96 | #endif |
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| 97 | |
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[545] | 98 | unsigned int pxci; // HBA_PXCI register value |
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| 99 | unsigned int ptw; // command list write pointer |
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| 100 | unsigned int pxis; // HBA_PXIS register value |
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| 101 | hba_cmd_desc_t* cmd_desc; // command descriptor pointer |
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| 102 | hba_cmd_table_t* cmd_table; // command table pointer |
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[258] | 103 | |
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| 104 | // check buffer alignment |
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[545] | 105 | if( buf_paddr & 0x3F ) |
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[258] | 106 | { |
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[545] | 107 | _printf("\n[HBA ERROR] in _hba_access() : buffer not 64 bytes aligned\n"); |
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[437] | 108 | return -1; |
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[258] | 109 | } |
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| 110 | |
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[545] | 111 | // get one entry in Command List |
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| 112 | // atomic increment on the _hba_cmd_ptw allocator |
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| 113 | // only the 5 LSB bits are used to index the Command List |
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| 114 | ptw = _atomic_increment( &_hba_cmd_ptw , 1 ) & 0x1F; |
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[258] | 115 | |
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[545] | 116 | // blocked until allocated entry in Command List is empty |
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[529] | 117 | do |
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[258] | 118 | { |
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[529] | 119 | // get PXCI register |
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| 120 | pxci = _hba_get_register( HBA_PXCI ); |
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| 121 | } |
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| 122 | while ( pxci & (1<<ptw) ); |
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[545] | 123 | |
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[258] | 124 | // compute pointers on command descriptor and command table |
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[529] | 125 | cmd_desc = &_hba_cmd_list[ptw]; |
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| 126 | cmd_table = &_hba_cmd_table[ptw]; |
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[258] | 127 | |
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[295] | 128 | // set buffer descriptor in command table |
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[540] | 129 | cmd_table->buffer.dba = (unsigned int)(buf_paddr); |
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| 130 | cmd_table->buffer.dbau = (unsigned int)(buf_paddr >> 32); |
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| 131 | cmd_table->buffer.dbc = count * 512; |
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[295] | 132 | |
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| 133 | // initialize command table header |
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| 134 | cmd_table->header.lba0 = (char)lba; |
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| 135 | cmd_table->header.lba1 = (char)(lba>>8); |
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| 136 | cmd_table->header.lba2 = (char)(lba>>16); |
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| 137 | cmd_table->header.lba3 = (char)(lba>>24); |
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| 138 | cmd_table->header.lba4 = 0; |
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| 139 | cmd_table->header.lba5 = 0; |
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| 140 | |
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| 141 | // initialise command descriptor |
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| 142 | cmd_desc->prdtl[0] = 1; |
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| 143 | cmd_desc->prdtl[1] = 0; |
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[529] | 144 | if( to_mem ) cmd_desc->flag[0] = 0x00; |
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| 145 | else cmd_desc->flag[0] = 0x40; |
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[295] | 146 | |
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[545] | 147 | #if USE_IOB // software L2/L3 cache coherence |
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[295] | 148 | |
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[545] | 149 | // compute physical addresses |
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| 150 | unsigned long long cmd_desc_paddr; // command descriptor physical address |
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| 151 | unsigned long long cmd_table_paddr; // command table header physical address |
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| 152 | unsigned int flags; // unused |
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| 153 | |
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| 154 | if ( _get_mmu_mode() & 0x4 ) |
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| 155 | { |
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| 156 | cmd_desc_paddr = _v2p_translate( (unsigned int)cmd_desc , &flags ); |
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| 157 | cmd_table_paddr = _v2p_translate( (unsigned int)cmd_table , &flags ); |
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| 158 | } |
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| 159 | else |
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| 160 | { |
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| 161 | cmd_desc_paddr = (unsigned int)cmd_desc; |
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| 162 | cmd_table_paddr = (unsigned int)cmd_table; |
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| 163 | } |
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| 164 | |
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| 165 | // update external memory for command table |
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| 166 | _mmc_sync( cmd_table_paddr & (~0x3F) , sizeof(hba_cmd_table_t) ); |
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| 167 | |
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| 168 | // update external memory for command descriptor |
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| 169 | _mmc_sync( cmd_desc_paddr & (~0x3F) , sizeof(hba_cmd_desc_t) ); |
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| 170 | |
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| 171 | // inval or synchronize memory buffer |
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| 172 | if ( to_mem ) _mmc_inval( buf_paddr, count<<9 ); |
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| 173 | else _mmc_sync( buf_paddr, count<<9 ); |
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| 174 | |
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| 175 | #endif // end software L2/L3 cache coherence |
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| 176 | |
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[529] | 177 | ///////////////////////////////////////////////////////////////////// |
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| 178 | // In synchronous mode, we poll the PXCI register until completion |
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| 179 | ///////////////////////////////////////////////////////////////////// |
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| 180 | if ( use_irq == 0 ) |
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| 181 | { |
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[545] | 182 | // start HBA transfer |
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| 183 | _hba_set_register( HBA_PXCI, (1<<ptw) ); |
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[295] | 184 | |
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[529] | 185 | #if GIET_DEBUG_IOC_DRIVER |
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[545] | 186 | _printf("\n[DEBUG HBA] _hba_access() : command %d for P[%d,%d,%d]" |
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| 187 | " at cycle %d / polling\n", |
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| 188 | ptw , x , y , p , _get_proctime() ); |
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[529] | 189 | #endif |
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| 190 | // disable IRQs in PXIE register |
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| 191 | _hba_set_register( HBA_PXIE , 0 ); |
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[295] | 192 | |
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[529] | 193 | // poll PXCI[ptw] until command completed by HBA |
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| 194 | do |
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| 195 | { |
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[545] | 196 | pxci = _hba_get_register( HBA_PXCI ); |
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[258] | 197 | |
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[529] | 198 | #if GIET_DEBUG_IOC_DRIVER |
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[545] | 199 | _printf("\n[DEBUG HBA] _hba_access() : P[%d,%d,%d] wait on HBA_PXCI / pxci = %x\n", |
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| 200 | x , y , p , pxci ); |
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[529] | 201 | #endif |
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| 202 | } |
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| 203 | while( pxci & (1<<ptw) ); |
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| 204 | |
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| 205 | // get PXIS register |
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| 206 | pxis = _hba_get_register( HBA_PXIS ); |
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| 207 | |
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| 208 | // reset PXIS register |
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| 209 | _hba_set_register( HBA_PXIS , 0 ); |
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| 210 | } |
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| 211 | |
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| 212 | ///////////////////////////////////////////////////////////////// |
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| 213 | // in descheduling mode, we deschedule the task |
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| 214 | // and use an interrupt to reschedule the task. |
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| 215 | // We need a critical section, because we must reset the RUN bit |
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| 216 | // before to launch the transfer, and we don't want to be |
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| 217 | // descheduled between these two operations. |
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| 218 | ///////////////////////////////////////////////////////////////// |
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| 219 | else |
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[258] | 220 | { |
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| 221 | |
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[529] | 222 | #if GIET_DEBUG_IOC_DRIVER |
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[545] | 223 | _printf("\n[DEBUG HBA] _hba_access() : command %d for P[%d,%d,%d] " |
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| 224 | "at cycle %d / descheduling\n", |
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| 225 | ptw , x , y , p , _get_proctime() ); |
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[529] | 226 | #endif |
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| 227 | unsigned int save_sr; |
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| 228 | unsigned int ltid = _get_current_task_id(); |
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[258] | 229 | |
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[529] | 230 | // activates HBA interrupts |
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| 231 | _hba_set_register( HBA_PXIE , 0x00000001 ); |
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[258] | 232 | |
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[529] | 233 | // set _hba_gtid[ptw] |
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| 234 | _hba_gtid[ptw] = (procid<<16) + ltid; |
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[258] | 235 | |
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[529] | 236 | // enters critical section |
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| 237 | _it_disable( &save_sr ); |
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[258] | 238 | |
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[529] | 239 | // reset runnable |
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| 240 | _set_task_slot( x, y, p, ltid, CTX_RUN_ID, 0 ); |
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[258] | 241 | |
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[545] | 242 | // start HBA transfer |
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| 243 | _hba_set_register( HBA_PXCI, (1<<ptw) ); |
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| 244 | |
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[529] | 245 | // deschedule task |
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| 246 | _ctx_switch(); |
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[258] | 247 | |
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[529] | 248 | #if GIET_DEBUG_IOC_DRIVER |
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[545] | 249 | _printf("\n[DEBUG HBA] _hba_access() : task %d on P[%d,%d,%d] resume at cycle %d\n", |
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| 250 | ltid , x , y , p , _get_proctime() ); |
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[529] | 251 | #endif |
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[258] | 252 | |
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[529] | 253 | // restore SR |
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| 254 | _it_restore( &save_sr ); |
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[258] | 255 | |
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[529] | 256 | // get command status |
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| 257 | pxis = _hba_status[ptw]; |
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| 258 | } |
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[258] | 259 | |
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[529] | 260 | #if GIET_DEBUG_IOC_DRIVER |
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[545] | 261 | _printf("\n[DEBUG HBA] _hba_access() : P[%d,%d,%d] exit at cycle %d\n", |
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[529] | 262 | x , y , p , _get_proctime() ); |
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| 263 | #endif |
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[258] | 264 | |
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[529] | 265 | if ( pxis & 0x40000000 ) return pxis; |
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| 266 | else return 0; |
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[258] | 267 | |
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[529] | 268 | } // end _hba_access() |
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[258] | 269 | |
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| 270 | |
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[529] | 271 | //////////////////////// |
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| 272 | unsigned int _hba_init() |
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| 273 | { |
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[545] | 274 | unsigned int cmd_list_vaddr; |
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| 275 | unsigned int cmd_table_vaddr; |
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| 276 | unsigned long long cmd_list_paddr; |
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| 277 | unsigned long long cmd_table_paddr; |
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| 278 | unsigned int flags; // unused |
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[258] | 279 | |
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[545] | 280 | // compute Command list & command table physical addresses |
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| 281 | cmd_list_vaddr = (unsigned int)(&_hba_cmd_list[0]); |
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| 282 | cmd_table_vaddr = (unsigned int)(&_hba_cmd_table[0]); |
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| 283 | if ( _get_mmu_mode() & 0x4 ) |
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| 284 | { |
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| 285 | cmd_list_paddr = _v2p_translate( cmd_list_vaddr , &flags ); |
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| 286 | cmd_table_paddr = _v2p_translate( cmd_table_vaddr , &flags ); |
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| 287 | } |
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| 288 | else |
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| 289 | { |
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| 290 | cmd_list_paddr = (unsigned long long)cmd_list_vaddr; |
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| 291 | cmd_table_paddr = (unsigned long long)cmd_table_vaddr; |
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| 292 | } |
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| 293 | |
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| 294 | // initialise Command List pointers |
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[529] | 295 | _hba_cmd_ptw = 0; |
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| 296 | _hba_cmd_ptr = 0; |
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[258] | 297 | |
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[545] | 298 | // initialise Command Descriptors in Command List |
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| 299 | unsigned int c; |
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| 300 | unsigned long long paddr; |
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[258] | 301 | for( c=0 ; c<32 ; c++ ) |
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| 302 | { |
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[545] | 303 | paddr = cmd_table_paddr + c * sizeof(hba_cmd_table_t); |
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| 304 | _hba_cmd_list[c].ctba = (unsigned int)(paddr); |
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[529] | 305 | _hba_cmd_list[c].ctbau = (unsigned int)(paddr>>32); |
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[258] | 306 | } |
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[289] | 307 | |
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[545] | 308 | // initialise HBA registers |
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| 309 | _hba_set_register( HBA_PXCLB , (unsigned int)(cmd_list_paddr) ); |
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| 310 | _hba_set_register( HBA_PXCLBU , (unsigned int)(cmd_list_paddr>>32) ); |
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| 311 | _hba_set_register( HBA_PXIE , 0 ); |
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| 312 | _hba_set_register( HBA_PXIS , 0 ); |
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| 313 | _hba_set_register( HBA_PXCI , 0 ); |
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| 314 | _hba_set_register( HBA_PXCMD , 1 ); |
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[529] | 315 | |
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[289] | 316 | return 0; |
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[258] | 317 | } |
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| 318 | |
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[437] | 319 | |
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[545] | 320 | ///////////////////////////////////////////////////// |
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[529] | 321 | void _hba_isr( unsigned int irq_type, // HWI / WTI |
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| 322 | unsigned int irq_id, // index returned by ICU |
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| 323 | unsigned int channel ) // unused |
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[437] | 324 | { |
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[529] | 325 | // get HBA_PXCI containing commands status |
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| 326 | unsigned int pxci = _hba_get_register( HBA_PXCI ); |
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[437] | 327 | |
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[545] | 328 | // we must handle all completed commands |
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| 329 | // active commands are between (_hba_cmd_ptr) and (_hba_cmd_ptw-1) |
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| 330 | unsigned int current; |
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| 331 | for ( current = _hba_cmd_ptr ; current != _hba_cmd_ptw ; current++ ) |
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[529] | 332 | { |
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[545] | 333 | unsigned int ptr = current & 0x1F; |
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| 334 | |
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| 335 | if ( (pxci & (1<<ptr)) == 0 ) // command completed |
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[529] | 336 | { |
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[545] | 337 | // increment the 32 bits variable _hba_cmd_ptr |
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| 338 | _hba_cmd_ptr = (_hba_cmd_ptr + 1); |
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[258] | 339 | |
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[529] | 340 | // save PXIS register |
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[545] | 341 | _hba_status[ptr] = _hba_get_register( HBA_PXIS ); |
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[258] | 342 | |
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[529] | 343 | // reset PXIS register |
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| 344 | _hba_set_register( HBA_PXIS , 0 ); |
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| 345 | |
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| 346 | // identify waiting task |
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[545] | 347 | unsigned int remote_procid = _hba_gtid[ptr]>>16; |
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| 348 | unsigned int ltid = _hba_gtid[ptr] & 0xFFFF; |
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[529] | 349 | unsigned int remote_cluster = remote_procid >> P_WIDTH; |
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| 350 | unsigned int remote_x = remote_cluster >> Y_WIDTH; |
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| 351 | unsigned int remote_y = remote_cluster & ((1<<Y_WIDTH)-1); |
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| 352 | unsigned int remote_p = remote_procid & ((1<<P_WIDTH)-1); |
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| 353 | |
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| 354 | // re-activates waiting task |
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| 355 | _set_task_slot( remote_x, |
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| 356 | remote_y, |
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| 357 | remote_p, |
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| 358 | ltid, |
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| 359 | CTX_RUN_ID, |
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| 360 | 1 ); |
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[295] | 361 | |
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[529] | 362 | // send a WAKUP WTI to processor running the waiting task |
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| 363 | _xcu_send_wti( remote_cluster , |
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| 364 | remote_p , |
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| 365 | 0 ); // don't force context switch |
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[295] | 366 | |
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[529] | 367 | #if GIET_DEBUG_IOC_DRIVER |
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[545] | 368 | _printf("\n[DEBUG HBA] _hba_isr() : command %d completed at cycle %d\n" |
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| 369 | " resume task %d running on P[%d,%d,%d] / status = %x\n", |
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| 370 | ptr , _get_proctime() , |
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| 371 | ltid , remote_x , remote_y , remote_p , _hba_status[ptr] ); |
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[529] | 372 | #endif |
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| 373 | } |
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| 374 | else // command non completed |
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| 375 | { |
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| 376 | break; |
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| 377 | } |
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| 378 | } |
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| 379 | } // end _hba_isr() |
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[295] | 380 | |
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[258] | 381 | // Local Variables: |
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| 382 | // tab-width: 4 |
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| 383 | // c-basic-offset: 4 |
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| 384 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 385 | // indent-tabs-mode: nil |
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| 386 | // End: |
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| 387 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 388 | |
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