[258] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : nic_driver.h |
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| 3 | // Date : 01/11/2013 |
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| 4 | // Author : alain greiner |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | /////////////////////////////////////////////////////////////////////////////////// |
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| 7 | |
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| 8 | #ifndef _GIET_NIC_DRIVERS_H_ |
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| 9 | #define _GIET_NIC_DRIVERS_H_ |
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| 10 | |
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| 11 | /////////////////////////////////////////////////////////////////////////////////// |
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[295] | 12 | // NIC Registers (vci_multi_nic) |
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| 13 | /////////////////////////////////////////////////////////////////////////////////// |
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| 14 | |
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| 15 | enum SoclibMultiNicHyperviseurRegisters { |
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| 16 | NIC_G_VIS = 0, // bitfield : bit N = 0 -> channel N disabled |
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| 17 | NIC_G_ON = 1, // boolean : NIC component activated |
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| 18 | NIC_G_NB_CHAN = 2, // Number of channels present in this NIC (read only) |
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| 19 | NIC_G_BC_ENABLE = 3, // boolean : Enable Broadcast if non zero |
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| 20 | NIC_G_TDM_ENABLE = 4, // boolean : TDM Scheduler if non zero |
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| 21 | NIC_G_TDM_PERIOD = 5, // TDM time slot value |
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| 22 | NIC_G_BYPASS_ENABLE = 6, // boolean : Enable bypass for TX packets |
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| 23 | // alignment |
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| 24 | NIC_G_MAC_4 = 8, // channel mac address 32 LSB bits array[8] |
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| 25 | NIC_G_MAC_2 = 16, // channel mac address 16 MSB bits array[8] |
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| 26 | // alignment |
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| 27 | NIC_G_NPKT_RX_G2S_RECEIVED = 32, // number of packets received on GMII RX port |
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| 28 | NIC_G_NPKT_RX_G2S_DISCARDED = 33, // number of RX packets discarded by RX_G2S FSM |
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| 29 | |
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| 30 | NIC_G_NPKT_RX_DES_SUCCESS = 34, // number of RX packets transmited by RX_DES FSM |
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| 31 | NIC_G_NPKT_RX_DES_TOO_SMALL = 35, // number of discarded too small RX packets (<60B) |
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| 32 | NIC_G_NPKT_RX_DES_TOO_BIG = 36, // number of discarded too big RX packets (>1514B) |
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| 33 | NIC_G_NPKT_RX_DES_MFIFO_FULL = 37, // number of discarded RX packets because fifo full |
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| 34 | NIC_G_NPKT_RX_DES_CRC_FAIL = 38, // number of discarded RX packets because CRC32 failure |
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| 35 | |
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| 36 | NIC_G_NPKT_RX_DISPATCH_RECEIVED = 39, // number of packets received by RX_DISPATCH FSM |
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| 37 | NIC_G_NPKT_RX_DISPATCH_BROADCAST = 40, // number of broadcast RX packets received |
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| 38 | NIC_G_NPKT_RX_DISPATCH_DST_FAIL = 41, // number of discarded RX packets for DST MAC not found |
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| 39 | NIC_G_NPKT_RX_DISPATCH_CH_FULL = 42, // number of discarded RX packets for channel full |
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| 40 | |
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| 41 | NIC_G_NPKT_TX_DISPATCH_RECEIVED = 43, // number of packets received by TX_DISPATCH FSM |
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| 42 | NIC_G_NPKT_TX_DISPATCH_TOO_SMALL = 44, // number of discarded too small TX packets (<60B) |
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| 43 | NIC_G_NPKT_TX_DISPATCH_TOO_BIG = 45, // number of discarded too big TX packets (>1514B) |
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| 44 | NIC_G_NPKT_TX_DISPATCH_SRC_FAIL = 46, // number of discarded TX packets for SRC MAC failed |
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| 45 | NIC_G_NPKT_TX_DISPATCH_BROADCAST = 47, // number of broadcast TX packets received |
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| 46 | NIC_G_NPKT_TX_DISPATCH_BYPASS = 48, // number of bypassed TX->RX packets |
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| 47 | NIC_G_NPKT_TX_DISPATCH_TRANSMIT = 49, // number of transmit TX packets |
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| 48 | |
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| 49 | NIC_CHANNEL_SPAN = 0x2000, |
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| 50 | }; |
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| 51 | |
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| 52 | ///////////////////////////////////////////////////////////////////// |
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| 53 | // A container descriptor has the following form: |
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| 54 | // LOW WORD : Container LSB base address |
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| 55 | // HIGH WORD: Container status (leftmost bit), '1' means full |
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| 56 | // Base address MSB extension, if needed (right aligned) |
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| 57 | ////////////////////////////////////////////////////////////////////// |
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| 58 | enum SoclibMultiNicChannelRegisters |
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| 59 | { |
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| 60 | NIC_RX_DESC_LO_0 = 0, // RX_0 descriptor low word (Read/Write) |
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| 61 | NIC_RX_DESC_HI_0 = 1, // RX_0 descriptor high word (Read/Write) |
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| 62 | NIC_RX_DESC_LO_1 = 2, // RX_1 descriptor low word (Read/Write) |
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| 63 | NIC_RX_DESC_HI_1 = 3, // RX_1 descriptor high word (Read/Write) |
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| 64 | NIC_TX_DESC_LO_0 = 4, // TX_0 descriptor low word (Read/Write) |
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| 65 | NIC_TX_DESC_HI_0 = 5, // TX_0 descriptor high word (Read/Write) |
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| 66 | NIC_TX_DESC_LO_1 = 6, // TX_1 descriptor low word (Read/Write) |
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| 67 | NIC_TX_DESC_HI_1 = 7, // TX_1 descriptor high word (Read/Write) |
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| 68 | NIC_MAC_4 = 8, // channel mac address 32 LSB bits (Read Only) |
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| 69 | NIC_MAC_2 = 9, // channel mac address 16 LSB bits (Read Only) |
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| 70 | NIC_RX_RUN = 10, // RX packets can be received (write_only) |
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| 71 | NIC_TX_RUN = 11, // TX packets can be transmitted (write_only) |
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| 72 | }; |
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| 73 | |
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| 74 | /////////////////////////////////////////////////////////////////////////////////// |
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[258] | 75 | // NIC device access functions (vci_multi_nic) |
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| 76 | /////////////////////////////////////////////////////////////////////////////////// |
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| 77 | |
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| 78 | extern unsigned int _nic_sync_write( const void* buffer, |
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| 79 | unsigned int length ); |
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| 80 | |
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| 81 | extern unsigned int _nic_sync_read( const void* buffer, |
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| 82 | unsigned int length ); |
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| 83 | |
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| 84 | extern unsigned int _nic_cma_start(); |
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| 85 | |
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| 86 | extern unsigned int _nic_cma_stop(); |
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| 87 | |
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[295] | 88 | extern void _nic_rx_isr( unsigned int irq_type, |
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| 89 | unsigned int irq_id, |
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| 90 | unsigned int channel ); |
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| 91 | |
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| 92 | extern void _nic_tx_isr( unsigned int irq_type, |
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| 93 | unsigned int irq_id, |
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| 94 | unsigned int channel ); |
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| 95 | |
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[258] | 96 | /////////////////////////////////////////////////////////////////////////////////// |
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| 97 | |
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| 98 | |
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| 99 | #endif |
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| 100 | |
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| 101 | // Local Variables: |
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| 102 | // tab-width: 4 |
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| 103 | // c-basic-offset: 4 |
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| 104 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 105 | // indent-tabs-mode: nil |
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| 106 | // End: |
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| 107 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 108 | |
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