1 | /////////////////////////////////////////////////////////////////////////////////// |
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2 | // File : sdc_driver.c |
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3 | // Date : 31/04/2015 |
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4 | // Author : Alain Greiner |
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5 | // Copyright (c) UPMC-LIP6 |
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6 | /////////////////////////////////////////////////////////////////////////////////// |
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7 | |
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8 | #include "hard_config.h" |
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9 | #include "giet_config.h" |
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10 | #include "sdc_driver.h" |
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11 | #include "tty0.h" |
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12 | #include "utils.h" |
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13 | #include "vmem.h" |
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14 | #include "kernel_locks.h" |
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15 | #include "mmc_driver.h" |
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16 | #include "xcu_driver.h" |
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17 | #include "ctx_handler.h" |
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18 | |
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19 | #define SDC_RSP_TIMEOUT 100 // number of retries for a config RSP |
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20 | |
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21 | #define SDC_POLLING_TIMEOUT 1000000 // number of retries for polling PXCI |
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22 | |
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23 | /////////////////////////////////////////////////////////////////////////////////// |
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24 | // AHCI related global variables |
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25 | /////////////////////////////////////////////////////////////////////////////////// |
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26 | |
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27 | // global index ot the task, for each entry in the command list |
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28 | __attribute__((section(".kdata"))) |
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29 | unsigned int _ahci_gtid[32]; |
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30 | |
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31 | // status of the command, for each entry in the command list |
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32 | __attribute__((section(".kdata"))) |
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33 | unsigned int _ahci_status[32]; |
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34 | |
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35 | // command list : up to 32 commands |
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36 | __attribute__((section(".kdata"))) |
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37 | ahci_cmd_desc_t _ahci_cmd_list[32] __attribute__((aligned(0x40))); |
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38 | |
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39 | // command tables array : one command table per entry in command list |
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40 | __attribute__((section(".kdata"))) |
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41 | ahci_cmd_table_t _ahci_cmd_table[32] __attribute__((aligned(0x40))); |
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42 | |
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43 | // command list write index : next slot to register a command |
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44 | __attribute__((section(".kdata"))) |
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45 | unsigned int _ahci_cmd_ptw; |
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46 | |
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47 | // command list read index : next slot to poll a completed command |
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48 | __attribute__((section(".kdata"))) |
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49 | unsigned int _ahci_cmd_ptr; |
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50 | |
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51 | |
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52 | /////////////////////////////////////////////////////////////////////////////////// |
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53 | // SD Card related global variables |
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54 | /////////////////////////////////////////////////////////////////////////////////// |
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55 | |
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56 | // SD card relative address |
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57 | __attribute__((section(".kdata"))) |
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58 | unsigned int _sdc_rca; |
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59 | |
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60 | // SD Card Hih Capacity Support when non zero |
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61 | __attribute__((section(".kdata"))) |
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62 | unsigned int _sdc_sdhc; |
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63 | |
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64 | |
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65 | /////////////////////////////////////////////////////////////////////////////// |
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66 | // This low_level function returns the value contained in register (index). |
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67 | /////////////////////////////////////////////////////////////////////////////// |
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68 | static unsigned int _sdc_get_register( unsigned int index ) |
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69 | { |
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70 | unsigned int* vaddr = (unsigned int*)SEG_IOC_BASE + index; |
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71 | return _io_extended_read( vaddr ); |
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72 | } |
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73 | |
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74 | /////////////////////////////////////////////////////////////////////////////// |
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75 | // This low-level function set a new value in register (index). |
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76 | /////////////////////////////////////////////////////////////////////////////// |
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77 | static void _sdc_set_register( unsigned int index, |
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78 | unsigned int value ) |
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79 | { |
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80 | unsigned int* vaddr = (unsigned int*)SEG_IOC_BASE + index; |
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81 | _io_extended_write( vaddr, value ); |
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82 | } |
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83 | |
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84 | /////////////////////////////////////////////////////////////////////////////// |
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85 | // This function sends a command to the SD card and returns the response. |
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86 | // - index : CMD index |
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87 | // - arg : CMD argument |
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88 | // - return Card response |
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89 | /////////////////////////////////////////////////////////////////////////////// |
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90 | static unsigned int _sdc_send_cmd ( unsigned int index, |
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91 | unsigned int arg ) |
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92 | { |
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93 | unsigned int sdc_rsp; |
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94 | register int iter = 0; |
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95 | |
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96 | // load argument |
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97 | _sdc_set_register( SDC_CMD_ARG, arg ); |
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98 | |
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99 | // lauch command |
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100 | _sdc_set_register( SDC_CMD_ID , index ); |
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101 | |
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102 | // get response |
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103 | do |
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104 | { |
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105 | sdc_rsp = _sdc_get_register( SDC_RSP_STS ); |
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106 | iter++; |
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107 | } |
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108 | while ( (sdc_rsp == 0xFFFFFFFF) && (iter < SDC_RSP_TIMEOUT) ); |
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109 | |
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110 | return sdc_rsp; |
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111 | } |
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112 | |
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113 | ///////////////////////////////////////////////////////////////////////////////// |
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114 | // Extern functions |
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115 | ///////////////////////////////////////////////////////////////////////////////// |
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116 | |
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117 | //////////////////////// |
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118 | unsigned int _sdc_init() |
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119 | { |
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120 | //////////// SD Card initialisation ////////// |
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121 | |
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122 | unsigned int rsp; |
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123 | |
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124 | // define the SD card clock period |
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125 | _sdc_set_register( SDC_PERIOD , GIET_SDC_PERIOD ); |
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126 | |
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127 | // send CMD0 (soft reset / no argument) |
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128 | rsp = _sdc_send_cmd( SDC_CMD0 , 0 ); |
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129 | if ( rsp == 0xFFFFFFFF ) |
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130 | { |
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131 | _printf("\n[SDC ERROR] in _sdc_init() : no acknowledge to CMD0\n"); |
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132 | return 1; |
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133 | } |
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134 | |
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135 | #if GIET_DEBUG_IOC_DRIVER |
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136 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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137 | _printf("\n[DEBUG SDC] _sdc_init() : SDC_CMD0 done at cycle %d\n", _get_proctime() ); |
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138 | #endif |
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139 | |
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140 | // send CMD8 command |
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141 | rsp = _sdc_send_cmd( SDC_CMD8 , SDC_CMD8_ARGUMENT ); |
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142 | if ( rsp == 0xFFFFFFFF ) |
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143 | { |
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144 | _printf("\n[SDC ERROR] in _sdc_init() : no response to CMD8\n"); |
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145 | return 1; |
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146 | } |
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147 | else if ( rsp != SDC_CMD8_ARGUMENT ) |
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148 | { |
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149 | _printf("\n[SDC ERROR] in _sdc_init() : response to CMD8 = %x / expected = %x\n", |
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150 | rsp , SDC_CMD8_ARGUMENT ); |
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151 | return 1; |
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152 | } |
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153 | |
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154 | #if GIET_DEBUG_IOC_DRIVER |
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155 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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156 | _printf("\n[DEBUG SDC] _sdc_init() : SDC_CMD8 done at cycle %d\n", _get_proctime() ); |
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157 | #endif |
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158 | |
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159 | // send CMD41 to get SDHC |
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160 | if ( rsp == 0xFFFFFFFF ) |
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161 | { |
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162 | _printf("\n[SDC ERROR] in _sdc_init() : no response to CMD41\n"); |
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163 | return 1; |
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164 | } |
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165 | _sdc_sdhc = ( (rsp & SDC_CMD41_RSP_CCS) != 0 ); |
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166 | |
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167 | #if GIET_DEBUG_IOC_DRIVER |
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168 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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169 | _printf("\n[DEBUG SDC] _sdc_init() : SDC_CMD41 done at cycle %d\n", _get_proctime() ); |
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170 | #endif |
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171 | |
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172 | // send CMD3 to get RCA |
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173 | rsp = _sdc_send_cmd( SDC_CMD3 , 0 ); |
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174 | if ( rsp == 0xFFFFFFFF ) |
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175 | { |
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176 | _printf("\n[SDC ERROR] in _sdc_init() : no response to CMD3\n"); |
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177 | return 1; |
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178 | } |
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179 | _sdc_rca = rsp; |
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180 | |
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181 | #if GIET_DEBUG_IOC_DRIVER |
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182 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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183 | _printf("\n[DEBUG SDC] _sdc_init() : SDC_CMD3 done at cycle %d\n", _get_proctime() ); |
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184 | #endif |
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185 | |
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186 | // send CMD7 |
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187 | rsp = _sdc_send_cmd( SDC_CMD7 , _sdc_rca ); |
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188 | if ( rsp == 0xFFFFFFFF ) |
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189 | { |
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190 | _printf("\n[SDC ERROR] in _sdc_init() : no response to CMD7\n"); |
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191 | return 1; |
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192 | } |
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193 | |
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194 | #if GIET_DEBUG_IOC_DRIVER |
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195 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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196 | _printf("\n[DEBUG SDC] _sdc_init() : SDC_CMD7 done at cycle %d\n", _get_proctime() ); |
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197 | #endif |
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198 | |
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199 | //////////// AHCI interface initialisation /////// |
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200 | |
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201 | unsigned int cmd_list_vaddr; |
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202 | unsigned int cmd_table_vaddr; |
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203 | unsigned long long cmd_list_paddr; |
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204 | unsigned long long cmd_table_paddr; |
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205 | unsigned int flags; // unused |
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206 | |
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207 | // compute Command list & command table physical addresses |
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208 | cmd_list_vaddr = (unsigned int)(&_ahci_cmd_list[0]); |
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209 | cmd_table_vaddr = (unsigned int)(&_ahci_cmd_table[0]); |
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210 | if ( _get_mmu_mode() & 0x4 ) |
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211 | { |
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212 | cmd_list_paddr = _v2p_translate( cmd_list_vaddr , &flags ); |
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213 | cmd_table_paddr = _v2p_translate( cmd_table_vaddr , &flags ); |
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214 | } |
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215 | else |
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216 | { |
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217 | cmd_list_paddr = (unsigned long long)cmd_list_vaddr; |
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218 | cmd_table_paddr = (unsigned long long)cmd_table_vaddr; |
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219 | } |
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220 | |
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221 | // initialise Command List pointers |
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222 | _ahci_cmd_ptw = 0; |
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223 | _ahci_cmd_ptr = 0; |
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224 | |
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225 | // initialise Command Descriptors in Command List |
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226 | unsigned int c; |
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227 | unsigned long long paddr; |
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228 | for( c=0 ; c<32 ; c++ ) |
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229 | { |
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230 | paddr = cmd_table_paddr + c * sizeof(ahci_cmd_table_t); |
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231 | _ahci_cmd_list[c].ctba = (unsigned int)(paddr); |
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232 | _ahci_cmd_list[c].ctbau = (unsigned int)(paddr>>32); |
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233 | } |
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234 | |
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235 | // initialise AHCI registers |
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236 | _sdc_set_register( AHCI_PXCLB , (unsigned int)(cmd_list_paddr) ); |
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237 | _sdc_set_register( AHCI_PXCLBU , (unsigned int)(cmd_list_paddr>>32) ); |
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238 | _sdc_set_register( AHCI_PXIE , 0 ); |
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239 | _sdc_set_register( AHCI_PXIS , 0 ); |
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240 | _sdc_set_register( AHCI_PXCI , 0 ); |
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241 | _sdc_set_register( AHCI_PXCMD , 1 ); |
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242 | |
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243 | #if GIET_DEBUG_IOC_DRIVER |
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244 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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245 | _printf("\n[DEBUG SDC] _sdc_init() : AHCI init done at cycle %d\n", _get_proctime() ); |
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246 | #endif |
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247 | |
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248 | } // end _sdc_init() |
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249 | |
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250 | |
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251 | ///////////////////////////////////////////////////// |
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252 | unsigned int _sdc_access( unsigned int use_irq, |
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253 | unsigned int to_mem, |
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254 | unsigned int lba, |
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255 | unsigned long long buf_paddr, |
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256 | unsigned int count ) |
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257 | { |
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258 | unsigned int procid = _get_procid(); |
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259 | unsigned int x = procid >> (Y_WIDTH + P_WIDTH); |
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260 | unsigned int y = (procid >> P_WIDTH) & ((1<<Y_WIDTH) - 1); |
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261 | unsigned int p = procid & ((1<<P_WIDTH)-1); |
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262 | unsigned int iter; |
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263 | |
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264 | #if GIET_DEBUG_IOC_DRIVER |
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265 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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266 | _printf("\n[DEBUG SDC] _sdc_access() : P[%d,%d,%d] enters at cycle %d\n" |
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267 | " use_irq = %d / to_mem = %d / lba = %x / paddr = %l / count = %d\n", |
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268 | x , y , p , _get_proctime() , use_irq , to_mem , lba , buf_paddr, count ); |
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269 | #endif |
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270 | |
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271 | unsigned int pxci; // AHCI_PXCI register value |
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272 | unsigned int ptw; // command list write pointer |
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273 | unsigned int pxis; // AHCI_PXIS register value |
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274 | ahci_cmd_desc_t* cmd_desc; // command descriptor pointer |
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275 | ahci_cmd_table_t* cmd_table; // command table pointer |
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276 | |
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277 | // check buffer alignment |
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278 | if( buf_paddr & 0x3F ) |
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279 | { |
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280 | _printf("\n[SDC ERROR] in _sdc_access() : buffer not 64 bytes aligned\n"); |
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281 | return 1; |
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282 | } |
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283 | |
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284 | // get one entry in Command List, using an |
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285 | // atomic increment on the _ahci_cmd_ptw allocator |
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286 | // only the 5 LSB bits are used to index the Command List |
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287 | ptw = _atomic_increment( &_ahci_cmd_ptw , 1 ) & 0x1F; |
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288 | |
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289 | // blocked until allocated entry in Command List is empty |
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290 | iter = SDC_POLLING_TIMEOUT; |
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291 | do |
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292 | { |
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293 | // get PXCI register |
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294 | pxci = _sdc_get_register( AHCI_PXCI ); |
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295 | |
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296 | // check livelock |
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297 | iter--; |
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298 | if ( iter == 0 ) |
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299 | { |
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300 | _printf("\n[SDC ERROR] in _sdc_access() : cannot get PXCI slot\n"); |
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301 | return 1; |
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302 | } |
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303 | } |
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304 | while ( pxci & (1<<ptw) ); |
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305 | |
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306 | // compute pointers on command descriptor and command table |
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307 | cmd_desc = &_ahci_cmd_list[ptw]; |
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308 | cmd_table = &_ahci_cmd_table[ptw]; |
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309 | |
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310 | // set buffer descriptor in command table |
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311 | cmd_table->buffer.dba = (unsigned int)(buf_paddr); |
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312 | cmd_table->buffer.dbau = (unsigned int)(buf_paddr >> 32); |
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313 | cmd_table->buffer.dbc = count * 512; |
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314 | |
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315 | // initialize command table header |
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316 | cmd_table->header.lba0 = (char)lba; |
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317 | cmd_table->header.lba1 = (char)(lba>>8); |
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318 | cmd_table->header.lba2 = (char)(lba>>16); |
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319 | cmd_table->header.lba3 = (char)(lba>>24); |
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320 | cmd_table->header.lba4 = 0; |
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321 | cmd_table->header.lba5 = 0; |
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322 | |
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323 | // initialise command descriptor |
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324 | cmd_desc->prdtl[0] = 1; |
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325 | cmd_desc->prdtl[1] = 0; |
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326 | if( to_mem ) cmd_desc->flag[0] = 0x00; |
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327 | else cmd_desc->flag[0] = 0x40; |
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328 | |
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329 | #if USE_IOB // software L2/L3 cache coherence |
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330 | |
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331 | // compute physical addresses |
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332 | unsigned long long cmd_desc_paddr; // command descriptor physical address |
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333 | unsigned long long cmd_table_paddr; // command table header physical address |
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334 | unsigned int flags; // unused |
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335 | |
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336 | if ( _get_mmu_mode() & 0x4 ) |
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337 | { |
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338 | cmd_desc_paddr = _v2p_translate( (unsigned int)cmd_desc , &flags ); |
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339 | cmd_table_paddr = _v2p_translate( (unsigned int)cmd_table , &flags ); |
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340 | } |
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341 | else |
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342 | { |
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343 | cmd_desc_paddr = (unsigned int)cmd_desc; |
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344 | cmd_table_paddr = (unsigned int)cmd_table; |
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345 | } |
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346 | |
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347 | // update external memory for command table |
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348 | _mmc_sync( cmd_table_paddr & (~0x3F) , sizeof(ahci_cmd_table_t) ); |
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349 | |
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350 | // update external memory for command descriptor |
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351 | _mmc_sync( cmd_desc_paddr & (~0x3F) , sizeof(ahci_cmd_desc_t) ); |
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352 | |
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353 | // inval or synchronize memory buffer |
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354 | if ( to_mem ) _mmc_inval( buf_paddr, count<<9 ); |
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355 | else _mmc_sync( buf_paddr, count<<9 ); |
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356 | |
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357 | #endif // end software L2/L3 cache coherence |
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358 | |
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359 | ///////////////////////////////////////////////////////////////////// |
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360 | // In synchronous mode, we poll the PXCI register until completion |
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361 | ///////////////////////////////////////////////////////////////////// |
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362 | if ( use_irq == 0 ) |
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363 | { |
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364 | // start transfer |
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365 | _sdc_set_register( AHCI_PXCI, (1<<ptw) ); |
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366 | |
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367 | #if GIET_DEBUG_IOC_DRIVER |
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368 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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369 | _printf("\n[DEBUG SDC] _sdc_access() : command %d for P[%d,%d,%d]" |
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370 | " at cycle %d / polling\n", |
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371 | ptw , x , y , p , _get_proctime() ); |
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372 | #endif |
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373 | // disable IRQs in PXIE register |
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374 | _sdc_set_register( AHCI_PXIE , 0 ); |
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375 | |
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376 | // poll PXCI[ptw] until command completed |
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377 | iter = SDC_POLLING_TIMEOUT; |
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378 | do |
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379 | { |
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380 | pxci = _sdc_get_register( AHCI_PXCI ); |
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381 | |
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382 | // check livelock |
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383 | iter--; |
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384 | if ( iter == 0 ) |
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385 | { |
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386 | _printf("\n[SDC ERROR] in _sdc_access() : polling PXCI timeout\n"); |
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387 | return 1; |
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388 | } |
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389 | } |
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390 | while( pxci & (1<<ptw) ); |
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391 | |
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392 | // get PXIS register |
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393 | pxis = _sdc_get_register( AHCI_PXIS ); |
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394 | |
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395 | // reset PXIS register |
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396 | _sdc_set_register( AHCI_PXIS , 0 ); |
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397 | } |
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398 | |
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399 | ///////////////////////////////////////////////////////////////// |
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400 | // in descheduling mode, we deschedule the task |
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401 | // and use an interrupt to reschedule the task. |
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402 | // We need a critical section, because we must reset the RUN bit |
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403 | // before to launch the transfer, and we don't want to be |
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404 | // descheduled between these two operations. |
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405 | ///////////////////////////////////////////////////////////////// |
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406 | else |
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407 | { |
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408 | |
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409 | #if GIET_DEBUG_IOC_DRIVER |
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410 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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411 | _printf("\n[DEBUG SDC] _sdc_access() : command %d for P[%d,%d,%d] " |
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412 | "at cycle %d / descheduling\n", |
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413 | ptw , x , y , p , _get_proctime() ); |
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414 | #endif |
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415 | unsigned int save_sr; |
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416 | unsigned int ltid = _get_current_task_id(); |
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417 | |
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418 | // activates interrupt |
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419 | _sdc_set_register( AHCI_PXIE , 0x00000001 ); |
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420 | |
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421 | // set _ahci_gtid[ptw] |
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422 | _ahci_gtid[ptw] = (procid<<16) + ltid; |
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423 | |
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424 | // enters critical section |
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425 | _it_disable( &save_sr ); |
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426 | |
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427 | // reset runnable |
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428 | _set_task_slot( x, y, p, ltid, CTX_RUN_ID, 0 ); |
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429 | |
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430 | // start transfer |
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431 | _sdc_set_register( AHCI_PXCI, (1<<ptw) ); |
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432 | |
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433 | // deschedule task |
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434 | _ctx_switch(); |
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435 | |
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436 | #if GIET_DEBUG_IOC_DRIVER |
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437 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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438 | _printf("\n[DEBUG SDC] _sdc_access() : task %d on P[%d,%d,%d] resume at cycle %d\n", |
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439 | ltid , x , y , p , _get_proctime() ); |
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440 | #endif |
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441 | |
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442 | // restore SR |
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443 | _it_restore( &save_sr ); |
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444 | |
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445 | // get command status |
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446 | pxis = _ahci_status[ptw]; |
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447 | } |
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448 | |
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449 | #if GIET_DEBUG_IOC_DRIVER |
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450 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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451 | _printf("\n[DEBUG SDC] _sdc_access() : P[%d,%d,%d] exit at cycle %d\n", |
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452 | x , y , p , _get_proctime() ); |
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453 | #endif |
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454 | |
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455 | if ( pxis & 0x40000000 ) return pxis; |
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456 | else return 0; |
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457 | |
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458 | } // end _sdc_access() |
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459 | |
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460 | |
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461 | /////////////////////////////////////////////////////////////////////////////// |
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462 | // This ISR handles the IRQ generated by the AHCI_SDC controler |
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463 | /////////////////////////////////////////////////////////////////////////////// |
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464 | void _sdc_isr( unsigned int irq_type, |
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465 | unsigned int irq_id, |
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466 | unsigned int channel ) |
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467 | { |
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468 | // get AHCI_PXCI containing commands status |
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469 | unsigned int pxci = _sdc_get_register( AHCI_PXCI ); |
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470 | |
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471 | // we must handle all completed commands |
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472 | // active commands are between (_ahci_cmd_ptr) and (_ahci_cmd_ptw-1) |
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473 | unsigned int current; |
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474 | for ( current = _ahci_cmd_ptr ; current != _ahci_cmd_ptw ; current++ ) |
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475 | { |
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476 | unsigned int ptr = current & 0x1F; |
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477 | |
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478 | if ( (pxci & (1<<ptr)) == 0 ) // command completed |
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479 | { |
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480 | // increment the 32 bits variable _ahci_cmd_ptr |
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481 | _ahci_cmd_ptr++; |
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482 | |
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483 | // save AHCI_PXIS register |
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484 | _ahci_status[ptr] = _sdc_get_register( AHCI_PXIS ); |
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485 | |
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486 | // reset AHCI_PXIS register |
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487 | _sdc_set_register( AHCI_PXIS , 0 ); |
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488 | |
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489 | // identify waiting task |
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490 | unsigned int remote_procid = _ahci_gtid[ptr]>>16; |
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491 | unsigned int ltid = _ahci_gtid[ptr] & 0xFFFF; |
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492 | unsigned int remote_cluster = remote_procid >> P_WIDTH; |
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493 | unsigned int remote_x = remote_cluster >> Y_WIDTH; |
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494 | unsigned int remote_y = remote_cluster & ((1<<Y_WIDTH)-1); |
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495 | unsigned int remote_p = remote_procid & ((1<<P_WIDTH)-1); |
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496 | |
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497 | // re-activates waiting task |
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498 | _set_task_slot( remote_x, |
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499 | remote_y, |
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500 | remote_p, |
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501 | ltid, |
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502 | CTX_RUN_ID, |
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503 | 1 ); |
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504 | |
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505 | // send a WAKUP WTI to processor running the waiting task |
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506 | _xcu_send_wti( remote_cluster , |
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507 | remote_p , |
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508 | 0 ); // don't force context switch |
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509 | |
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510 | #if GIET_DEBUG_IOC_DRIVER |
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511 | if (_get_proctime() > GIET_DEBUG_IOC_DRIVER) |
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512 | _printf("\n[DEBUG SDC] _sdc_isr() : command %d completed at cycle %d\n" |
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513 | " resume task %d running on P[%d,%d,%d] / status = %x\n", |
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514 | ptr , _get_proctime() , |
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515 | ltid , remote_x , remote_y , remote_p , _ahci_status[ptr] ); |
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516 | #endif |
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517 | } |
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518 | else // command non completed |
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519 | { |
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520 | break; |
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521 | } |
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522 | } |
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523 | } // end _sdc_isr() |
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524 | |
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525 | // Local Variables: |
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526 | // tab-width: 4 |
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527 | // c-basic-offset: 4 |
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528 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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529 | // indent-tabs-mode: nil |
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530 | // End: |
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531 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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