1 | /////////////////////////////////////////////////////////////////////////////////// |
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2 | // File : spi_driver.h |
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3 | // Date : 31/08/2012 |
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4 | // Author : cesar fuguet |
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5 | // Copyright (c) UPMC-LIP6 |
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6 | /////////////////////////////////////////////////////////////////////////////////// |
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7 | #ifndef _GIET_SPI_DRIVER_H_ |
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8 | #define _GIET_SPI_DRIVER_H_ |
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9 | |
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10 | #include <io.h> |
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11 | #include <mapping_info.h> |
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12 | |
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13 | /////////////////////////////////////////////////////////////////////////////// |
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14 | // SPI structure definition |
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15 | /////////////////////////////////////////////////////////////////////////////// |
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16 | struct spi_dev |
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17 | { |
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18 | // RX/TX registers of the SPI controller |
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19 | unsigned int rx_tx[4]; |
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20 | |
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21 | // control register of the SPI controller |
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22 | unsigned int ctrl; |
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23 | |
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24 | // divider register for the SPI controller generated clock signal |
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25 | unsigned int divider; |
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26 | |
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27 | // slave select register of the SPI controller |
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28 | unsigned int ss; |
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29 | |
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30 | // SPI-DMA registers |
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31 | unsigned int dma_base; |
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32 | unsigned int dma_baseh; |
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33 | unsigned int dma_count; |
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34 | }; |
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35 | |
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36 | void spi_put_tx(struct spi_dev * spi, unsigned char byte, int index); |
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37 | |
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38 | inline volatile unsigned char spi_get_rx(struct spi_dev * spi, int index); |
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39 | |
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40 | unsigned int spi_get_data(struct spi_dev * spi, paddr_t buffer, unsigned int count); |
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41 | |
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42 | inline void spi_ss_assert(struct spi_dev * spi, int index); |
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43 | |
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44 | inline void spi_ss_deassert(struct spi_dev * spi, int index); |
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45 | |
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46 | void _spi_init ( struct spi_dev * spi, |
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47 | int spi_freq , |
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48 | int sys_freq , |
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49 | int char_len , |
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50 | int tx_edge , |
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51 | int rx_edge ); |
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52 | |
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53 | /////////////////////////////////////////////////////////////////////////////// |
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54 | // SPI macros and constants |
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55 | /////////////////////////////////////////////////////////////////////////////// |
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56 | #define SPI_TX_POSEDGE 1 // MOSI is changed on neg edge |
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57 | #define SPI_TX_NEGEDGE 0 // MOSI is changed on pos edge |
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58 | #define SPI_RX_POSEDGE 1 // MISO is latched on pos edge |
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59 | #define SPI_RX_NEGEDGE 0 // MISO is latched on neg edge |
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60 | |
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61 | #define SPI_CTRL_ASS_EN ( 1 << 13 ) // Auto Slave Sel Assertion |
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62 | #define SPI_CTRL_IE_EN ( 1 << 12 ) // Interrupt Enable |
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63 | #define SPI_CTRL_LSB_EN ( 1 << 11 ) // LSB are sent first |
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64 | #define SPI_CTRL_TXN_EN ( 1 << 10 ) // MOSI is changed on neg edge |
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65 | #define SPI_CTRL_RXN_EN ( 1 << 9 ) // MISO is latched on neg edge |
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66 | #define SPI_CTRL_GO_BSY ( 1 << 8 ) // Start the transfer |
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67 | #define SPI_CTRL_DMA_BSY ( 1 << 16 ) // DMA in progress |
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68 | #define SPI_CTRL_CHAR_LEN_MASK ( 0xFF ) // Bits transmited in 1 transfer |
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69 | #define SPI_RXTX_MASK ( 0xFF ) // Mask for the an RX/TX value |
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70 | |
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71 | #define SPI_DMA_COUNT_READ ( 1 << 0 ) // operation is a read (else write) |
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72 | |
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73 | /////////////////////////////////////////////////////////////////////////////// |
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74 | // SPI_IS_BUSY() |
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75 | // This macro checks the GO_BSY and DMA_BSY bits of the SPI controller which |
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76 | // indicates an ongoing transfer. |
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77 | // |
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78 | // Returns 1 if there is an unfinished transfer |
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79 | /////////////////////////////////////////////////////////////////////////////// |
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80 | #define SPI_IS_BUSY(x) \ |
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81 | ((ioread32(&x->ctrl) & (SPI_CTRL_GO_BSY|SPI_CTRL_DMA_BSY)) != 0) ? 1 : 0 |
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82 | |
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83 | #endif |
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84 | |
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85 | // Local Variables: |
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86 | // tab-width: 4 |
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87 | // c-basic-offset: 4 |
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88 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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89 | // indent-tabs-mode: nil |
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90 | // End: |
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91 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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