source: soft/giet_vm/giet_kernel/irq_handler.h @ 579

Last change on this file since 579 was 547, checked in by alain, 9 years ago

Move the peripheral initialisation from the boot.c to the kernel_init.c
  • Property svn:executable set to *
File size: 6.7 KB
Line 
1///////////////////////////////////////////////////////////////////////////
2// File     : irq_handler.h
3// Date     : 01/04/2012
4// Author   : alain greiner
5// Copyright (c) UPMC-LIP6
6///////////////////////////////////////////////////////////////////////////
7// The irq_handler.c and irq_handler.h files are part of the GIET-VM.
8// They contain the code of used to handlle HWI, WTI, PTI interrupts.
9///////////////////////////////////////////////////////////////////////////
10
11#ifndef _IRQ_HANDLER_H
12#define _IRQ_HANDLER_H
13
14///////////////////////////////////////////////////////////////////////////
15// This enum must consistent with the values defined in
16// xml_driver.c / xml_parser.c / irq_handler.c / mapping.py
17///////////////////////////////////////////////////////////////////////////
18
19enum isr_type_t
20{
21    ISR_DEFAULT = 0,
22    ISR_TICK    = 1,
23    ISR_TTY_RX  = 2,
24    ISR_TTY_TX  = 3,
25    ISR_BDV     = 4,
26    ISR_TIMER   = 5,
27    ISR_WAKUP   = 6,
28    ISR_NIC_RX  = 7,
29    ISR_NIC_TX  = 8,
30    ISR_CMA     = 9,
31    ISR_MMC     = 10,
32    ISR_DMA     = 11,
33    ISR_SDC     = 12,
34    ISR_MWR     = 13,
35    ISR_HBA     = 14,
36};
37
38///////////////////////////////////////////////////////////////////////////
39//    Global variables allocated in irq_handler.c     
40///////////////////////////////////////////////////////////////////////////
41
42// array of external IRQ indexes for each (isr/channel) couple
43extern unsigned char _ext_irq_index[GIET_ISR_TYPE_MAX][GIET_ISR_CHANNEL_MAX];
44
45// WTI mailbox allocators for external IRQ routing (3 allocators per proc)
46extern unsigned char _wti_alloc_one[X_SIZE][Y_SIZE][NB_PROCS_MAX];
47extern unsigned char _wti_alloc_two[X_SIZE][Y_SIZE][NB_PROCS_MAX];
48extern unsigned char _wti_alloc_ter[X_SIZE][Y_SIZE][NB_PROCS_MAX];
49
50// ISR type names
51extern char* _isr_type_str[GIET_ISR_TYPE_MAX];
52
53// IRQ type names
54extern char* _irq_type_str[3];
55
56///////////////////////////////////////////////////////////////////////////
57//    irq_handler functions
58///////////////////////////////////////////////////////////////////////////
59
60///////////////////////////////////////////////////////////////////////////
61// This function is only used when the architecture contains an external
62// IOPIC component. It initializes the _ext_irq_index[isr][channel] array,
63// defining the IRQ index associated to (isr_type/isr_channel) couple.
64// This array is used by the kernel for dynamic routing of an external IRQ
65// signaling completion to  the processor that launched the I/O operation.
66///////////////////////////////////////////////////////////////////////////
67
68extern void _ext_irq_init();
69
70///////////////////////////////////////////////////////////////////////////
71// This function is only used when the architecture contains an external
72// IOPIC component. It dynamically routes an external IRQ signaling
73// completion of an I/O operation to the processor P[x,y,p] running
74// the calling task.
75// 1) it allocates a WTI mailbox in the XCU of cluster[x,y] : Each processor
76//    has 3  mailboxes, with index in [4*p+1, 4*p+2, 4*p+3].
77// 2) it initialises the IOPIC_ADDRESS and IOPIC_MASK registers associated
78//    to the (isr_type/isr_channel) couple.
79// 3) it initializes the proper entry in the WTI interrupt vector associated
80//    to processor P[x,y,p].
81///////////////////////////////////////////////////////////////////////////
82
83extern void _ext_irq_alloc( unsigned int   isr_type,
84                            unsigned int   isr_channel,
85                            unsigned int*  wti_index );
86                             
87///////////////////////////////////////////////////////////////////////////
88// This function is only used when the architecture contains an external
89// IOPIC component. It desallocates all ressources allocated by the
90// previous _ext_irq_alloc() function to the calling processor.
91// 1)  it desactivates the PIC entry associated to (isr_type/isr_channel).
92// 2) it releases the WTI mailbox in the XCU of cluster[x,y].
93///////////////////////////////////////////////////////////////////////////
94
95extern void _ext_irq_release( unsigned int isr_type,
96                              unsigned int isr_channel,
97                              unsigned int wti_index );
98
99///////////////////////////////////////////////////////////////////////////
100// This function access the XICU component (Interrupt Controler Unit)
101// to get the interrupt vector entry. There is one XICU component per
102// cluster, and this component can support up to NB_PROCS_MAX output IRQs.
103// It returns the highest priority active interrupt index (smaller
104// indexes have the highest priority).
105// Any value larger than 31 means "no active interrupt".
106//
107// There is three interrupt vectors per processor (stored in the processor's
108// scheduler) for the three HWI, PTI, and WTI interrupts types.
109// Each interrupt vector entry contains two fields:
110// - isr_type     bits[15:0]  : defines the type of ISR to be executed.
111// - isr_channel  bits[31:16] : defines the channel index
112// If the peripheral is replicated in clusters, the channel_id is
113// a global index : channel_id = cluster_id * NB_CHANNELS_MAX + loc_id   
114///////////////////////////////////////////////////////////////////////////
115
116extern void _irq_demux();
117
118///////////////////////////////////////////////////////////////////////////
119// This default ISR is called  when the interrupt handler is called,
120// and there is no active IRQ. It displays a warning message on TTY[0].
121///////////////////////////////////////////////////////////////////////////
122
123extern void _isr_default();
124
125///////////////////////////////////////////////////////////////////////////
126// This ISR can only be executed after a WTI to force a context switch
127// on a remote processor. The context switch is only executed if the
128// current task is the IDLE_TASK, or if the value written in the mailbox
129// is non zero.
130///////////////////////////////////////////////////////////////////////////
131
132extern void _isr_wakup( unsigned int irq_type,
133                        unsigned int irq_id,
134                        unsigned int channel );
135
136/////////////////////////////////////////////////////////////////////////////////////
137// This ISR is in charge of context switch, and handles the IRQs generated by
138// the "system" timers. It can be PTI in case of XCU, or it can be HWI generated
139// by an external timer in case of ICU.
140// The ISR acknowledges the IRQ, and calls the _ctx_switch() function.
141/////////////////////////////////////////////////////////////////////////////////////
142extern void _isr_tick( unsigned int irq_type,
143                       unsigned int irq_id,
144                       unsigned int channel );
145
146#endif
147
148// Local Variables:
149// tab-width: 4
150// c-basic-offset: 4
151// c-file-offsets:((innamespace . 0)(inline-open . 0))
152// indent-tabs-mode: nil
153// End:
154// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
155
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