[258] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : kernel_init.c |
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| 3 | // Date : 26/05/2012 |
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| 4 | // Authors : alain greiner & mohamed karaoui |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | //////////////////////////////////////////////////////////////////////////////////// |
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| 7 | // The kernel_init.c file is part of the GIET-VM nano-kernel. |
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| 8 | // |
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| 9 | // This nano-kernel has been written for the MIPS32 processor. |
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| 10 | // The virtual adresses are on 32 bits and use the (unsigned int) type, but the |
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[310] | 11 | // physicals addresses can have up to 40 bits, and use the (unsigned long long) type. |
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[258] | 12 | // It natively supports clusterised shared mmemory multi-processors architectures, |
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[310] | 13 | // where each processor is identified by a composite index [x,y,lpid], |
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[258] | 14 | // and where there is one physical memory bank per cluster. |
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| 15 | // |
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[391] | 16 | // The kernel_init() function is executed sequencially by all procesors. |
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| 17 | // It completes the system initialisation that has been started by processor[0,0,0] |
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[310] | 18 | // in the boot_init() function. It makes the following assuptions, regarding the work |
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| 19 | // bone by the boot code: |
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| 20 | // |
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| 21 | // 1) The page tables associated to the various vspaces have been build |
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| 22 | // in physical memory, and can be used by the kernel code. |
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| 23 | // |
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| 24 | // 2) All schedulers (this include all task contexts) have been initialised, |
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| 25 | // Both the virtual and the physical base addresses of the page tables |
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| 26 | // are available in the CTX_PTAB and CTX_PTPR slots. |
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| 27 | // |
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| 28 | // 3) The CP0_SCHED register of each processor contains a pointer on its |
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| 29 | // private scheduler (virtual address). |
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| 30 | // |
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| 31 | // 4) The CP2_PTPR register of each processor contains a pointer on |
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| 32 | // the vspace_0 page table (physical address>>13). |
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| 33 | // |
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| 34 | // 5) For all processors, the MMU is activated (CP2_MODE contains 0xF). |
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| 35 | // |
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| 36 | // This code must be loaded in .kinit section, in order to control seg_kinit_base, |
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| 37 | // as this address is used by the boot code to jump into kernel code. |
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| 38 | // |
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| 39 | // Each processor performs the following actions: |
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| 40 | // 1/ contribute to _schedulers_paddr[] array initialisation. |
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| 41 | // 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation |
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| 42 | // 3/ completes task context initialisation for ech allocated task |
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| 43 | // 4/ compute and set the ICU mask for its private ICU channel |
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| 44 | // 5/ initialise its private TICK timer (if tasks > 0) |
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| 45 | // 6/ initialise the "idle" task context in its private scheduler |
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| 46 | // 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret. |
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[258] | 47 | //////////////////////////////////////////////////////////////////////////////////// |
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| 48 | |
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| 49 | #include <giet_config.h> |
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| 50 | |
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| 51 | // kernel libraries |
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| 52 | #include <utils.h> |
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| 53 | #include <fat32.h> |
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| 54 | |
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| 55 | //for peripheral initialisation |
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| 56 | #include <dma_driver.h> |
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| 57 | #include <fbf_driver.h> |
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| 58 | #include <tty_driver.h> |
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| 59 | #include <icu_driver.h> |
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| 60 | #include <xcu_driver.h> |
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| 61 | #include <ioc_driver.h> |
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| 62 | #include <mmc_driver.h> |
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| 63 | #include <mwr_driver.h> |
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| 64 | #include <nic_driver.h> |
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| 65 | #include <tim_driver.h> |
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| 66 | |
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| 67 | #include <ctx_handler.h> |
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| 68 | #include <irq_handler.h> |
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| 69 | |
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| 70 | #include <mapping_info.h> |
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| 71 | #include <mips32_registers.h> |
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| 72 | |
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[322] | 73 | #if !defined(X_SIZE) |
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| 74 | # error: You must define X_SIZE in the hard_config.h file |
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| 75 | #endif |
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| 76 | |
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| 77 | #if !defined(Y_SIZE) |
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| 78 | # error: You must define Y_SIZE in the hard_config.h file |
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| 79 | #endif |
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| 80 | |
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| 81 | #if !defined(Y_WIDTH) |
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| 82 | # error: You must define Y_WIDTH in the hard_config.h file |
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| 83 | #endif |
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| 84 | |
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| 85 | #if !defined(Y_WIDTH) |
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| 86 | # error: You must define Y_WIDTH in the hard_config.h file |
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| 87 | #endif |
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| 88 | |
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| 89 | #if !defined(NB_PROCS_MAX) |
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| 90 | # error: You must define NB_PROCS_MAX in the hard_config.h file |
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| 91 | #endif |
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| 92 | |
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| 93 | #if !defined(NB_TOTAL_PROCS) |
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| 94 | # error: You must define NB_TOTAL_PROCS in the hard_config.h file |
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| 95 | #endif |
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| 96 | |
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| 97 | #if !defined(USE_XCU) |
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| 98 | # error: You must define USE_XCU in the hard_config.h file |
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| 99 | #endif |
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| 100 | |
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| 101 | #if !defined(IDLE_TASK_INDEX) |
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[391] | 102 | # error: You must define IDLE_TASK_INDEX in the ctx_handler.h file |
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[322] | 103 | #endif |
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| 104 | |
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| 105 | #if !defined(GIET_TICK_VALUE) |
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| 106 | # error: You must define GIET_TICK_VALUE in the giet_config.h file |
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| 107 | #endif |
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| 108 | |
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| 109 | #if !defined(GIET_NB_VSPACE_MAX) |
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| 110 | # error: You must define GIET_NB_VSPACE_MAX in the giet_config.h file |
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| 111 | #endif |
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| 112 | |
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[258] | 113 | /////////////////////////////////////////////////////////////////////////////////// |
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| 114 | // array of pointers on the page tables (virtual addresses) |
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| 115 | /////////////////////////////////////////////////////////////////////////////////// |
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| 116 | |
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| 117 | __attribute__((section (".kdata"))) |
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[345] | 118 | volatile unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX]; // virtual addresses |
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[258] | 119 | |
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| 120 | __attribute__((section (".kdata"))) |
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[345] | 121 | volatile unsigned int _ptabs_ptprs[GIET_NB_VSPACE_MAX]; // physical addresses >> 13 |
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[258] | 122 | |
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| 123 | /////////////////////////////////////////////////////////////////////////////////// |
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| 124 | // array of pointers on the schedulers (physical addresses) |
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| 125 | /////////////////////////////////////////////////////////////////////////////////// |
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| 126 | |
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| 127 | __attribute__((section (".kdata"))) |
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[373] | 128 | volatile static_scheduler_t* _schedulers[NB_PROCS_MAX<<(X_WIDTH+Y_WIDTH)]; |
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[258] | 129 | |
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| 130 | //////////////////////////////////////////////////////////////////////////////////// |
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[391] | 131 | // Synchonisation barrier before jumping to user code |
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[258] | 132 | //////////////////////////////////////////////////////////////////////////////////// |
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| 133 | |
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| 134 | __attribute__((section (".kdata"))) |
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[345] | 135 | volatile unsigned int _init_barrier = 0; |
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[294] | 136 | |
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[310] | 137 | /////////////////////////////////////////////////////////////////////////////////// |
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| 138 | __attribute__((section (".kinit"))) void kernel_init() |
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[258] | 139 | { |
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| 140 | unsigned int global_pid = _get_procid(); |
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[263] | 141 | unsigned int cluster_xy = global_pid / NB_PROCS_MAX; |
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[294] | 142 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 143 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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| 144 | unsigned int lpid = global_pid % NB_PROCS_MAX; |
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[310] | 145 | unsigned int pid = ((( x * Y_SIZE) + y) * NB_PROCS_MAX) + lpid; |
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[258] | 146 | |
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[310] | 147 | // This last initialisation phase is done sequencially: |
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| 148 | while( pid != _init_barrier ) asm volatile ( "nop" ); |
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| 149 | |
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[391] | 150 | // Step 1 : each processor get its scheduler virtual address from CP0 register |
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[258] | 151 | // and contribute to initialise the _schedulers[] array |
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| 152 | |
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| 153 | static_scheduler_t* psched = (static_scheduler_t*)_get_sched(); |
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| 154 | unsigned int tasks = psched->tasks; |
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| 155 | |
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| 156 | _schedulers[global_pid] = psched; |
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| 157 | |
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| 158 | #if GIET_DEBUG_INIT |
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[310] | 159 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts kernel init\n" |
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[294] | 160 | " - scheduler vbase = %x\n" |
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| 161 | " - tasks = %d\n", |
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| 162 | x, y, lpid, (unsigned int)psched, tasks ); |
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[258] | 163 | #endif |
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| 164 | |
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[294] | 165 | // step 2 : each processor that is allocated at least one task loops |
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| 166 | // on all allocated tasks: |
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| 167 | // - contributes to _ptabs_vaddr[] & _ptabs_ptprs[] initialisation. |
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| 168 | // - set CTX_RA slot with the kernel _ctx_eret() virtual address. |
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| 169 | // - set CTX_EPC slot that must contain the task entry point, |
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| 170 | // and contain only at this point the virtual address of the memory |
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| 171 | // location containing this entry point. We must switch the PTPR |
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| 172 | // to use the page table corresponding to the task. |
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[258] | 173 | |
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| 174 | unsigned int ltid; |
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| 175 | |
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| 176 | for (ltid = 0; ltid < tasks; ltid++) |
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| 177 | { |
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| 178 | unsigned int vsid = _get_task_slot( global_pid, ltid , CTX_VSID_ID ); |
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| 179 | unsigned int ptab = _get_task_slot( global_pid, ltid , CTX_PTAB_ID ); |
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| 180 | unsigned int ptpr = _get_task_slot( global_pid, ltid , CTX_PTPR_ID ); |
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| 181 | |
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[294] | 182 | // initialize PTABS arrays |
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[258] | 183 | _ptabs_vaddr[vsid] = ptab; |
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| 184 | _ptabs_ptprs[vsid] = ptpr; |
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| 185 | |
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[294] | 186 | #if GIET_DEBUG_INIT |
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[299] | 187 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] contributes to PTABS arrays\n" |
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[294] | 188 | " - ptabs_vaddr[%d] = %x / ptpr_paddr[%d] = %l\n", |
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| 189 | x, y, lpid, |
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| 190 | vsid, ptab, vsid, ((unsigned long long)ptpr)<<13 ); |
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| 191 | #endif |
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| 192 | |
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| 193 | // set the ptpr to use the task page table |
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| 194 | asm volatile( "mtc2 %0, $0 \n" |
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| 195 | : : "r" (ptpr) ); |
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| 196 | |
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| 197 | // compute ctx_ra |
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[258] | 198 | unsigned int ctx_ra = (unsigned int)(&_ctx_eret); |
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| 199 | _set_task_slot( global_pid, ltid, CTX_RA_ID, ctx_ra ); |
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| 200 | |
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[294] | 201 | // compute ctx_epc |
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[258] | 202 | unsigned int* ptr = (unsigned int*)_get_task_slot( global_pid, ltid, CTX_EPC_ID ); |
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| 203 | _set_task_slot( global_pid, ltid, CTX_EPC_ID, *ptr ); |
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| 204 | |
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| 205 | #if GIET_DEBUG_INIT |
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[310] | 206 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] updates context for task %d\n" |
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[294] | 207 | " - ctx_epc = %x\n" |
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| 208 | " - ctx_ra = %x\n", |
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| 209 | x, y, lpid, ltid, |
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| 210 | _get_task_slot( global_pid, ltid, CTX_EPC_ID ), |
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| 211 | _get_task_slot( global_pid, ltid, CTX_RA_ID ) ); |
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[258] | 212 | #endif |
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| 213 | |
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[294] | 214 | } // end for tasks |
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[258] | 215 | |
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[294] | 216 | // step 4 : compute and set ICU or XCU masks |
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[258] | 217 | |
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[263] | 218 | unsigned int isr_switch_index = 0xFFFFFFFF; |
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[258] | 219 | unsigned int hwi_mask = 0; |
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| 220 | unsigned int pti_mask = 0; |
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[294] | 221 | unsigned int wti_mask = 0; |
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| 222 | unsigned int irq_id; // IN_IRQ index |
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| 223 | unsigned int entry; // interrupt vector entry |
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[258] | 224 | |
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| 225 | for (irq_id = 0; irq_id < 32; irq_id++) |
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| 226 | { |
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[294] | 227 | entry = psched->hwi_vector[irq_id]; |
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| 228 | if ( entry & 0x80000000 ) hwi_mask = hwi_mask | (1<<irq_id); |
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| 229 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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[258] | 230 | |
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[294] | 231 | entry = psched->pti_vector[irq_id]; |
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| 232 | if ( entry & 0x80000000 ) pti_mask = pti_mask | (1<<irq_id); |
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| 233 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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| 234 | |
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| 235 | entry = psched->wti_vector[irq_id]; |
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| 236 | if ( entry & 0x80000000 ) wti_mask = wti_mask | (1<<irq_id); |
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| 237 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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[258] | 238 | } |
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| 239 | |
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| 240 | #if GIET_DEBUG_INIT |
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[310] | 241 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] sets XCU masks\n" |
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[294] | 242 | " - ICU HWI_MASK = %x\n" |
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| 243 | " - ICU WTI_MASK = %x\n" |
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| 244 | " - ICU PTI_MASK = %x\n", |
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| 245 | x, y, lpid, hwi_mask, wti_mask, pti_mask ); |
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[258] | 246 | #endif |
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| 247 | |
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[294] | 248 | unsigned int channel = lpid * IRQ_PER_PROCESSOR; |
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[258] | 249 | |
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[322] | 250 | #if USE_XCU |
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[294] | 251 | _xcu_set_mask( cluster_xy, channel, hwi_mask, IRQ_TYPE_HWI ); |
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| 252 | _xcu_set_mask( cluster_xy, channel, wti_mask, IRQ_TYPE_WTI ); |
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| 253 | _xcu_set_mask( cluster_xy, channel, pti_mask, IRQ_TYPE_PTI ); |
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[258] | 254 | #else |
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[294] | 255 | _icu_set_mask( cluster_xy, channel, hwi_mask ); |
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[258] | 256 | #endif |
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| 257 | |
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[294] | 258 | // step 5 : start TICK timer if at least one task |
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[258] | 259 | if (tasks > 0) |
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| 260 | { |
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[294] | 261 | // one ISR_TICK must be defined for each proc |
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[263] | 262 | if (isr_switch_index == 0xFFFFFFFF) |
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[258] | 263 | { |
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[294] | 264 | _printf("\n[GIET ERROR] ISR_TICK not found for processor[%d,%d,%d]\n", |
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| 265 | x, y, lpid ); |
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[258] | 266 | _exit(); |
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| 267 | } |
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| 268 | |
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[294] | 269 | // start system timer |
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[271] | 270 | |
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[322] | 271 | #if USE_XCU |
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[294] | 272 | _xcu_timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); |
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[258] | 273 | #else |
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[294] | 274 | _timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); |
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[258] | 275 | #endif |
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| 276 | |
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[294] | 277 | } |
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| 278 | |
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[258] | 279 | #if GIET_DEBUG_INIT |
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[310] | 280 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts TICK timer\n", |
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[294] | 281 | x, y, lpid ); |
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[258] | 282 | #endif |
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| 283 | |
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[294] | 284 | // step 6 : each processor updates the idle_task context: |
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[391] | 285 | // (CTX_SP, CTX_RA, CTX_EPC). |
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| 286 | // The 4 Kbytes idle stack is implemented in the scheduler. |
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[258] | 287 | // The PTPR register, the CTX_PTPR and CTX_PTAB slots |
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| 288 | // have been initialised in boot code. |
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| 289 | |
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[391] | 290 | unsigned int pstack = ((unsigned int)psched) + 0x2000; |
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[258] | 291 | |
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[391] | 292 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_SP_ID, pstack); |
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[258] | 293 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_RA_ID, (unsigned int) &_ctx_eret); |
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| 294 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_EPC_ID, (unsigned int) &_idle_task); |
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| 295 | |
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| 296 | #if GIET_DEBUG_INIT |
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[391] | 297 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes IDLE task\n" |
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| 298 | " - stack_base = %x\n" |
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| 299 | " - stack_size = 0x1000\n", |
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| 300 | x, y, lpid, pstack - 0x1000 ); |
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[258] | 301 | #endif |
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| 302 | |
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[294] | 303 | // step 7 : when all processors reach the synchronisation barrier, |
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| 304 | // each processor set registers SP, SR, PTPR, EPC, |
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[258] | 305 | // with the values corresponding to the first allocated task, |
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[294] | 306 | // or to the idle_task if there is no task allocated, |
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| 307 | // and jump to user code |
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[258] | 308 | |
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| 309 | if (tasks == 0) |
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| 310 | { |
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| 311 | ltid = IDLE_TASK_INDEX; |
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| 312 | |
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[294] | 313 | _printf("\n[GIET WARNING] No task allocated to processor[%d,%d,%d]\n", |
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| 314 | x, y, lpid ); |
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[258] | 315 | } |
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[294] | 316 | else |
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| 317 | { |
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| 318 | ltid = 0; |
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| 319 | } |
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[258] | 320 | |
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| 321 | unsigned int sp_value = _get_task_slot(global_pid, ltid, CTX_SP_ID); |
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| 322 | unsigned int sr_value = _get_task_slot(global_pid, ltid, CTX_SR_ID); |
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| 323 | unsigned int ptpr_value = _get_task_slot(global_pid, ltid, CTX_PTPR_ID); |
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| 324 | unsigned int epc_value = _get_task_slot(global_pid, ltid, CTX_EPC_ID); |
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| 325 | |
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[330] | 326 | #if GIET_DEBUG_INIT |
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| 327 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n", |
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| 328 | x, y, lpid, _get_proctime() ); |
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| 329 | #endif |
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[258] | 330 | |
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[310] | 331 | // increment barrier counter |
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| 332 | _init_barrier++; |
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| 333 | |
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| 334 | // busy waiting until all processors synchronized |
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[345] | 335 | while ( _init_barrier != NB_TOTAL_PROCS ); |
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[310] | 336 | |
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[391] | 337 | #if GIET_DEBUG_INIT |
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| 338 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes registers at cycle %d\n" |
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| 339 | " - sp = %x\n" |
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| 340 | " - sr = %x\n" |
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| 341 | " - ptpr = %x\n" |
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| 342 | " - epc = %x\n", |
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| 343 | x, y, lpid, _get_proctime(), |
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| 344 | sp_value, sr_value, ptpr_value, epc_value ); |
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| 345 | #endif |
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| 346 | |
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[294] | 347 | // set registers and jump to user code |
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| 348 | asm volatile ( "move $29, %0 \n" /* SP <= ctx[CTX_SP_ID] */ |
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| 349 | "mtc0 %1, $12 \n" /* SR <= ctx[CTX_SR_ID] */ |
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| 350 | "mtc2 %2, $0 \n" /* PTPR <= ctx[CTX_PTPR] */ |
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| 351 | "mtc0 %3, $14 \n" /* EPC <= ctx[CTX_EPC] */ |
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| 352 | "eret \n" /* jump to user code */ |
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| 353 | "nop \n" |
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| 354 | : |
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| 355 | : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value) |
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[345] | 356 | : "$29", "memory" ); |
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[294] | 357 | |
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[310] | 358 | } // end kernel_init() |
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[258] | 359 | |
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| 360 | |
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| 361 | // Local Variables: |
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| 362 | // tab-width: 4 |
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| 363 | // c-basic-offset: 4 |
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| 364 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 365 | // indent-tabs-mode: nil |
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| 366 | // End: |
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| 367 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 368 | |
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