source: soft/giet_vm/giet_kernel/kernel_init.c @ 408

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[258]1///////////////////////////////////////////////////////////////////////////////////
2// File     : kernel_init.c
3// Date     : 26/05/2012
4// Authors  : alain greiner & mohamed karaoui
5// Copyright (c) UPMC-LIP6
6////////////////////////////////////////////////////////////////////////////////////
7// The kernel_init.c file is part of the GIET-VM nano-kernel.
8//
9// This nano-kernel has been written for the MIPS32 processor.
10// The virtual adresses are on 32 bits and use the (unsigned int) type, but the
[310]11// physicals addresses can have up to 40 bits, and use the (unsigned long long) type.
[258]12// It natively supports clusterised shared mmemory multi-processors architectures,
[310]13// where each processor is identified by a composite index [x,y,lpid],
[258]14// and where there is one physical memory bank per cluster.
15//
[391]16// The kernel_init() function is executed sequencially by all procesors.
17// It completes the system initialisation that has been started by processor[0,0,0]
[310]18// in the boot_init() function. It makes the following assuptions, regarding the work
19// bone by the boot code:
20//
21// 1) The page tables associated to the various vspaces have been build
22//    in physical memory, and can be used by the kernel code.
23//
24// 2) All schedulers (this include all task contexts) have been initialised,
25//    Both the virtual and the physical base addresses of the page tables
26//    are available in the CTX_PTAB and CTX_PTPR slots.
27//
28// 3) The CP0_SCHED register of each processor contains a pointer on its
29//    private scheduler (virtual address).
30//
31// 4) The CP2_PTPR register of each processor contains a pointer on
32//    the vspace_0 page table (physical address>>13).
33//
34// 5) For all processors, the MMU is activated (CP2_MODE contains 0xF).
35//
36// This code must be loaded in .kinit section, in order to control seg_kinit_base,
37// as this address is used by the boot code to jump into kernel code.
38//
39// Each processor performs the following actions:
40// 1/ contribute to _schedulers_paddr[] array initialisation.
41// 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation
42// 3/ completes task context initialisation for ech allocated task
43// 4/ compute and set the ICU mask for its private ICU channel
44// 5/ initialise its private TICK timer (if tasks > 0)
45// 6/ initialise the "idle" task context in its private scheduler
46// 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret.
[258]47////////////////////////////////////////////////////////////////////////////////////
48
49#include <giet_config.h>
50
51// kernel libraries
52#include <utils.h>
53#include <fat32.h>
54
55//for peripheral initialisation
56#include <dma_driver.h>
57#include <fbf_driver.h>
58#include <tty_driver.h>
59#include <icu_driver.h>
60#include <xcu_driver.h>
61#include <ioc_driver.h>
62#include <mmc_driver.h>
63#include <mwr_driver.h>
64#include <nic_driver.h>
65#include <tim_driver.h>
66
67#include <ctx_handler.h>
68#include <irq_handler.h>
69
70#include <mapping_info.h>
71#include <mips32_registers.h>
72
[322]73#if !defined(X_SIZE)
74# error: You must define X_SIZE in the hard_config.h file
75#endif
76
77#if !defined(Y_SIZE)
78# error: You must define Y_SIZE in the hard_config.h file
79#endif
80
81#if !defined(Y_WIDTH)
82# error: You must define Y_WIDTH in the hard_config.h file
83#endif
84
85#if !defined(Y_WIDTH)
86# error: You must define Y_WIDTH in the hard_config.h file
87#endif
88
89#if !defined(NB_PROCS_MAX)
90# error: You must define NB_PROCS_MAX in the hard_config.h file
91#endif
92
93#if !defined(NB_TOTAL_PROCS)
94# error: You must define NB_TOTAL_PROCS in the hard_config.h file
95#endif
96
97#if !defined(USE_XCU)
98# error: You must define USE_XCU in the hard_config.h file
99#endif
100
101#if !defined(IDLE_TASK_INDEX)
[391]102# error: You must define IDLE_TASK_INDEX in the ctx_handler.h file
[322]103#endif
104
105#if !defined(GIET_TICK_VALUE)
106# error: You must define GIET_TICK_VALUE in the giet_config.h file
107#endif
108
109#if !defined(GIET_NB_VSPACE_MAX)
110# error: You must define GIET_NB_VSPACE_MAX in the giet_config.h file
111#endif
112
[258]113///////////////////////////////////////////////////////////////////////////////////
114// array of pointers on the page tables (virtual addresses)
115///////////////////////////////////////////////////////////////////////////////////
116
117__attribute__((section (".kdata"))) 
[345]118volatile unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX];    // virtual addresses
[258]119
120__attribute__((section (".kdata")))       
[345]121volatile unsigned int _ptabs_ptprs[GIET_NB_VSPACE_MAX];    // physical addresses >> 13
[258]122
123///////////////////////////////////////////////////////////////////////////////////
124// array of pointers on the schedulers (physical addresses)
125///////////////////////////////////////////////////////////////////////////////////
126
127__attribute__((section (".kdata"))) 
[373]128volatile static_scheduler_t* _schedulers[NB_PROCS_MAX<<(X_WIDTH+Y_WIDTH)]; 
[258]129
130////////////////////////////////////////////////////////////////////////////////////
[391]131// Synchonisation barrier before jumping to user code
[258]132////////////////////////////////////////////////////////////////////////////////////
133
134__attribute__((section (".kdata"))) 
[345]135volatile unsigned int _init_barrier = 0;
[294]136
[310]137///////////////////////////////////////////////////////////////////////////////////
138__attribute__((section (".kinit"))) void kernel_init() 
[258]139{
140    unsigned int global_pid = _get_procid();
[263]141    unsigned int cluster_xy = global_pid / NB_PROCS_MAX;
[294]142    unsigned int x          = cluster_xy >> Y_WIDTH;
143    unsigned int y          = cluster_xy & ((1<<Y_WIDTH)-1);
144    unsigned int lpid       = global_pid % NB_PROCS_MAX;
[310]145    unsigned int pid        = ((( x * Y_SIZE) + y) * NB_PROCS_MAX) + lpid;
[258]146
[310]147    // This last initialisation phase is done sequencially:
148    while( pid != _init_barrier ) asm volatile ( "nop" );
149
[391]150    // Step 1 : each processor get its scheduler virtual address from CP0 register
[258]151    //          and contribute to initialise the _schedulers[] array
152
153    static_scheduler_t* psched     = (static_scheduler_t*)_get_sched();
154    unsigned int        tasks      = psched->tasks;
155
156    _schedulers[global_pid] = psched;
157
158#if GIET_DEBUG_INIT
[310]159_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts kernel init\n"
[294]160        " - scheduler vbase = %x\n"
161        " - tasks           = %d\n",
162        x, y, lpid, (unsigned int)psched, tasks );
[258]163#endif
164
[294]165    // step 2 : each processor that is allocated at least one task loops
166    //          on all allocated tasks:
167    //          - contributes to _ptabs_vaddr[] & _ptabs_ptprs[] initialisation.
168    //          - set CTX_RA slot  with the kernel _ctx_eret() virtual address.
169    //          - set CTX_EPC slot that must contain the task entry point,
170    //            and contain only at this point the virtual address of the memory
171    //            location containing this entry point. We must switch the PTPR
172    //            to use the page table corresponding to the task.
[258]173
174    unsigned int ltid;
175
176    for (ltid = 0; ltid < tasks; ltid++) 
177    {
178        unsigned int vsid = _get_task_slot( global_pid, ltid , CTX_VSID_ID ); 
179        unsigned int ptab = _get_task_slot( global_pid, ltid , CTX_PTAB_ID ); 
180        unsigned int ptpr = _get_task_slot( global_pid, ltid , CTX_PTPR_ID ); 
181
[294]182        // initialize PTABS arrays
[258]183        _ptabs_vaddr[vsid] = ptab;
184        _ptabs_ptprs[vsid] = ptpr;
185
[294]186#if GIET_DEBUG_INIT
[299]187_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] contributes to PTABS arrays\n"
[294]188        " - ptabs_vaddr[%d] = %x / ptpr_paddr[%d] = %l\n",
189        x, y, lpid, 
190        vsid, ptab, vsid, ((unsigned long long)ptpr)<<13 );
191#endif
192
193        // set the ptpr to use the task page table
194        asm volatile( "mtc2    %0,   $0   \n"
195                      : : "r" (ptpr) );
196
197        // compute ctx_ra
[258]198        unsigned int ctx_ra = (unsigned int)(&_ctx_eret);
199        _set_task_slot( global_pid, ltid, CTX_RA_ID, ctx_ra );
200
[294]201        // compute ctx_epc
[258]202        unsigned int* ptr = (unsigned int*)_get_task_slot( global_pid, ltid, CTX_EPC_ID );
203        _set_task_slot( global_pid, ltid, CTX_EPC_ID, *ptr );
204
205#if GIET_DEBUG_INIT
[310]206_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] updates context for task %d\n"
[294]207        " - ctx_epc   = %x\n"
208        " - ctx_ra    = %x\n",
209        x, y, lpid, ltid,
210        _get_task_slot( global_pid, ltid, CTX_EPC_ID ),
211        _get_task_slot( global_pid, ltid, CTX_RA_ID ) );
[258]212#endif
213
[294]214    }  // end for tasks
[258]215
[294]216    // step 4 : compute and set ICU or XCU masks
[258]217
[263]218    unsigned int isr_switch_index = 0xFFFFFFFF;
[258]219    unsigned int hwi_mask = 0;
220    unsigned int pti_mask = 0;
[294]221    unsigned int wti_mask = 0;
222    unsigned int irq_id;            // IN_IRQ index
223    unsigned int entry;             // interrupt vector entry
[258]224
225    for (irq_id = 0; irq_id < 32; irq_id++) 
226    {
[294]227        entry = psched->hwi_vector[irq_id];
228        if ( entry & 0x80000000 ) hwi_mask = hwi_mask | (1<<irq_id);
229        if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
[258]230
[294]231        entry = psched->pti_vector[irq_id];
232        if ( entry & 0x80000000 ) pti_mask = pti_mask | (1<<irq_id);
233        if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
234
235        entry = psched->wti_vector[irq_id];
236        if ( entry & 0x80000000 ) wti_mask = wti_mask | (1<<irq_id);
237        if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
[258]238    }
239
240#if GIET_DEBUG_INIT
[310]241_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] sets XCU masks\n"
[294]242        " - ICU HWI_MASK = %x\n"
243        " - ICU WTI_MASK = %x\n"
244        " - ICU PTI_MASK = %x\n",
245        x, y, lpid, hwi_mask, wti_mask, pti_mask );
[258]246#endif
247
[294]248    unsigned int channel = lpid * IRQ_PER_PROCESSOR; 
[258]249
[322]250#if USE_XCU
[294]251    _xcu_set_mask( cluster_xy, channel, hwi_mask, IRQ_TYPE_HWI ); 
252    _xcu_set_mask( cluster_xy, channel, wti_mask, IRQ_TYPE_WTI );
253    _xcu_set_mask( cluster_xy, channel, pti_mask, IRQ_TYPE_PTI );
[258]254#else
[294]255    _icu_set_mask( cluster_xy, channel, hwi_mask );   
[258]256#endif
257
[294]258    // step 5 : start TICK timer if at least one task
[258]259    if (tasks > 0) 
260    {
[294]261        // one ISR_TICK must be defined for each proc
[263]262        if (isr_switch_index == 0xFFFFFFFF) 
[258]263        {
[294]264            _printf("\n[GIET ERROR] ISR_TICK not found for processor[%d,%d,%d]\n",
265                    x, y, lpid );
[258]266            _exit();
267        }
268
[294]269        // start system timer
[271]270
[322]271#if USE_XCU
[294]272        _xcu_timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); 
[258]273#else
[294]274        _timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); 
[258]275#endif
276
[294]277    }
278
[258]279#if GIET_DEBUG_INIT
[310]280_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts TICK timer\n",
[294]281        x, y, lpid );
[258]282#endif
283
[294]284    // step 6 : each processor updates the idle_task context:
[391]285    //          (CTX_SP, CTX_RA, CTX_EPC).
286    //          The 4 Kbytes idle stack is implemented in the scheduler.
[258]287    //          The PTPR register, the CTX_PTPR and CTX_PTAB slots
288    //          have been initialised in boot code.
289
[391]290    unsigned int pstack = ((unsigned int)psched) + 0x2000;
[258]291
[391]292    _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_SP_ID,  pstack);
[258]293    _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_RA_ID,  (unsigned int) &_ctx_eret);
294    _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_EPC_ID, (unsigned int) &_idle_task);
295
296#if GIET_DEBUG_INIT
[391]297_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes IDLE task\n"
298        " - stack_base = %x\n"
299        " - stack_size = 0x1000\n",
300        x, y, lpid, pstack - 0x1000 );
[258]301#endif
302
[294]303    // step 7 : when all processors reach the synchronisation barrier,
304    //          each processor set registers SP, SR, PTPR, EPC,
[258]305    //          with the values corresponding to the first allocated task,
[294]306    //          or to the idle_task if there is no task allocated,
307    //          and jump to user code
[258]308
309    if (tasks == 0) 
310    {
311        ltid = IDLE_TASK_INDEX;
312
[294]313        _printf("\n[GIET WARNING] No task allocated to processor[%d,%d,%d]\n",
314                x, y, lpid );
[258]315    }
[294]316    else
317    {
318        ltid = 0;
319    }
[258]320
321    unsigned int sp_value   = _get_task_slot(global_pid, ltid, CTX_SP_ID);
322    unsigned int sr_value   = _get_task_slot(global_pid, ltid, CTX_SR_ID);
323    unsigned int ptpr_value = _get_task_slot(global_pid, ltid, CTX_PTPR_ID);
324    unsigned int epc_value  = _get_task_slot(global_pid, ltid, CTX_EPC_ID);
325
[330]326#if GIET_DEBUG_INIT
327_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n",
328        x, y, lpid, _get_proctime() );
329#endif
[258]330
[310]331    // increment barrier counter
332    _init_barrier++;
333
334    // busy waiting until all processors synchronized
[345]335    while ( _init_barrier != NB_TOTAL_PROCS );
[310]336
[391]337#if GIET_DEBUG_INIT
338_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes registers at cycle %d\n"
339        " - sp   = %x\n"
340        " - sr   = %x\n"
341        " - ptpr = %x\n"
342        " - epc  = %x\n",
343        x, y, lpid, _get_proctime(),
344        sp_value, sr_value, ptpr_value, epc_value );
345#endif
346
[294]347    // set registers and jump to user code
348    asm volatile ( "move  $29,  %0                  \n"   /* SP <= ctx[CTX_SP_ID] */
349                   "mtc0  %1,   $12                 \n"   /* SR <= ctx[CTX_SR_ID] */
350                   "mtc2  %2,   $0                  \n"   /* PTPR <= ctx[CTX_PTPR] */
351                   "mtc0  %3,   $14                 \n"   /* EPC <= ctx[CTX_EPC]  */
352                   "eret                            \n"   /* jump to user code  */
353                   "nop                             \n"
354                   : 
355                   : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value)
[345]356                   : "$29", "memory" );
[294]357
[310]358} // end kernel_init()
[258]359
360
361// Local Variables:
362// tab-width: 4
363// c-basic-offset: 4
364// c-file-offsets:((innamespace . 0)(inline-open . 0))
365// indent-tabs-mode: nil
366// End:
367// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
368
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