source: soft/giet_vm/giet_kernel/kernel_init.c @ 301

Last change on this file since 301 was 299, checked in by alain, 10 years ago

ntroducing the TOTAL_PROCS variable in the hard_config.h file
(used by the synchronisation barrier in kernel_init.c)

  • Property svn:executable set to *
File size: 13.7 KB
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1///////////////////////////////////////////////////////////////////////////////////
2// File     : kernel_init.c
3// Date     : 26/05/2012
4// Authors  : alain greiner & mohamed karaoui
5// Copyright (c) UPMC-LIP6
6////////////////////////////////////////////////////////////////////////////////////
7// The kernel_init.c file is part of the GIET-VM nano-kernel.
8//
9// This nano-kernel has been written for the MIPS32 processor.
10// The virtual adresses are on 32 bits and use the (unsigned int) type, but the
11// physicals addresses can have up to 40 bits, and use the  (unsigned long long) type.
12// It natively supports clusterised shared mmemory multi-processors architectures,
13// where each processor is identified by a composite index (cluster_xy, local_id),
14// and where there is one physical memory bank per cluster.
15//
16// This file contains the _kernel_init() function, that performs the second
17// phase of system initialisation.  The three significant actions are:
18// 1) processor 0 makes peripherals and system FAT initialisation.
19// 2) processor 0 awake all other processors by an IPI.
20// 3) all processors running in parallel perform register initialisation,
21//    from their private scheduler, and jump to user code.
22////////////////////////////////////////////////////////////////////////////////////
23
24#include <giet_config.h>
25
26// kernel libraries
27#include <utils.h>
28#include <fat32.h>
29
30//for peripheral initialisation
31#include <dma_driver.h>
32#include <fbf_driver.h>
33#include <tty_driver.h>
34#include <icu_driver.h>
35#include <xcu_driver.h>
36#include <ioc_driver.h>
37#include <mmc_driver.h>
38#include <mwr_driver.h>
39#include <nic_driver.h>
40#include <tim_driver.h>
41
42#include <ctx_handler.h>
43#include <irq_handler.h>
44
45#include <mapping_info.h>
46#include <mips32_registers.h>
47
48///////////////////////////////////////////////////////////////////////////////////
49// array of pointers on the page tables (virtual addresses)
50///////////////////////////////////////////////////////////////////////////////////
51
52__attribute__((section (".kdata"))) 
53unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX];    // virtual addresses
54
55__attribute__((section (".kdata")))       
56unsigned int _ptabs_ptprs[GIET_NB_VSPACE_MAX];    // physical addresses >> 13
57
58///////////////////////////////////////////////////////////////////////////////////
59// array of pointers on the schedulers (physical addresses)
60///////////////////////////////////////////////////////////////////////////////////
61
62__attribute__((section (".kdata"))) 
63static_scheduler_t* _schedulers[NB_PROCS_MAX<<(X_WIDTH+Y_WIDTH)]; // virtual addresses
64
65////////////////////////////////////////////////////////////////////////////////////
66// staks for the "idle" tasks (512 bytes for each processor)
67////////////////////////////////////////////////////////////////////////////////////
68
69__attribute__((section (".kdata"))) 
70unsigned int _idle_stack[X_SIZE * Y_SIZE * NB_PROCS_MAX * 128 ]; 
71
72////////////////////////////////////////////////////////////////////////////////////
73// Synchonisation Barrier before jumping to user code
74////////////////////////////////////////////////////////////////////////////////////
75
76__attribute__((section (".kdata"))) 
77unsigned int _init_barrier = 0;
78
79////////////////////////////////////////////////////////////////////////////////////
80// This function is the entry point in kernel for all processors.
81// It is executed in parallel by all procesors, and completes the system
82// initialisation that has been started by processor 0 in the boot_init() function.
83//
84// This kernel code makes the following assuptions, regarding the work bone
85// by the boot code:
86//
87// 1) The page tables associated to the various vspaces have been build
88//    in physical memory, and can be used by the kernel code.
89//
90// 2) All schedulers (this include all task contexts) have been initialised,
91//    Both the virtual and the physical base addresses of the page tables
92//    are available in the CTX_PTAB and CTX_PTPR slots.
93//
94// 3) The CP0_SCHED register of each processor contains a pointer on its
95//    private scheduler (virtual address).
96//
97// 4) The CP2_PTPR register of each processor contains a pointer on
98//    the vspace_0 page table (physical address>>13).
99//
100// 5) For all processors, the MMU is activated (CP2_MODE contains 0xF).
101//
102// This code must be loaded in .kinit section, in order to control seg_kinit_base,
103// as this address is used by the boot code to jump into kernel code.
104////////////////////////////////////////////////////////////////////////////////////
105// Each processor performs the following actions:
106// 1/ contribute to _schedulers_paddr[] array initialisation.
107// 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation
108// 3/ completes task context initialisation for ech allocated task
109// 4/ compute and set the ICU mask for its private ICU channel
110// 5/ initialise its private TICK timer (if tasks > 0)
111// 6/ initialise the "idle" task context in its private scheduler
112// 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret.
113////////////////////////////////////////////////////////////////////////////////////
114__attribute__((section (".kinit"))) void kernel_parallel_init() 
115{
116    unsigned int global_pid = _get_procid();
117    unsigned int cluster_xy = global_pid / NB_PROCS_MAX;
118    unsigned int x          = cluster_xy >> Y_WIDTH;
119    unsigned int y          = cluster_xy & ((1<<Y_WIDTH)-1);
120    unsigned int lpid       = global_pid % NB_PROCS_MAX;
121
122    // Step 1 : each processor get its scheduler virtual address
123    //          and contribute to initialise the _schedulers[] array
124
125    static_scheduler_t* psched     = (static_scheduler_t*)_get_sched();
126    unsigned int        tasks      = psched->tasks;
127
128    _schedulers[global_pid] = psched;
129
130#if GIET_DEBUG_INIT
131_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d]\n"
132        " - scheduler vbase = %x\n"
133        " - tasks           = %d\n",
134        x, y, lpid, (unsigned int)psched, tasks );
135#endif
136
137    // step 2 : each processor that is allocated at least one task loops
138    //          on all allocated tasks:
139    //          - contributes to _ptabs_vaddr[] & _ptabs_ptprs[] initialisation.
140    //          - set CTX_RA slot  with the kernel _ctx_eret() virtual address.
141    //          - set CTX_EPC slot that must contain the task entry point,
142    //            and contain only at this point the virtual address of the memory
143    //            location containing this entry point. We must switch the PTPR
144    //            to use the page table corresponding to the task.
145
146    unsigned int ltid;
147
148    for (ltid = 0; ltid < tasks; ltid++) 
149    {
150        unsigned int vsid = _get_task_slot( global_pid, ltid , CTX_VSID_ID ); 
151        unsigned int ptab = _get_task_slot( global_pid, ltid , CTX_PTAB_ID ); 
152        unsigned int ptpr = _get_task_slot( global_pid, ltid , CTX_PTPR_ID ); 
153
154        // initialize PTABS arrays
155        _ptabs_vaddr[vsid] = ptab;
156        _ptabs_ptprs[vsid] = ptpr;
157
158#if GIET_DEBUG_INIT
159_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] contributes to PTABS arrays\n"
160        " - ptabs_vaddr[%d] = %x / ptpr_paddr[%d] = %l\n",
161        x, y, lpid, 
162        vsid, ptab, vsid, ((unsigned long long)ptpr)<<13 );
163#endif
164
165        // set the ptpr to use the task page table
166        asm volatile( "mtc2    %0,   $0   \n"
167                      : : "r" (ptpr) );
168
169        // compute ctx_ra
170        unsigned int ctx_ra = (unsigned int)(&_ctx_eret);
171        _set_task_slot( global_pid, ltid, CTX_RA_ID, ctx_ra );
172
173        // compute ctx_epc
174        unsigned int* ptr = (unsigned int*)_get_task_slot( global_pid, ltid, CTX_EPC_ID );
175        _set_task_slot( global_pid, ltid, CTX_EPC_ID, *ptr );
176
177#if GIET_DEBUG_INIT
178_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] update context for task %d\n"
179        " - ctx_epc   = %x\n"
180        " - ctx_ra    = %x\n",
181        x, y, lpid, ltid,
182        _get_task_slot( global_pid, ltid, CTX_EPC_ID ),
183        _get_task_slot( global_pid, ltid, CTX_RA_ID ) );
184#endif
185
186    }  // end for tasks
187
188    // step 4 : compute and set ICU or XCU masks
189
190    unsigned int isr_switch_index = 0xFFFFFFFF;
191    unsigned int hwi_mask = 0;
192    unsigned int pti_mask = 0;
193    unsigned int wti_mask = 0;
194    unsigned int irq_id;            // IN_IRQ index
195    unsigned int entry;             // interrupt vector entry
196
197    for (irq_id = 0; irq_id < 32; irq_id++) 
198    {
199        entry = psched->hwi_vector[irq_id];
200        if ( entry & 0x80000000 ) hwi_mask = hwi_mask | (1<<irq_id);
201        if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
202
203        entry = psched->pti_vector[irq_id];
204        if ( entry & 0x80000000 ) pti_mask = pti_mask | (1<<irq_id);
205        if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
206
207        entry = psched->wti_vector[irq_id];
208        if ( entry & 0x80000000 ) wti_mask = wti_mask | (1<<irq_id);
209        if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
210    }
211
212#if GIET_DEBUG_INIT
213_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] set XCU masks\n"
214        " - ICU HWI_MASK = %x\n"
215        " - ICU WTI_MASK = %x\n"
216        " - ICU PTI_MASK = %x\n",
217        x, y, lpid, hwi_mask, wti_mask, pti_mask );
218#endif
219
220    unsigned int channel = lpid * IRQ_PER_PROCESSOR; 
221
222#if USE_XICU
223    _xcu_set_mask( cluster_xy, channel, hwi_mask, IRQ_TYPE_HWI ); 
224    _xcu_set_mask( cluster_xy, channel, wti_mask, IRQ_TYPE_WTI );
225    _xcu_set_mask( cluster_xy, channel, pti_mask, IRQ_TYPE_PTI );
226#else
227    _icu_set_mask( cluster_xy, channel, hwi_mask );   
228#endif
229
230    // step 5 : start TICK timer if at least one task
231    if (tasks > 0) 
232    {
233        // one ISR_TICK must be defined for each proc
234        if (isr_switch_index == 0xFFFFFFFF) 
235        {
236            _printf("\n[GIET ERROR] ISR_TICK not found for processor[%d,%d,%d]\n",
237                    x, y, lpid );
238            _exit();
239        }
240
241        // start system timer
242
243#if USE_XICU
244        _xcu_timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); 
245#else
246        _timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); 
247#endif
248
249    }
250
251#if GIET_DEBUG_INIT
252_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] start TICK timer\n",
253        x, y, lpid );
254#endif
255
256    // step 6 : each processor updates the idle_task context:
257    //          (only CTX_SP, CTX_RA, CTX_EPC).
258    //          The stack size is 512 bytes, reserved in seg_kdata.
259    //          The PTPR register, the CTX_PTPR and CTX_PTAB slots
260    //          have been initialised in boot code.
261
262    unsigned int p = ((x * Y_SIZE) + y) * NB_PROCS_MAX + lpid; 
263
264    unsigned int stack = (unsigned int)_idle_stack + ((p + 1)<<9);
265
266    _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_SP_ID,  stack);
267    _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_RA_ID,  (unsigned int) &_ctx_eret);
268    _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_EPC_ID, (unsigned int) &_idle_task);
269
270#if GIET_DEBUG_INIT
271_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initialize IDLE task\n",
272        x, y, lpid );
273#endif
274
275    // step 7 : when all processors reach the synchronisation barrier,
276    //          each processor set registers SP, SR, PTPR, EPC,
277    //          with the values corresponding to the first allocated task,
278    //          or to the idle_task if there is no task allocated,
279    //          and jump to user code
280
281    if (tasks == 0) 
282    {
283        ltid = IDLE_TASK_INDEX;
284
285        _printf("\n[GIET WARNING] No task allocated to processor[%d,%d,%d]\n",
286                x, y, lpid );
287    }
288    else
289    {
290        ltid = 0;
291    }
292
293    unsigned int sp_value   = _get_task_slot(global_pid, ltid, CTX_SP_ID);
294    unsigned int sr_value   = _get_task_slot(global_pid, ltid, CTX_SR_ID);
295    unsigned int ptpr_value = _get_task_slot(global_pid, ltid, CTX_PTPR_ID);
296    unsigned int epc_value  = _get_task_slot(global_pid, ltid, CTX_EPC_ID);
297
298#if GIET_DEBUG_INIT
299_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n"
300        " - sp   = %x\n"
301        " - sr   = %x\n"
302        " - ptpr = %x\n"
303        " - epc  = %x\n",
304        x, y, lpid, _get_proctime(),
305        sp_value, sr_value, ptpr_value, epc_value );
306#endif
307
308    unsigned int*  pcount = &_init_barrier;
309    unsigned int   nprocs = TOTAL_PROCS;
310    unsigned int   count;
311
312    // increment barrier counter with atomic LL/SC
313    asm volatile ( "_init_barrier_loop:             \n"
314                   "ll    %0,   0(%1)               \n"   /* count <= *pcount  */
315                   "addi  $3,   %0,   1             \n"   /* $3 <= count + 1  */
316                   "sc    $3,   0(%1)               \n"   /* *pcount <= $3  */
317                   "beqz  $3,   _init_barrier_loop  \n"   /* retry if failure */
318                   "nop                             \n" 
319                   : "=&r"(count)
320                   : "r"(pcount) 
321                   : "$3" );
322   
323    // busy waiting until all processors synchronized
324    while ( *pcount != nprocs ) asm volatile ("nop");
325
326    _printf("\n[GIET] Processor[%d,%d,%d] jumps to user code at cycle %d\n",
327            x, y, lpid, _get_proctime() );
328       
329    // set registers and jump to user code
330    asm volatile ( "move  $29,  %0                  \n"   /* SP <= ctx[CTX_SP_ID] */
331                   "mtc0  %1,   $12                 \n"   /* SR <= ctx[CTX_SR_ID] */
332                   "mtc2  %2,   $0                  \n"   /* PTPR <= ctx[CTX_PTPR] */
333                   "mtc0  %3,   $14                 \n"   /* EPC <= ctx[CTX_EPC]  */
334                   "eret                            \n"   /* jump to user code  */
335                   "nop                             \n"
336                   : 
337                   : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value)
338                   : "$29" );
339
340} // end kernel_parallel_init()
341
342
343// Local Variables:
344// tab-width: 4
345// c-basic-offset: 4
346// c-file-offsets:((innamespace . 0)(inline-open . 0))
347// indent-tabs-mode: nil
348// End:
349// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
350
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