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source: soft/giet_vm/giet_kernel/kernel_init.c @ 393

Last change on this file since 393 was 391, checked in by alain, 10 years ago
Idle task stack implementation. The idle stack was previously implemented in the seg_kernel data, and this was a scalabity bottleneck. i A 4 Kbytes stack for idle stack is now implemented in the processor scheduler segment.
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1	///////////////////////////////////////////////////////////////////////////////////
2	// File : kernel_init.c
3	// Date : 26/05/2012
4	// Authors : alain greiner & mohamed karaoui
5	// Copyright (c) UPMC-LIP6
6	////////////////////////////////////////////////////////////////////////////////////
7	// The kernel_init.c file is part of the GIET-VM nano-kernel.
8	//
9	// This nano-kernel has been written for the MIPS32 processor.
10	// The virtual adresses are on 32 bits and use the (unsigned int) type, but the
11	// physicals addresses can have up to 40 bits, and use the (unsigned long long) type.
12	// It natively supports clusterised shared mmemory multi-processors architectures,
13	// where each processor is identified by a composite index [x,y,lpid],
14	// and where there is one physical memory bank per cluster.
15	//
16	// The kernel_init() function is executed sequencially by all procesors.
17	// It completes the system initialisation that has been started by processor[0,0,0]
18	// in the boot_init() function. It makes the following assuptions, regarding the work
19	// bone by the boot code:
20	//
21	// 1) The page tables associated to the various vspaces have been build
22	// in physical memory, and can be used by the kernel code.
23	//
24	// 2) All schedulers (this include all task contexts) have been initialised,
25	// Both the virtual and the physical base addresses of the page tables
26	// are available in the CTX_PTAB and CTX_PTPR slots.
27	//
28	// 3) The CP0_SCHED register of each processor contains a pointer on its
29	// private scheduler (virtual address).
30	//
31	// 4) The CP2_PTPR register of each processor contains a pointer on
32	// the vspace_0 page table (physical address>>13).
33	//
34	// 5) For all processors, the MMU is activated (CP2_MODE contains 0xF).
35	//
36	// This code must be loaded in .kinit section, in order to control seg_kinit_base,
37	// as this address is used by the boot code to jump into kernel code.
38	//
39	// Each processor performs the following actions:
40	// 1/ contribute to _schedulers_paddr[] array initialisation.
41	// 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation
42	// 3/ completes task context initialisation for ech allocated task
43	// 4/ compute and set the ICU mask for its private ICU channel
44	// 5/ initialise its private TICK timer (if tasks > 0)
45	// 6/ initialise the "idle" task context in its private scheduler
46	// 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret.
47	////////////////////////////////////////////////////////////////////////////////////
48
49	#include <giet_config.h>
50
51	// kernel libraries
52	#include <utils.h>
53	#include <fat32.h>
54
55	//for peripheral initialisation
56	#include <dma_driver.h>
57	#include <fbf_driver.h>
58	#include <tty_driver.h>
59	#include <icu_driver.h>
60	#include <xcu_driver.h>
61	#include <ioc_driver.h>
62	#include <mmc_driver.h>
63	#include <mwr_driver.h>
64	#include <nic_driver.h>
65	#include <tim_driver.h>
66
67	#include <ctx_handler.h>
68	#include <irq_handler.h>
69
70	#include <mapping_info.h>
71	#include <mips32_registers.h>
72
73	#if !defined(X_SIZE)
74	# error: You must define X_SIZE in the hard_config.h file
75	#endif
76
77	#if !defined(Y_SIZE)
78	# error: You must define Y_SIZE in the hard_config.h file
79	#endif
80
81	#if !defined(Y_WIDTH)
82	# error: You must define Y_WIDTH in the hard_config.h file
83	#endif
84
85	#if !defined(Y_WIDTH)
86	# error: You must define Y_WIDTH in the hard_config.h file
87	#endif
88
89	#if !defined(NB_PROCS_MAX)
90	# error: You must define NB_PROCS_MAX in the hard_config.h file
91	#endif
92
93	#if !defined(NB_TOTAL_PROCS)
94	# error: You must define NB_TOTAL_PROCS in the hard_config.h file
95	#endif
96
97	#if !defined(USE_XCU)
98	# error: You must define USE_XCU in the hard_config.h file
99	#endif
100
101	#if !defined(IDLE_TASK_INDEX)
102	# error: You must define IDLE_TASK_INDEX in the ctx_handler.h file
103	#endif
104
105	#if !defined(IDLE_TASK_STACK)
106	# error: You must define IDLE_TASK_STACK in the ctx_handler.h file
107	#endif
108
109	#if !defined(GIET_TICK_VALUE)
110	# error: You must define GIET_TICK_VALUE in the giet_config.h file
111	#endif
112
113	#if !defined(GIET_NB_VSPACE_MAX)
114	# error: You must define GIET_NB_VSPACE_MAX in the giet_config.h file
115	#endif
116
117	///////////////////////////////////////////////////////////////////////////////////
118	// array of pointers on the page tables (virtual addresses)
119	///////////////////////////////////////////////////////////////////////////////////
120
121	__attribute__((section (".kdata")))
122	volatile unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX]; // virtual addresses
123
124	__attribute__((section (".kdata")))
125	volatile unsigned int _ptabs_ptprs[GIET_NB_VSPACE_MAX]; // physical addresses >> 13
126
127	///////////////////////////////////////////////////////////////////////////////////
128	// array of pointers on the schedulers (physical addresses)
129	///////////////////////////////////////////////////////////////////////////////////
130
131	__attribute__((section (".kdata")))
132	volatile static_scheduler_t* _schedulers[NB_PROCS_MAX<<(X_WIDTH+Y_WIDTH)];
133
134	////////////////////////////////////////////////////////////////////////////////////
135	// Synchonisation barrier before jumping to user code
136	////////////////////////////////////////////////////////////////////////////////////
137
138	__attribute__((section (".kdata")))
139	volatile unsigned int _init_barrier = 0;
140
141	///////////////////////////////////////////////////////////////////////////////////
142	__attribute__((section (".kinit"))) void kernel_init()
143	{
144	unsigned int global_pid = _get_procid();
145	unsigned int cluster_xy = global_pid / NB_PROCS_MAX;
146	unsigned int x = cluster_xy >> Y_WIDTH;
147	unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1);
148	unsigned int lpid = global_pid % NB_PROCS_MAX;
149	unsigned int pid = ((( x * Y_SIZE) + y) * NB_PROCS_MAX) + lpid;
150
151	// This last initialisation phase is done sequencially:
152	while( pid != _init_barrier ) asm volatile ( "nop" );
153
154	// Step 1 : each processor get its scheduler virtual address from CP0 register
155	// and contribute to initialise the _schedulers[] array
156
157	static_scheduler_t* psched = (static_scheduler_t*)_get_sched();
158	unsigned int tasks = psched->tasks;
159
160	_schedulers[global_pid] = psched;
161
162	#if GIET_DEBUG_INIT
163	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts kernel init\n"
164	" - scheduler vbase = %x\n"
165	" - tasks = %d\n",
166	x, y, lpid, (unsigned int)psched, tasks );
167	#endif
168
169	// step 2 : each processor that is allocated at least one task loops
170	// on all allocated tasks:
171	// - contributes to _ptabs_vaddr[] & _ptabs_ptprs[] initialisation.
172	// - set CTX_RA slot with the kernel _ctx_eret() virtual address.
173	// - set CTX_EPC slot that must contain the task entry point,
174	// and contain only at this point the virtual address of the memory
175	// location containing this entry point. We must switch the PTPR
176	// to use the page table corresponding to the task.
177
178	unsigned int ltid;
179
180	for (ltid = 0; ltid < tasks; ltid++)
181	{
182	unsigned int vsid = _get_task_slot( global_pid, ltid , CTX_VSID_ID );
183	unsigned int ptab = _get_task_slot( global_pid, ltid , CTX_PTAB_ID );
184	unsigned int ptpr = _get_task_slot( global_pid, ltid , CTX_PTPR_ID );
185
186	// initialize PTABS arrays
187	_ptabs_vaddr[vsid] = ptab;
188	_ptabs_ptprs[vsid] = ptpr;
189
190	#if GIET_DEBUG_INIT
191	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] contributes to PTABS arrays\n"
192	" - ptabs_vaddr[%d] = %x / ptpr_paddr[%d] = %l\n",
193	x, y, lpid,
194	vsid, ptab, vsid, ((unsigned long long)ptpr)<<13 );
195	#endif
196
197	// set the ptpr to use the task page table
198	asm volatile( "mtc2 %0, $0 \n"
199	: : "r" (ptpr) );
200
201	// compute ctx_ra
202	unsigned int ctx_ra = (unsigned int)(&_ctx_eret);
203	_set_task_slot( global_pid, ltid, CTX_RA_ID, ctx_ra );
204
205	// compute ctx_epc
206	unsigned int* ptr = (unsigned int*)_get_task_slot( global_pid, ltid, CTX_EPC_ID );
207	_set_task_slot( global_pid, ltid, CTX_EPC_ID, *ptr );
208
209	#if GIET_DEBUG_INIT
210	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] updates context for task %d\n"
211	" - ctx_epc = %x\n"
212	" - ctx_ra = %x\n",
213	x, y, lpid, ltid,
214	_get_task_slot( global_pid, ltid, CTX_EPC_ID ),
215	_get_task_slot( global_pid, ltid, CTX_RA_ID ) );
216	#endif
217
218	} // end for tasks
219
220	// step 4 : compute and set ICU or XCU masks
221
222	unsigned int isr_switch_index = 0xFFFFFFFF;
223	unsigned int hwi_mask = 0;
224	unsigned int pti_mask = 0;
225	unsigned int wti_mask = 0;
226	unsigned int irq_id; // IN_IRQ index
227	unsigned int entry; // interrupt vector entry
228
229	for (irq_id = 0; irq_id < 32; irq_id++)
230	{
231	entry = psched->hwi_vector[irq_id];
232	if ( entry & 0x80000000 ) hwi_mask = hwi_mask \| (1<<irq_id);
233	if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
234
235	entry = psched->pti_vector[irq_id];
236	if ( entry & 0x80000000 ) pti_mask = pti_mask \| (1<<irq_id);
237	if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
238
239	entry = psched->wti_vector[irq_id];
240	if ( entry & 0x80000000 ) wti_mask = wti_mask \| (1<<irq_id);
241	if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id;
242	}
243
244	#if GIET_DEBUG_INIT
245	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] sets XCU masks\n"
246	" - ICU HWI_MASK = %x\n"
247	" - ICU WTI_MASK = %x\n"
248	" - ICU PTI_MASK = %x\n",
249	x, y, lpid, hwi_mask, wti_mask, pti_mask );
250	#endif
251
252	unsigned int channel = lpid * IRQ_PER_PROCESSOR;
253
254	#if USE_XCU
255	_xcu_set_mask( cluster_xy, channel, hwi_mask, IRQ_TYPE_HWI );
256	_xcu_set_mask( cluster_xy, channel, wti_mask, IRQ_TYPE_WTI );
257	_xcu_set_mask( cluster_xy, channel, pti_mask, IRQ_TYPE_PTI );
258	#else
259	_icu_set_mask( cluster_xy, channel, hwi_mask );
260	#endif
261
262	// step 5 : start TICK timer if at least one task
263	if (tasks > 0)
264	{
265	// one ISR_TICK must be defined for each proc
266	if (isr_switch_index == 0xFFFFFFFF)
267	{
268	_printf("\n[GIET ERROR] ISR_TICK not found for processor[%d,%d,%d]\n",
269	x, y, lpid );
270	_exit();
271	}
272
273	// start system timer
274
275	#if USE_XCU
276	_xcu_timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE );
277	#else
278	_timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE );
279	#endif
280
281	}
282
283	#if GIET_DEBUG_INIT
284	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts TICK timer\n",
285	x, y, lpid );
286	#endif
287
288	// step 6 : each processor updates the idle_task context:
289	// (CTX_SP, CTX_RA, CTX_EPC).
290	// The 4 Kbytes idle stack is implemented in the scheduler.
291	// The PTPR register, the CTX_PTPR and CTX_PTAB slots
292	// have been initialised in boot code.
293
294	unsigned int pstack = ((unsigned int)psched) + 0x2000;
295
296	_set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_SP_ID, pstack);
297	_set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_RA_ID, (unsigned int) &_ctx_eret);
298	_set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_EPC_ID, (unsigned int) &_idle_task);
299
300	#if GIET_DEBUG_INIT
301	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes IDLE task\n"
302	" - stack_base = %x\n"
303	" - stack_size = 0x1000\n",
304	x, y, lpid, pstack - 0x1000 );
305	#endif
306
307	// step 7 : when all processors reach the synchronisation barrier,
308	// each processor set registers SP, SR, PTPR, EPC,
309	// with the values corresponding to the first allocated task,
310	// or to the idle_task if there is no task allocated,
311	// and jump to user code
312
313	if (tasks == 0)
314	{
315	ltid = IDLE_TASK_INDEX;
316
317	_printf("\n[GIET WARNING] No task allocated to processor[%d,%d,%d]\n",
318	x, y, lpid );
319	}
320	else
321	{
322	ltid = 0;
323	}
324
325	unsigned int sp_value = _get_task_slot(global_pid, ltid, CTX_SP_ID);
326	unsigned int sr_value = _get_task_slot(global_pid, ltid, CTX_SR_ID);
327	unsigned int ptpr_value = _get_task_slot(global_pid, ltid, CTX_PTPR_ID);
328	unsigned int epc_value = _get_task_slot(global_pid, ltid, CTX_EPC_ID);
329
330	#if GIET_DEBUG_INIT
331	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n",
332	x, y, lpid, _get_proctime() );
333	#endif
334
335	// increment barrier counter
336	_init_barrier++;
337
338	// busy waiting until all processors synchronized
339	while ( _init_barrier != NB_TOTAL_PROCS );
340
341	#if GIET_DEBUG_INIT
342	_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes registers at cycle %d\n"
343	" - sp = %x\n"
344	" - sr = %x\n"
345	" - ptpr = %x\n"
346	" - epc = %x\n",
347	x, y, lpid, _get_proctime(),
348	sp_value, sr_value, ptpr_value, epc_value );
349	#endif
350
351	// set registers and jump to user code
352	asm volatile ( "move $29, %0 \n" /* SP <= ctx[CTX_SP_ID] */
353	"mtc0 %1, $12 \n" /* SR <= ctx[CTX_SR_ID] */
354	"mtc2 %2, $0 \n" /* PTPR <= ctx[CTX_PTPR] */
355	"mtc0 %3, $14 \n" /* EPC <= ctx[CTX_EPC] */
356	"eret \n" /* jump to user code */
357	"nop \n"
358	:
359	: "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value)
360	: "$29", "memory" );
361
362	} // end kernel_init()
363
364
365	// Local Variables:
366	// tab-width: 4
367	// c-basic-offset: 4
368	// c-file-offsets:((innamespace . 0)(inline-open . 0))
369	// indent-tabs-mode: nil
370	// End:
371	// vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
372

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