| 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : kernel_init.c |
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| 3 | // Date : 26/05/2012 |
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| 4 | // Authors : alain greiner & mohamed karaoui |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | //////////////////////////////////////////////////////////////////////////////////// |
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| 7 | // The kernel_init.c file is part of the GIET-VM nano-kernel. |
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| 8 | // |
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| 9 | // This nano-kernel has been written for the MIPS32 processor. |
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| 10 | // The virtual adresses are on 32 bits and use the (unsigned int) type, but the |
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| 11 | // physicals addresses can have up to 40 bits, and use the (unsigned long long) type. |
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| 12 | // It natively supports clusterised shared mmemory multi-processors architectures, |
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| 13 | // where each processor is identified by a composite index (cluster_xy, local_id), |
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| 14 | // and where there is one physical memory bank per cluster. |
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| 15 | // |
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| 16 | // This file contains the _kernel_init() function, that performs the second |
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| 17 | // phase of system initialisation. The three significant actions are: |
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| 18 | // 1) processor 0 makes peripherals and system FAT initialisation. |
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| 19 | // 2) processor 0 awake all other processors by an IPI. |
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| 20 | // 3) all processors running in parallel perform register initialisation, |
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| 21 | // from their private scheduler, and jump to user code. |
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| 22 | //////////////////////////////////////////////////////////////////////////////////// |
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| 23 | |
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| 24 | #include <giet_config.h> |
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| 25 | |
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| 26 | // kernel libraries |
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| 27 | #include <utils.h> |
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| 28 | #include <fat32.h> |
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| 29 | |
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| 30 | //for peripheral initialisation |
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| 31 | #include <dma_driver.h> |
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| 32 | #include <fbf_driver.h> |
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| 33 | #include <tty_driver.h> |
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| 34 | #include <icu_driver.h> |
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| 35 | #include <xcu_driver.h> |
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| 36 | #include <ioc_driver.h> |
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| 37 | #include <mmc_driver.h> |
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| 38 | #include <mwr_driver.h> |
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| 39 | #include <nic_driver.h> |
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| 40 | #include <tim_driver.h> |
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| 41 | |
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| 42 | #include <ctx_handler.h> |
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| 43 | #include <irq_handler.h> |
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| 44 | |
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| 45 | #include <mapping_info.h> |
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| 46 | #include <mips32_registers.h> |
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| 47 | |
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| 48 | /////////////////////////////////////////////////////////////////////////////////// |
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| 49 | // array of pointers on the page tables (virtual addresses) |
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| 50 | /////////////////////////////////////////////////////////////////////////////////// |
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| 51 | |
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| 52 | __attribute__((section (".kdata"))) |
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| 53 | unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX]; // virtual addresses |
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| 54 | |
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| 55 | __attribute__((section (".kdata"))) |
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| 56 | unsigned int _ptabs_ptprs[GIET_NB_VSPACE_MAX]; // physical addresses >> 13 |
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| 57 | |
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| 58 | /////////////////////////////////////////////////////////////////////////////////// |
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| 59 | // array of pointers on the schedulers (physical addresses) |
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| 60 | /////////////////////////////////////////////////////////////////////////////////// |
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| 61 | |
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| 62 | __attribute__((section (".kdata"))) |
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| 63 | static_scheduler_t* _schedulers[NB_PROCS_MAX<<(X_WIDTH+Y_WIDTH)]; // virtual addresses |
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| 64 | |
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| 65 | //////////////////////////////////////////////////////////////////////////////////// |
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| 66 | // staks for the "idle" tasks (512 bytes for each processor) |
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| 67 | //////////////////////////////////////////////////////////////////////////////////// |
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| 68 | |
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| 69 | __attribute__((section (".kdata"))) |
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| 70 | unsigned int _idle_stack[X_SIZE * Y_SIZE * NB_PROCS_MAX * 128 ]; |
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| 71 | |
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| 72 | //////////////////////////////////////////////////////////////////////////////////// |
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| 73 | // Synchonisation Barrier before jumping to user code |
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| 74 | //////////////////////////////////////////////////////////////////////////////////// |
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| 75 | |
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| 76 | __attribute__((section (".kdata"))) |
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| 77 | unsigned int _init_barrier = 0; |
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| 78 | |
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| 79 | //////////////////////////////////////////////////////////////////////////////////// |
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| 80 | // This function is the entry point in kernel for all processors. |
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| 81 | // It is executed in parallel by all procesors, and completes the system |
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| 82 | // initialisation that has been started by processor 0 in the boot_init() function. |
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| 83 | // |
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| 84 | // This kernel code makes the following assuptions, regarding the work bone |
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| 85 | // by the boot code: |
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| 86 | // |
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| 87 | // 1) The page tables associated to the various vspaces have been build |
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| 88 | // in physical memory, and can be used by the kernel code. |
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| 89 | // |
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| 90 | // 2) All schedulers (this include all task contexts) have been initialised, |
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| 91 | // Both the virtual and the physical base addresses of the page tables |
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| 92 | // are available in the CTX_PTAB and CTX_PTPR slots. |
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| 93 | // |
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| 94 | // 3) The CP0_SCHED register of each processor contains a pointer on its |
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| 95 | // private scheduler (virtual address). |
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| 96 | // |
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| 97 | // 4) The CP2_PTPR register of each processor contains a pointer on |
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| 98 | // the vspace_0 page table (physical address>>13). |
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| 99 | // |
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| 100 | // 5) For all processors, the MMU is activated (CP2_MODE contains 0xF). |
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| 101 | // |
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| 102 | // This code must be loaded in .kinit section, in order to control seg_kinit_base, |
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| 103 | // as this address is used by the boot code to jump into kernel code. |
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| 104 | //////////////////////////////////////////////////////////////////////////////////// |
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| 105 | // Each processor performs the following actions: |
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| 106 | // 1/ contribute to _schedulers_paddr[] array initialisation. |
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| 107 | // 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation |
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| 108 | // 3/ completes task context initialisation for ech allocated task |
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| 109 | // 4/ compute and set the ICU mask for its private ICU channel |
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| 110 | // 5/ initialise its private TICK timer (if tasks > 0) |
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| 111 | // 6/ initialise the "idle" task context in its private scheduler |
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| 112 | // 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret. |
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| 113 | //////////////////////////////////////////////////////////////////////////////////// |
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| 114 | __attribute__((section (".kinit"))) void kernel_parallel_init() |
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| 115 | { |
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| 116 | unsigned int global_pid = _get_procid(); |
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| 117 | unsigned int cluster_xy = global_pid / NB_PROCS_MAX; |
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| 118 | unsigned int x = cluster_xy >> Y_WIDTH; |
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| 119 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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| 120 | unsigned int lpid = global_pid % NB_PROCS_MAX; |
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| 121 | |
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| 122 | // Step 1 : each processor get its scheduler virtual address |
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| 123 | // and contribute to initialise the _schedulers[] array |
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| 124 | |
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| 125 | static_scheduler_t* psched = (static_scheduler_t*)_get_sched(); |
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| 126 | unsigned int tasks = psched->tasks; |
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| 127 | |
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| 128 | _schedulers[global_pid] = psched; |
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| 129 | |
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| 130 | #if GIET_DEBUG_INIT |
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| 131 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d]\n" |
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| 132 | " - scheduler vbase = %x\n" |
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| 133 | " - tasks = %d\n", |
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| 134 | x, y, lpid, (unsigned int)psched, tasks ); |
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| 135 | #endif |
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| 136 | |
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| 137 | // step 2 : each processor that is allocated at least one task loops |
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| 138 | // on all allocated tasks: |
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| 139 | // - contributes to _ptabs_vaddr[] & _ptabs_ptprs[] initialisation. |
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| 140 | // - set CTX_RA slot with the kernel _ctx_eret() virtual address. |
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| 141 | // - set CTX_EPC slot that must contain the task entry point, |
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| 142 | // and contain only at this point the virtual address of the memory |
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| 143 | // location containing this entry point. We must switch the PTPR |
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| 144 | // to use the page table corresponding to the task. |
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| 145 | |
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| 146 | unsigned int ltid; |
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| 147 | |
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| 148 | for (ltid = 0; ltid < tasks; ltid++) |
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| 149 | { |
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| 150 | unsigned int vsid = _get_task_slot( global_pid, ltid , CTX_VSID_ID ); |
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| 151 | unsigned int ptab = _get_task_slot( global_pid, ltid , CTX_PTAB_ID ); |
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| 152 | unsigned int ptpr = _get_task_slot( global_pid, ltid , CTX_PTPR_ID ); |
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| 153 | |
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| 154 | // initialize PTABS arrays |
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| 155 | _ptabs_vaddr[vsid] = ptab; |
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| 156 | _ptabs_ptprs[vsid] = ptpr; |
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| 157 | |
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| 158 | #if GIET_DEBUG_INIT |
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| 159 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] contibutes to PTABS arrays\n" |
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| 160 | " - ptabs_vaddr[%d] = %x / ptpr_paddr[%d] = %l\n", |
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| 161 | x, y, lpid, |
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| 162 | vsid, ptab, vsid, ((unsigned long long)ptpr)<<13 ); |
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| 163 | #endif |
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| 164 | |
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| 165 | // set the ptpr to use the task page table |
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| 166 | asm volatile( "mtc2 %0, $0 \n" |
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| 167 | : : "r" (ptpr) ); |
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| 168 | |
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| 169 | // compute ctx_ra |
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| 170 | unsigned int ctx_ra = (unsigned int)(&_ctx_eret); |
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| 171 | _set_task_slot( global_pid, ltid, CTX_RA_ID, ctx_ra ); |
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| 172 | |
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| 173 | // compute ctx_epc |
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| 174 | unsigned int* ptr = (unsigned int*)_get_task_slot( global_pid, ltid, CTX_EPC_ID ); |
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| 175 | _set_task_slot( global_pid, ltid, CTX_EPC_ID, *ptr ); |
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| 176 | |
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| 177 | #if GIET_DEBUG_INIT |
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| 178 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] set scheduler for task %d\n" |
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| 179 | " - ctx_epc = %x\n" |
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| 180 | " - ctx_ra = %x\n", |
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| 181 | x, y, lpid, ltid, |
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| 182 | _get_task_slot( global_pid, ltid, CTX_EPC_ID ), |
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| 183 | _get_task_slot( global_pid, ltid, CTX_RA_ID ) ); |
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| 184 | #endif |
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| 185 | |
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| 186 | } // end for tasks |
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| 187 | |
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| 188 | // step 4 : compute and set ICU or XCU masks |
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| 189 | |
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| 190 | unsigned int isr_switch_index = 0xFFFFFFFF; |
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| 191 | unsigned int hwi_mask = 0; |
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| 192 | unsigned int pti_mask = 0; |
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| 193 | unsigned int wti_mask = 0; |
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| 194 | unsigned int irq_id; // IN_IRQ index |
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| 195 | unsigned int entry; // interrupt vector entry |
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| 196 | |
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| 197 | for (irq_id = 0; irq_id < 32; irq_id++) |
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| 198 | { |
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| 199 | entry = psched->hwi_vector[irq_id]; |
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| 200 | if ( entry & 0x80000000 ) hwi_mask = hwi_mask | (1<<irq_id); |
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| 201 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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| 202 | |
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| 203 | entry = psched->pti_vector[irq_id]; |
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| 204 | if ( entry & 0x80000000 ) pti_mask = pti_mask | (1<<irq_id); |
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| 205 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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| 206 | |
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| 207 | entry = psched->wti_vector[irq_id]; |
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| 208 | if ( entry & 0x80000000 ) wti_mask = wti_mask | (1<<irq_id); |
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| 209 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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| 210 | } |
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| 211 | |
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| 212 | #if GIET_DEBUG_INIT |
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| 213 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] set XCU masks\n" |
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| 214 | " - ICU HWI_MASK = %x\n" |
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| 215 | " - ICU WTI_MASK = %x\n" |
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| 216 | " - ICU PTI_MASK = %x\n", |
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| 217 | x, y, lpid, hwi_mask, wti_mask, pti_mask ); |
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| 218 | #endif |
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| 219 | |
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| 220 | unsigned int channel = lpid * IRQ_PER_PROCESSOR; |
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| 221 | |
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| 222 | #if USE_XICU |
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| 223 | _xcu_set_mask( cluster_xy, channel, hwi_mask, IRQ_TYPE_HWI ); |
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| 224 | _xcu_set_mask( cluster_xy, channel, wti_mask, IRQ_TYPE_WTI ); |
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| 225 | _xcu_set_mask( cluster_xy, channel, pti_mask, IRQ_TYPE_PTI ); |
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| 226 | #else |
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| 227 | _icu_set_mask( cluster_xy, channel, hwi_mask ); |
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| 228 | #endif |
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| 229 | |
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| 230 | // step 5 : start TICK timer if at least one task |
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| 231 | if (tasks > 0) |
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| 232 | { |
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| 233 | // one ISR_TICK must be defined for each proc |
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| 234 | if (isr_switch_index == 0xFFFFFFFF) |
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| 235 | { |
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| 236 | _printf("\n[GIET ERROR] ISR_TICK not found for processor[%d,%d,%d]\n", |
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| 237 | x, y, lpid ); |
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| 238 | _exit(); |
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| 239 | } |
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| 240 | |
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| 241 | // start system timer |
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| 242 | |
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| 243 | #if USE_XICU |
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| 244 | _xcu_timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); |
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| 245 | #else |
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| 246 | _timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); |
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| 247 | #endif |
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| 248 | |
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| 249 | } |
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| 250 | |
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| 251 | #if GIET_DEBUG_INIT |
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| 252 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] start TICK timer\n", |
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| 253 | x, y, lpid ); |
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| 254 | #endif |
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| 255 | |
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| 256 | // step 6 : each processor updates the idle_task context: |
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| 257 | // (only CTX_SP, CTX_RA, CTX_EPC). |
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| 258 | // The stack size is 512 bytes, reserved in seg_kdata. |
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| 259 | // The PTPR register, the CTX_PTPR and CTX_PTAB slots |
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| 260 | // have been initialised in boot code. |
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| 261 | |
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| 262 | unsigned int p = ((x * Y_SIZE) + y) * NB_PROCS_MAX + lpid; |
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| 263 | |
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| 264 | unsigned int stack = (unsigned int)_idle_stack + ((p + 1)<<9); |
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| 265 | |
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| 266 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_SP_ID, stack); |
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| 267 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_RA_ID, (unsigned int) &_ctx_eret); |
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| 268 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_EPC_ID, (unsigned int) &_idle_task); |
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| 269 | |
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| 270 | #if GIET_DEBUG_INIT |
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| 271 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initialize IDLE task\n", |
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| 272 | x, y, lpid ); |
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| 273 | #endif |
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| 274 | |
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| 275 | // step 7 : when all processors reach the synchronisation barrier, |
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| 276 | // each processor set registers SP, SR, PTPR, EPC, |
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| 277 | // with the values corresponding to the first allocated task, |
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| 278 | // or to the idle_task if there is no task allocated, |
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| 279 | // and jump to user code |
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| 280 | |
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| 281 | if (tasks == 0) |
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| 282 | { |
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| 283 | ltid = IDLE_TASK_INDEX; |
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| 284 | |
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| 285 | _printf("\n[GIET WARNING] No task allocated to processor[%d,%d,%d]\n", |
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| 286 | x, y, lpid ); |
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| 287 | } |
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| 288 | else |
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| 289 | { |
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| 290 | ltid = 0; |
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| 291 | } |
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| 292 | |
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| 293 | unsigned int sp_value = _get_task_slot(global_pid, ltid, CTX_SP_ID); |
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| 294 | unsigned int sr_value = _get_task_slot(global_pid, ltid, CTX_SR_ID); |
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| 295 | unsigned int ptpr_value = _get_task_slot(global_pid, ltid, CTX_PTPR_ID); |
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| 296 | unsigned int epc_value = _get_task_slot(global_pid, ltid, CTX_EPC_ID); |
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| 297 | |
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| 298 | #if GIET_DEBUG_INIT |
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| 299 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n" |
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| 300 | " - sp = %x\n" |
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| 301 | " - sr = %x\n" |
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| 302 | " - ptpr = %x\n" |
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| 303 | " - epc = %x\n", |
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| 304 | x, y, lpid, _get_proctime(), |
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| 305 | sp_value, sr_value, ptpr_value, epc_value ); |
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| 306 | #endif |
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| 307 | |
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| 308 | unsigned int* pcount = &_init_barrier; |
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| 309 | unsigned int nprocs = X_SIZE*(Y_SIZE-1)*NB_PROCS_MAX; |
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| 310 | unsigned int count; |
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| 311 | |
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| 312 | // increment barrier counter with atomic LL/SC |
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| 313 | asm volatile ( "_init_barrier_loop: \n" |
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| 314 | "ll %0, 0(%1) \n" /* count <= *pcount */ |
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| 315 | "addi $3, %0, 1 \n" /* $3 <= count + 1 */ |
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| 316 | "sc $3, 0(%1) \n" /* *pcount <= $3 */ |
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| 317 | "beqz $3, _init_barrier_loop \n" /* retry if failure */ |
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| 318 | "nop \n" |
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| 319 | : "=&r"(count) |
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| 320 | : "r"(pcount) |
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| 321 | : "$3" ); |
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| 322 | |
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| 323 | // busy waiting until all processors synchronized |
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| 324 | while ( *pcount != nprocs ) asm volatile ("nop"); |
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| 325 | |
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| 326 | _printf("\n[GIET] Processor[%d,%d,%d] jumps to user code at cycle %d\n", |
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| 327 | x, y, lpid, _get_proctime() ); |
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| 328 | |
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| 329 | // set registers and jump to user code |
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| 330 | asm volatile ( "move $29, %0 \n" /* SP <= ctx[CTX_SP_ID] */ |
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| 331 | "mtc0 %1, $12 \n" /* SR <= ctx[CTX_SR_ID] */ |
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| 332 | "mtc2 %2, $0 \n" /* PTPR <= ctx[CTX_PTPR] */ |
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| 333 | "mtc0 %3, $14 \n" /* EPC <= ctx[CTX_EPC] */ |
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| 334 | "eret \n" /* jump to user code */ |
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| 335 | "nop \n" |
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| 336 | : |
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| 337 | : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value) |
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| 338 | : "$29" ); |
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| 339 | |
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| 340 | } // end kernel_parallel_init() |
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| 341 | |
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| 342 | |
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| 343 | // Local Variables: |
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| 344 | // tab-width: 4 |
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| 345 | // c-basic-offset: 4 |
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| 346 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 347 | // indent-tabs-mode: nil |
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| 348 | // End: |
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| 349 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 350 | |
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