1 | /////////////////////////////////////////////////////////////////////////////////// |
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2 | // File : kernel_init.c |
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3 | // Date : 26/05/2012 |
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4 | // Authors : alain greiner & mohamed karaoui |
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5 | // Copyright (c) UPMC-LIP6 |
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6 | //////////////////////////////////////////////////////////////////////////////////// |
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7 | // The kernel_init.c file is part of the GIET-VM nano-kernel. |
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8 | // |
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9 | // This nano-kernel has been written for the MIPS32 processor. |
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10 | // The virtual adresses are on 32 bits and use the (unsigned int) type, but the |
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11 | // physicals addresses can have up to 40 bits, and use the (unsigned long long) type. |
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12 | // It natively supports clusterised shared mmemory multi-processors architectures, |
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13 | // where each processor is identified by a composite index [x,y,lpid], |
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14 | // and where there is one physical memory bank per cluster. |
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15 | // |
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16 | // The kernel_init() function is executed in parallel by all procesors, |
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17 | // and completes the system initialisation that has been started by processor[0,0,0] |
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18 | // in the boot_init() function. It makes the following assuptions, regarding the work |
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19 | // bone by the boot code: |
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20 | // |
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21 | // 1) The page tables associated to the various vspaces have been build |
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22 | // in physical memory, and can be used by the kernel code. |
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23 | // |
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24 | // 2) All schedulers (this include all task contexts) have been initialised, |
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25 | // Both the virtual and the physical base addresses of the page tables |
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26 | // are available in the CTX_PTAB and CTX_PTPR slots. |
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27 | // |
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28 | // 3) The CP0_SCHED register of each processor contains a pointer on its |
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29 | // private scheduler (virtual address). |
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30 | // |
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31 | // 4) The CP2_PTPR register of each processor contains a pointer on |
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32 | // the vspace_0 page table (physical address>>13). |
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33 | // |
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34 | // 5) For all processors, the MMU is activated (CP2_MODE contains 0xF). |
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35 | // |
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36 | // This code must be loaded in .kinit section, in order to control seg_kinit_base, |
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37 | // as this address is used by the boot code to jump into kernel code. |
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38 | // |
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39 | // Each processor performs the following actions: |
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40 | // 1/ contribute to _schedulers_paddr[] array initialisation. |
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41 | // 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation |
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42 | // 3/ completes task context initialisation for ech allocated task |
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43 | // 4/ compute and set the ICU mask for its private ICU channel |
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44 | // 5/ initialise its private TICK timer (if tasks > 0) |
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45 | // 6/ initialise the "idle" task context in its private scheduler |
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46 | // 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret. |
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47 | //////////////////////////////////////////////////////////////////////////////////// |
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48 | |
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49 | #include <giet_config.h> |
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50 | |
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51 | // kernel libraries |
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52 | #include <utils.h> |
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53 | #include <fat32.h> |
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54 | |
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55 | //for peripheral initialisation |
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56 | #include <dma_driver.h> |
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57 | #include <fbf_driver.h> |
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58 | #include <tty_driver.h> |
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59 | #include <icu_driver.h> |
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60 | #include <xcu_driver.h> |
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61 | #include <ioc_driver.h> |
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62 | #include <mmc_driver.h> |
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63 | #include <mwr_driver.h> |
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64 | #include <nic_driver.h> |
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65 | #include <tim_driver.h> |
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66 | |
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67 | #include <ctx_handler.h> |
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68 | #include <irq_handler.h> |
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69 | |
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70 | #include <mapping_info.h> |
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71 | #include <mips32_registers.h> |
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72 | |
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73 | #if !defined(X_SIZE) |
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74 | # error: You must define X_SIZE in the hard_config.h file |
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75 | #endif |
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76 | |
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77 | #if !defined(Y_SIZE) |
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78 | # error: You must define Y_SIZE in the hard_config.h file |
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79 | #endif |
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80 | |
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81 | #if !defined(Y_WIDTH) |
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82 | # error: You must define Y_WIDTH in the hard_config.h file |
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83 | #endif |
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84 | |
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85 | #if !defined(Y_WIDTH) |
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86 | # error: You must define Y_WIDTH in the hard_config.h file |
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87 | #endif |
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88 | |
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89 | #if !defined(NB_PROCS_MAX) |
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90 | # error: You must define NB_PROCS_MAX in the hard_config.h file |
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91 | #endif |
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92 | |
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93 | #if !defined(NB_TOTAL_PROCS) |
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94 | # error: You must define NB_TOTAL_PROCS in the hard_config.h file |
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95 | #endif |
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96 | |
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97 | #if !defined(USE_XCU) |
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98 | # error: You must define USE_XCU in the hard_config.h file |
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99 | #endif |
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100 | |
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101 | #if !defined(IDLE_TASK_INDEX) |
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102 | # error: You must define IDLE_TASK_INDEX in the giet_config.h file |
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103 | #endif |
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104 | |
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105 | #if !defined(GIET_TICK_VALUE) |
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106 | # error: You must define GIET_TICK_VALUE in the giet_config.h file |
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107 | #endif |
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108 | |
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109 | #if !defined(GIET_NB_VSPACE_MAX) |
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110 | # error: You must define GIET_NB_VSPACE_MAX in the giet_config.h file |
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111 | #endif |
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112 | |
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113 | /////////////////////////////////////////////////////////////////////////////////// |
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114 | // array of pointers on the page tables (virtual addresses) |
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115 | /////////////////////////////////////////////////////////////////////////////////// |
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116 | |
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117 | __attribute__((section (".kdata"))) |
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118 | volatile unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX]; // virtual addresses |
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119 | |
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120 | __attribute__((section (".kdata"))) |
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121 | volatile unsigned int _ptabs_ptprs[GIET_NB_VSPACE_MAX]; // physical addresses >> 13 |
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122 | |
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123 | /////////////////////////////////////////////////////////////////////////////////// |
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124 | // array of pointers on the schedulers (physical addresses) |
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125 | /////////////////////////////////////////////////////////////////////////////////// |
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126 | |
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127 | __attribute__((section (".kdata"))) |
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128 | volatile static_scheduler_t* _schedulers[NB_PROCS_MAX<<(X_WIDTH+Y_WIDTH)]; |
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129 | |
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130 | //////////////////////////////////////////////////////////////////////////////////// |
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131 | // staks for the "idle" tasks (512 bytes for each processor) |
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132 | //////////////////////////////////////////////////////////////////////////////////// |
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133 | |
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134 | __attribute__((section (".kdata"))) |
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135 | volatile unsigned int _idle_stack[X_SIZE * Y_SIZE * NB_PROCS_MAX * 16 ]; |
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136 | |
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137 | //////////////////////////////////////////////////////////////////////////////////// |
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138 | // Synchonisation Barrier before jumping to user code |
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139 | //////////////////////////////////////////////////////////////////////////////////// |
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140 | |
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141 | __attribute__((section (".kdata"))) |
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142 | volatile unsigned int _init_barrier = 0; |
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143 | |
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144 | /////////////////////////////////////////////////////////////////////////////////// |
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145 | __attribute__((section (".kinit"))) void kernel_init() |
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146 | { |
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147 | unsigned int global_pid = _get_procid(); |
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148 | unsigned int cluster_xy = global_pid / NB_PROCS_MAX; |
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149 | unsigned int x = cluster_xy >> Y_WIDTH; |
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150 | unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); |
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151 | unsigned int lpid = global_pid % NB_PROCS_MAX; |
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152 | unsigned int pid = ((( x * Y_SIZE) + y) * NB_PROCS_MAX) + lpid; |
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153 | |
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154 | // This last initialisation phase is done sequencially: |
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155 | while( pid != _init_barrier ) asm volatile ( "nop" ); |
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156 | |
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157 | // Step 1 : each processor get its scheduler virtual address |
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158 | // and contribute to initialise the _schedulers[] array |
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159 | |
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160 | static_scheduler_t* psched = (static_scheduler_t*)_get_sched(); |
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161 | unsigned int tasks = psched->tasks; |
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162 | |
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163 | _schedulers[global_pid] = psched; |
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164 | |
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165 | #if GIET_DEBUG_INIT |
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166 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts kernel init\n" |
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167 | " - scheduler vbase = %x\n" |
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168 | " - tasks = %d\n", |
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169 | x, y, lpid, (unsigned int)psched, tasks ); |
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170 | #endif |
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171 | |
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172 | // step 2 : each processor that is allocated at least one task loops |
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173 | // on all allocated tasks: |
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174 | // - contributes to _ptabs_vaddr[] & _ptabs_ptprs[] initialisation. |
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175 | // - set CTX_RA slot with the kernel _ctx_eret() virtual address. |
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176 | // - set CTX_EPC slot that must contain the task entry point, |
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177 | // and contain only at this point the virtual address of the memory |
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178 | // location containing this entry point. We must switch the PTPR |
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179 | // to use the page table corresponding to the task. |
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180 | |
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181 | unsigned int ltid; |
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182 | |
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183 | for (ltid = 0; ltid < tasks; ltid++) |
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184 | { |
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185 | unsigned int vsid = _get_task_slot( global_pid, ltid , CTX_VSID_ID ); |
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186 | unsigned int ptab = _get_task_slot( global_pid, ltid , CTX_PTAB_ID ); |
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187 | unsigned int ptpr = _get_task_slot( global_pid, ltid , CTX_PTPR_ID ); |
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188 | |
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189 | // initialize PTABS arrays |
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190 | _ptabs_vaddr[vsid] = ptab; |
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191 | _ptabs_ptprs[vsid] = ptpr; |
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192 | |
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193 | #if GIET_DEBUG_INIT |
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194 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] contributes to PTABS arrays\n" |
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195 | " - ptabs_vaddr[%d] = %x / ptpr_paddr[%d] = %l\n", |
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196 | x, y, lpid, |
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197 | vsid, ptab, vsid, ((unsigned long long)ptpr)<<13 ); |
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198 | #endif |
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199 | |
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200 | // set the ptpr to use the task page table |
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201 | asm volatile( "mtc2 %0, $0 \n" |
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202 | : : "r" (ptpr) ); |
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203 | |
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204 | // compute ctx_ra |
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205 | unsigned int ctx_ra = (unsigned int)(&_ctx_eret); |
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206 | _set_task_slot( global_pid, ltid, CTX_RA_ID, ctx_ra ); |
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207 | |
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208 | // compute ctx_epc |
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209 | unsigned int* ptr = (unsigned int*)_get_task_slot( global_pid, ltid, CTX_EPC_ID ); |
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210 | _set_task_slot( global_pid, ltid, CTX_EPC_ID, *ptr ); |
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211 | |
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212 | #if GIET_DEBUG_INIT |
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213 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] updates context for task %d\n" |
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214 | " - ctx_epc = %x\n" |
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215 | " - ctx_ra = %x\n", |
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216 | x, y, lpid, ltid, |
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217 | _get_task_slot( global_pid, ltid, CTX_EPC_ID ), |
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218 | _get_task_slot( global_pid, ltid, CTX_RA_ID ) ); |
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219 | #endif |
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220 | |
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221 | } // end for tasks |
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222 | |
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223 | // step 4 : compute and set ICU or XCU masks |
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224 | |
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225 | unsigned int isr_switch_index = 0xFFFFFFFF; |
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226 | unsigned int hwi_mask = 0; |
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227 | unsigned int pti_mask = 0; |
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228 | unsigned int wti_mask = 0; |
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229 | unsigned int irq_id; // IN_IRQ index |
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230 | unsigned int entry; // interrupt vector entry |
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231 | |
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232 | for (irq_id = 0; irq_id < 32; irq_id++) |
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233 | { |
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234 | entry = psched->hwi_vector[irq_id]; |
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235 | if ( entry & 0x80000000 ) hwi_mask = hwi_mask | (1<<irq_id); |
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236 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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237 | |
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238 | entry = psched->pti_vector[irq_id]; |
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239 | if ( entry & 0x80000000 ) pti_mask = pti_mask | (1<<irq_id); |
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240 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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241 | |
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242 | entry = psched->wti_vector[irq_id]; |
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243 | if ( entry & 0x80000000 ) wti_mask = wti_mask | (1<<irq_id); |
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244 | if ( (entry & 0x0000FFFF) == ISR_TICK ) isr_switch_index = irq_id; |
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245 | } |
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246 | |
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247 | #if GIET_DEBUG_INIT |
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248 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] sets XCU masks\n" |
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249 | " - ICU HWI_MASK = %x\n" |
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250 | " - ICU WTI_MASK = %x\n" |
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251 | " - ICU PTI_MASK = %x\n", |
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252 | x, y, lpid, hwi_mask, wti_mask, pti_mask ); |
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253 | #endif |
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254 | |
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255 | unsigned int channel = lpid * IRQ_PER_PROCESSOR; |
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256 | |
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257 | #if USE_XCU |
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258 | _xcu_set_mask( cluster_xy, channel, hwi_mask, IRQ_TYPE_HWI ); |
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259 | _xcu_set_mask( cluster_xy, channel, wti_mask, IRQ_TYPE_WTI ); |
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260 | _xcu_set_mask( cluster_xy, channel, pti_mask, IRQ_TYPE_PTI ); |
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261 | #else |
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262 | _icu_set_mask( cluster_xy, channel, hwi_mask ); |
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263 | #endif |
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264 | |
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265 | // step 5 : start TICK timer if at least one task |
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266 | if (tasks > 0) |
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267 | { |
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268 | // one ISR_TICK must be defined for each proc |
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269 | if (isr_switch_index == 0xFFFFFFFF) |
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270 | { |
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271 | _printf("\n[GIET ERROR] ISR_TICK not found for processor[%d,%d,%d]\n", |
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272 | x, y, lpid ); |
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273 | _exit(); |
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274 | } |
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275 | |
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276 | // start system timer |
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277 | |
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278 | #if USE_XCU |
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279 | _xcu_timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); |
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280 | #else |
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281 | _timer_start( cluster_xy, isr_switch_index, GIET_TICK_VALUE ); |
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282 | #endif |
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283 | |
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284 | } |
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285 | |
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286 | #if GIET_DEBUG_INIT |
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287 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts TICK timer\n", |
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288 | x, y, lpid ); |
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289 | #endif |
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290 | |
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291 | // step 6 : each processor updates the idle_task context: |
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292 | // (only CTX_SP, CTX_RA, CTX_EPC). |
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293 | // The stack size is 512 bytes, reserved in seg_kdata. |
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294 | // The PTPR register, the CTX_PTPR and CTX_PTAB slots |
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295 | // have been initialised in boot code. |
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296 | |
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297 | unsigned int p = ((x * Y_SIZE) + y) * NB_PROCS_MAX + lpid; |
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298 | |
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299 | unsigned int stack = (unsigned int)_idle_stack + ((p + 1)<<9); |
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300 | |
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301 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_SP_ID, stack); |
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302 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_RA_ID, (unsigned int) &_ctx_eret); |
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303 | _set_task_slot( global_pid, IDLE_TASK_INDEX, CTX_EPC_ID, (unsigned int) &_idle_task); |
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304 | |
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305 | #if GIET_DEBUG_INIT |
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306 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes IDLE task\n", |
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307 | x, y, lpid ); |
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308 | #endif |
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309 | |
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310 | // step 7 : when all processors reach the synchronisation barrier, |
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311 | // each processor set registers SP, SR, PTPR, EPC, |
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312 | // with the values corresponding to the first allocated task, |
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313 | // or to the idle_task if there is no task allocated, |
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314 | // and jump to user code |
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315 | |
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316 | if (tasks == 0) |
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317 | { |
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318 | ltid = IDLE_TASK_INDEX; |
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319 | |
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320 | _printf("\n[GIET WARNING] No task allocated to processor[%d,%d,%d]\n", |
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321 | x, y, lpid ); |
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322 | } |
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323 | else |
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324 | { |
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325 | ltid = 0; |
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326 | } |
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327 | |
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328 | unsigned int sp_value = _get_task_slot(global_pid, ltid, CTX_SP_ID); |
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329 | unsigned int sr_value = _get_task_slot(global_pid, ltid, CTX_SR_ID); |
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330 | unsigned int ptpr_value = _get_task_slot(global_pid, ltid, CTX_PTPR_ID); |
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331 | unsigned int epc_value = _get_task_slot(global_pid, ltid, CTX_EPC_ID); |
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332 | |
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333 | #if GIET_DEBUG_INIT |
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334 | _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n", |
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335 | x, y, lpid, _get_proctime() ); |
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336 | #endif |
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337 | |
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338 | // increment barrier counter |
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339 | _init_barrier++; |
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340 | |
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341 | // busy waiting until all processors synchronized |
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342 | while ( _init_barrier != NB_TOTAL_PROCS ); |
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343 | |
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344 | // set registers and jump to user code |
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345 | asm volatile ( "move $29, %0 \n" /* SP <= ctx[CTX_SP_ID] */ |
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346 | "mtc0 %1, $12 \n" /* SR <= ctx[CTX_SR_ID] */ |
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347 | "mtc2 %2, $0 \n" /* PTPR <= ctx[CTX_PTPR] */ |
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348 | "mtc0 %3, $14 \n" /* EPC <= ctx[CTX_EPC] */ |
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349 | "eret \n" /* jump to user code */ |
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350 | "nop \n" |
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351 | : |
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352 | : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value) |
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353 | : "$29", "memory" ); |
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354 | |
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355 | } // end kernel_init() |
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356 | |
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357 | |
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358 | // Local Variables: |
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359 | // tab-width: 4 |
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360 | // c-basic-offset: 4 |
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361 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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362 | // indent-tabs-mode: nil |
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363 | // End: |
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364 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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365 | |
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