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source: soft/giet_vm/giet_python/mapping.py @ 532

Last change on this file since 532 was 532, checked in by alain, 10 years ago
Introduce support for ISR_HBA (VciMultiAhci?).
Property svn:executable set to ``*
File size: 99.9 KB

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1	#!/usr/bin/env python
2
3	import sys
4
5	########################################################################################
6	# file : giet_mapping.py
7	# date : april 2014
8	# author : Alain Greiner
9	########################################################################################
10	# This file contains the classes required to define a mapping for the GIET_VM.
11	# - A 'Mapping' contains a set of 'Cluster' (hardware architecture)
12	# a set of 'Vseg' (kernel glogals virtual segments)
13	# a set of 'Vspace' (one or several user applications)
14	# - A 'Cluster' contains a set of 'Pseg' (physical segments in cluster)
15	# a set of 'Proc' (processors in cluster)
16	# a set of 'Periph' (peripherals in cluster)
17	# - A 'Vspace' contains a set of 'Vseg' (user virtual segments)
18	# a set of 'Task' (user parallel tasks)
19	# - A 'Periph' contains a set of 'Irq' (only for XCU and PIC types )
20	########################################################################################
21	# Implementation Note
22	# The objects used to describe a mapping are distributed in the PYTHON structure:
23	# For example the psegs set is split in several subsets (one subset per cluster),
24	# or the tasks set is split in several subsets (one subset per vspace), etc...
25	# In the C binary data structure used by the giet_vm, all objects of same type
26	# are stored in a linear array (one single array for all psegs for example).
27	# For all objects, we compute and store in the PYTHON object itself a "global index"
28	# corresponding to the index in this global array, and this index can be used as
29	# a pseudo-pointer to identify a specific object of a given type.
30	########################################################################################
31
32	########################################################################################
33	# Various constants
34	########################################################################################
35
36	PADDR_WIDTH = 40 # number of bits for physical address
37	X_WIDTH = 4 # number of bits encoding x coordinate
38	Y_WIDTH = 4 # number of bits encoding y coordinate
39	P_WIDTH = 4 # number of bits encoding local proc_id
40	VPN_ANTI_MASK = 0x00000FFF # mask virtual address to get offset in a small page
41	BPN_MASK = 0xFFE00000 # mask virtual address to get the BPN (big page)
42	PERI_INCREMENT = 0x10000 # virtual address increment for replicated l vsegs
43	RESET_ADDRESS = 0xBFC00000 # Processor wired boot_address
44	MAPPING_SIGNATURE = 0xDACE2014 # Magic number indicating a valid C binary struture
45
46	########################################################################################
47	# These lists must be consistent with values defined in
48	# mapping_info.h / xml_driver.c /xml_parser.c
49	########################################################################################
50	PERIPHTYPES = [
51	'CMA',
52	'DMA',
53	'FBF',
54	'IOB',
55	'IOC',
56	'MMC',
57	'MWR',
58	'NIC',
59	'ROM',
60	'SIM',
61	'TIM',
62	'TTY',
63	'XCU',
64	'PIC',
65	'DROM',
66	]
67
68	IOCSUBTYPES = [
69	'BDV',
70	'HBA',
71	'SPI',
72	'NONE',
73	]
74
75	MWRSUBTYPES = [
76	'GCD',
77	'DCT',
78	]
79
80	######################################################################################
81	# These lists must be consistent with values defined in
82	# irq_handler.c / irq_handler.h / xml_driver.c / xml_parser.c
83	######################################################################################
84	IRQTYPES = [
85	'HWI',
86	'WTI',
87	'PTI',
88	]
89
90	ISRTYPES = [
91	'ISR_DEFAULT',
92	'ISR_TICK',
93	'ISR_TTY_RX',
94	'ISR_TTY_TX',
95	'ISR_BDV',
96	'ISR_TIMER',
97	'ISR_WAKUP',
98	'ISR_NIC_RX',
99	'ISR_NIC_TX',
100	'ISR_CMA',
101	'ISR_MMC',
102	'ISR_DMA',
103	'ISR_SPI',
104	'ISR_MWR',
105	'ISR_HBA',
106	]
107
108	VSEGTYPES = [
109	'ELF',
110	'BLOB',
111	'PTAB',
112	'PERI',
113	'MWMR', # deprecated
114	'LOCK', # deprecated
115	'BUFFER',
116	'BARRIER', # deprecated
117	'CONST', # deprecated
118	'MEMSPACE', # deprecated
119	'SCHED',
120	'HEAP',
121	]
122
123	VSEGMODES = [
124	'____',
125	'___U',
126	'__W_',
127	'__WU',
128	'_X__',
129	'_X_U',
130	'_XW_',
131	'_XWU',
132	'C___',
133	'C__U',
134	'C_W_',
135	'C_WU',
136	'CX__',
137	'CX_U',
138	'CXW_',
139	'CXWU',
140	]
141
142	PSEGTYPES = [
143	'RAM',
144	'PERI',
145	]
146
147	#######################################################################################
148	class Mapping( object ):
149	#######################################################################################
150	def __init__( self,
151	name, # mapping name
152	x_size, # number of clusters in a row
153	y_size, # number of clusters in a column
154	nprocs, # max number of processors per cluster
155	x_width = X_WIDTH, # number of bits encoding x coordinate
156	y_width = Y_WIDTH, # number of bits encoding y coordinate
157	p_width = P_WIDTH, # number of bits encoding lpid
158	paddr_width = PADDR_WIDTH, # number of bits for physical address
159	coherence = 1, # hardware cache coherence if non-zero
160	irq_per_proc = 1, # number or IRQs from XCU to processor
161	use_ramdisk = False, # use ramdisk when true
162	x_io = 0, # cluster_io x coordinate
163	y_io = 0, # cluster_io y coordinate
164	peri_increment = PERI_INCREMENT, # address increment for globals
165	reset_address = RESET_ADDRESS, # Processor wired boot_address
166	ram_base = 0, # RAM physical base in cluster[0,0]
167	ram_size = 0 ): # RAM size in each cluster (bytes)
168
169	assert ( x_size <= (1<<X_WIDTH) )
170	assert ( y_size <= (1<<Y_WIDTH) )
171	assert ( nprocs <= (1<<P_WIDTH) )
172
173	self.signature = MAPPING_SIGNATURE
174	self.name = name
175	self.name = name
176	self.paddr_width = paddr_width
177	self.coherence = coherence
178	self.x_size = x_size
179	self.y_size = y_size
180	self.nprocs = nprocs
181	self.x_width = x_width
182	self.y_width = y_width
183	self.p_width = p_width
184	self.irq_per_proc = irq_per_proc
185	self.use_ramdisk = use_ramdisk
186	self.x_io = x_io
187	self.y_io = y_io
188	self.peri_increment = peri_increment
189	self.reset_address = reset_address
190	self.ram_base = ram_base
191	self.ram_size = ram_size
192
193	self.total_vspaces = 0
194	self.total_globals = 0
195	self.total_psegs = 0
196	self.total_vsegs = 0
197	self.total_tasks = 0
198	self.total_procs = 0
199	self.total_irqs = 0
200	self.total_periphs = 0
201
202	self.clusters = []
203	self.globs = []
204	self.vspaces = []
205
206	for x in xrange( self.x_size ):
207	for y in xrange( self.y_size ):
208	cluster = Cluster( x , y )
209	cluster.index = (x * self.y_size) + y
210	self.clusters.append( cluster )
211
212	return
213
214	########################## add a ram pseg in a cluster
215	def addRam( self,
216	name, # pseg name
217	base, # pseg base address
218	size ): # pseg length (bytes)
219
220	# computes cluster index and coordinates from the base address
221	paddr_lsb_width = self.paddr_width - self.x_width - self.y_width
222	cluster_xy = base >> paddr_lsb_width
223	x = cluster_xy >> (self.y_width);
224	y = cluster_xy & ((1 << self.y_width) - 1)
225	cluster_id = (x * self.y_size) + y
226
227	assert (base & VPN_ANTI_MASK) == 0
228
229	assert (x < self.x_size) and (y < self.y_size)
230
231	assert ( (base & ((1<<paddr_lsb_width)-1)) == self.ram_base )
232
233	assert ( size == self.ram_size )
234
235	# add one pseg in the mapping
236	pseg = Pseg( name, base, size, x, y, 'RAM' )
237	self.clusters[cluster_id].psegs.append( pseg )
238	pseg.index = self.total_psegs
239	self.total_psegs += 1
240
241	return pseg
242
243	########################## add a peripheral and the associated pseg in a cluster
244	def addPeriph( self,
245	name, # associated pseg name
246	base, # associated pseg base address
247	size, # associated pseg length (bytes)
248	ptype, # peripheral type
249	subtype = 'NONE', # peripheral subtype
250	channels = 1, # number of channels
251	arg0 = 0, # optional argument (semantic depends on ptype)
252	arg1 = 0, # optional argument (semantic depends on ptype)
253	arg2 = 0, # optional argument (semantic depends on ptype)
254	arg3 = 0 ): # optional argument (semantic depends on ptype)
255
256	# computes cluster index and coordinates from the base address
257	cluster_xy = base >> (self.paddr_width - self.x_width - self.y_width)
258	x = cluster_xy >> (self.y_width);
259	y = cluster_xy & ((1 << self.y_width) - 1)
260	cluster_id = (x * self.y_size) + y
261
262	assert (x < self.x_size) and (y < self.y_size)
263
264	assert (base & VPN_ANTI_MASK) == 0
265
266	assert ptype in PERIPHTYPES
267
268	if (ptype == 'IOC'): assert subtype in IOCSUBTYPES
269	if (ptype == 'MWR'): assert subtype in MWRSUBTYPES
270
271	# add one pseg into mapping
272	pseg = Pseg( name, base, size, x, y, 'PERI' )
273	self.clusters[cluster_id].psegs.append( pseg )
274	pseg.index = self.total_psegs
275	self.total_psegs += 1
276
277	# add one periph into mapping
278	periph = Periph( pseg, ptype, subtype, channels, arg0, arg1, arg2, arg3 )
279	self.clusters[cluster_id].periphs.append( periph )
280	periph.index = self.total_periphs
281	self.total_periphs += 1
282
283	return periph
284
285	################################ add an IRQ in a peripheral
286	def addIrq( self,
287	periph, # peripheral containing IRQ (PIC or XCU)
288	index, # peripheral input port index
289	isrtype, # ISR type
290	channel = 0 ): # channel for multi-channels ISR
291
292	assert isrtype in ISRTYPES
293
294	assert index < 32
295
296	# add one irq into mapping
297	irq = Irq( 'HWI', index , isrtype, channel )
298	periph.irqs.append( irq )
299	irq.index = self.total_irqs
300	self.total_irqs += 1
301
302	return irq
303
304	########################## add a processor in a cluster
305	def addProc( self,
306	x, # cluster x coordinate
307	y, # cluster y coordinate
308	lpid ): # processor local index
309
310	assert (x < self.x_size) and (y < self.y_size)
311
312	cluster_id = (x * self.y_size) + y
313
314	# add one proc into mapping
315	proc = Processor( x, y, lpid )
316	self.clusters[cluster_id].procs.append( proc )
317	proc.index = self.total_procs
318	self.total_procs += 1
319
320	return proc
321
322	############################ add one global vseg into mapping
323	def addGlobal( self,
324	name, # vseg name
325	vbase, # virtual base address
326	length, # vseg length (bytes)
327	mode, # CXWU flags
328	vtype, # vseg type
329	x, # destination x coordinate
330	y, # destination y coordinate
331	pseg, # destination pseg name
332	identity = False, # identity mapping required if true
333	local = False, # only mapped in local PTAB if true
334	big = False, # to be mapped in a big physical page
335	binpath = '' ): # pathname for binary code if required
336
337	# two global vsegs must not overlap if they have different names
338	for prev in self.globs:
339	if ( ((prev.vbase + prev.length) > vbase ) and
340	((vbase + length) > prev.vbase) and
341	(prev.name != name) ):
342	print '[genmap error] in addGlobal()'
343	print ' global vseg %s overlap %s' % (name, prev.name)
344	print ' %s : base = %x / size = %x' %( name, vbase, size )
345	print ' %s : base = %x / size = %x' %( prev.name, prev.vbase, prev.size )
346	sys.exit(1)
347
348	# add one vseg into mapping
349	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
350	identity = identity, local = local, big = big, binpath = binpath )
351
352	self.globs.append( vseg )
353	self.total_globals += 1
354	vseg.index = self.total_vsegs
355	self.total_vsegs += 1
356
357	return
358
359	################################ add a vspace into mapping
360	def addVspace( self,
361	name, # vspace name
362	startname ): # name of vseg containing start_vector
363
364	# add one vspace into mapping
365	vspace = Vspace( name, startname )
366	self.vspaces.append( vspace )
367	vspace.index = self.total_vspaces
368	self.total_vspaces += 1
369
370	return vspace
371
372	################################# add a private vseg in a vspace
373	def addVseg( self,
374	vspace, # vspace containing the vseg
375	name, # vseg name
376	vbase, # virtual base address
377	length, # vseg length (bytes)
378	mode, # CXWU flags
379	vtype, # vseg type
380	x, # destination x coordinate
381	y, # destination y coordinate
382	pseg, # destination pseg name
383	local = False, # only mapped in local PTAB if true
384	big = False, # to be mapped in a big physical page
385	binpath = '' ): # pathname for binary code
386
387	assert mode in VSEGMODES
388
389	assert vtype in VSEGTYPES
390
391	assert (x < self.x_size) and (y < self.y_size)
392
393	# add one vseg into mapping
394	vseg = Vseg( name, vbase, length, mode, vtype, x, y, pseg,
395	identity = False, local = local, big = big, binpath = binpath )
396	vspace.vsegs.append( vseg )
397	vseg.index = self.total_vsegs
398	self.total_vsegs += 1
399
400	return vseg
401
402	################################ add a task in a vspace
403	def addTask( self,
404	vspace, # vspace containing task
405	name, # task name
406	trdid, # task index in vspace
407	x, # destination x coordinate
408	y, # destination y coordinate
409	lpid, # destination processor local index
410	stackname, # name of vseg containing stack
411	heapname, # name of vseg containing heap
412	startid ): # index in start_vector
413
414	assert (x < self.x_size) and (y < self.y_size)
415	assert lpid < self.nprocs
416
417	# add one task into mapping
418	task = Task( name, trdid, x, y, lpid, stackname, heapname, startid )
419	vspace.tasks.append( task )
420	task.index = self.total_tasks
421	self.total_tasks += 1
422
423	return task
424
425	#################################
426	def str2bytes( self, nbytes, s ): # string => nbytes_packed byte array
427
428	byte_stream = bytearray()
429	length = len( s )
430	if length < (nbytes - 1):
431	for b in s:
432	byte_stream.append( b )
433	for x in xrange(nbytes-length):
434	byte_stream.append( '\0' )
435	else:
436	print '[genmap error] in str2bytes()'
437	print ' string %s too long' % s
438	sys.exit(1)
439
440	return byte_stream
441
442	###################################
443	def int2bytes( self, nbytes, val ): # integer => nbytes litle endian byte array
444
445	byte_stream = bytearray()
446	for n in xrange( nbytes ):
447	byte_stream.append( (val >> (n<<3)) & 0xFF )
448
449	return byte_stream
450
451	################
452	def xml( self ): # compute string for map.xml file generation
453
454	s = '<?xml version="1.0"?>\n\n'
455	s += '<mapping_info signature = "0x%x"\n' % (self.signature)
456	s += ' name = "%s"\n' % (self.name)
457	s += ' x_size = "%d"\n' % (self.x_size)
458	s += ' y_size = "%d"\n' % (self.y_size)
459	s += ' x_width = "%d"\n' % (self.x_width)
460	s += ' y_width = "%d"\n' % (self.y_width)
461	s += ' irq_per_proc = "%d"\n' % (self.irq_per_proc)
462	s += ' use_ramdisk = "%d"\n' % (self.use_ramdisk)
463	s += ' x_io = "%d"\n' % (self.x_io)
464	s += ' y_io = "%d" >\n' % (self.y_io)
465	s += '\n'
466
467	s += ' <clusterset>\n'
468	for x in xrange ( self.x_size ):
469	for y in xrange ( self.y_size ):
470	cluster_id = (x * self.y_size) + y
471	s += self.clusters[cluster_id].xml()
472	s += ' </clusterset>\n'
473	s += '\n'
474
475	s += ' <globalset>\n'
476	for vseg in self.globs: s += vseg.xml()
477	s += ' </globalset>\n'
478	s += '\n'
479
480	s += ' <vspaceset>\n'
481	for vspace in self.vspaces: s += vspace.xml()
482	s += ' </vspaceset>\n'
483
484	s += '</mapping_info>\n'
485	return s
486
487	##########################
488	def cbin( self, verbose ): # C binary structure for map.bin file generation
489
490	byte_stream = bytearray()
491
492	# header
493	byte_stream += self.int2bytes(4, self.signature)
494	byte_stream += self.int2bytes(4, self.x_size)
495	byte_stream += self.int2bytes(4, self.y_size)
496	byte_stream += self.int2bytes(4, self.x_width)
497	byte_stream += self.int2bytes(4, self.y_width)
498	byte_stream += self.int2bytes(4, self.x_io)
499	byte_stream += self.int2bytes(4, self.y_io)
500	byte_stream += self.int2bytes(4, self.irq_per_proc)
501	byte_stream += self.int2bytes(4, self.use_ramdisk)
502	byte_stream += self.int2bytes(4, self.total_globals)
503	byte_stream += self.int2bytes(4, self.total_vspaces)
504	byte_stream += self.int2bytes(4, self.total_psegs)
505	byte_stream += self.int2bytes(4, self.total_vsegs)
506	byte_stream += self.int2bytes(4, self.total_tasks)
507	byte_stream += self.int2bytes(4, self.total_procs)
508	byte_stream += self.int2bytes(4, self.total_irqs)
509	byte_stream += self.int2bytes(4, self.total_periphs)
510	byte_stream += self.str2bytes(32, self.name)
511
512	if ( verbose ):
513	print '\n'
514	print 'name = %s' % self.name
515	print 'signature = %x' % self.signature
516	print 'x_size = %d' % self.x_size
517	print 'y_size = %d' % self.y_size
518	print 'x_width = %d' % self.x_width
519	print 'y_width = %d' % self.y_width
520	print 'x_io = %d' % self.x_io
521	print 'y_io = %d' % self.y_io
522	print 'irq_per_proc = %d' % self.irq_per_proc
523	print 'use_ramdisk = %d' % self.use_ramdisk
524	print 'total_globals = %d' % self.total_globals
525	print 'total_psegs = %d' % self.total_psegs
526	print 'total_vsegs = %d' % self.total_vsegs
527	print 'total_tasks = %d' % self.total_tasks
528	print 'total_procs = %d' % self.total_procs
529	print 'total_irqs = %d' % self.total_irqs
530	print 'total_periphs = %d' % self.total_periphs
531	print '\n'
532
533	# clusters array
534	index = 0
535	for cluster in self.clusters:
536	byte_stream += cluster.cbin( self, verbose, index )
537	index += 1
538
539	if ( verbose ): print '\n'
540
541	# psegs array
542	index = 0
543	for cluster in self.clusters:
544	for pseg in cluster.psegs:
545	byte_stream += pseg.cbin( self, verbose, index, cluster )
546	index += 1
547
548	if ( verbose ): print '\n'
549
550	# vspaces array
551	index = 0
552	for vspace in self.vspaces:
553	byte_stream += vspace.cbin( self, verbose, index )
554	index += 1
555
556	if ( verbose ): print '\n'
557
558	# vsegs array
559	index = 0
560	for vseg in self.globs:
561	byte_stream += vseg.cbin( self, verbose, index )
562	index += 1
563	for vspace in self.vspaces:
564	for vseg in vspace.vsegs:
565	byte_stream += vseg.cbin( self, verbose, index )
566	index += 1
567
568	if ( verbose ): print '\n'
569
570	# tasks array
571	index = 0
572	for vspace in self.vspaces:
573	for task in vspace.tasks:
574	byte_stream += task.cbin( self, verbose, index, vspace )
575	index += 1
576
577	if ( verbose ): print '\n'
578
579	# procs array
580	index = 0
581	for cluster in self.clusters:
582	for proc in cluster.procs:
583	byte_stream += proc.cbin( self, verbose, index )
584	index += 1
585
586	if ( verbose ): print '\n'
587
588	# irqs array
589	index = 0
590	for cluster in self.clusters:
591	for periph in cluster.periphs:
592	for irq in periph.irqs:
593	byte_stream += irq.cbin( self, verbose, index )
594	index += 1
595
596	if ( verbose ): print '\n'
597
598	# periphs array
599	index = 0
600	for cluster in self.clusters:
601	for periph in cluster.periphs:
602	byte_stream += periph.cbin( self, verbose, index )
603	index += 1
604
605	return byte_stream
606	# end of cbin()
607
608	##################################################################################
609	def giet_vsegs( self ): # compute string for giet_vsegs.ld file generation
610	# required by giet_vm compilation
611
612	# search the vsegs required for the giet_vsegs.ld
613	boot_code_found = False
614	boot_data_found = False
615	kernel_uncdata_found = False
616	kernel_data_found = False
617	kernel_code_found = False
618	kernel_init_found = False
619	for vseg in self.globs:
620
621	if ( vseg.name == 'seg_boot_code' ):
622	boot_code_vbase = vseg.vbase
623	boot_code_size = vseg.length
624	boot_code_found = True
625
626	if ( vseg.name == 'seg_boot_data' ):
627	boot_data_vbase = vseg.vbase
628	boot_data_size = vseg.length
629	boot_data_found = True
630
631	if ( vseg.name == 'seg_kernel_data' ):
632	kernel_data_vbase = vseg.vbase
633	kernel_data_size = vseg.length
634	kernel_data_found = True
635
636	if ( vseg.name == 'seg_kernel_code' ):
637	kernel_code_vbase = vseg.vbase
638	kernel_code_size = vseg.length
639	kernel_code_found = True
640
641	if ( vseg.name == 'seg_kernel_init' ):
642	kernel_init_vbase = vseg.vbase
643	kernel_init_size = vseg.length
644	kernel_init_found = True
645
646	# check if all required vsegs have been found
647	if ( boot_code_found == False ):
648	print '[genmap error] in giet_vsegs()'
649	print ' seg_boot_code vseg missing'
650	sys.exit()
651
652	if ( boot_data_found == False ):
653	print '[genmap error] in giet_vsegs()'
654	print ' seg_boot_data vseg missing'
655	sys.exit()
656
657	if ( kernel_data_found == False ):
658	print '[genmap error] in giet_vsegs()'
659	print ' seg_kernel_data vseg missing'
660	sys.exit()
661
662	if ( kernel_code_found == False ):
663	print '[genmap error] in giet_vsegs()'
664	print ' seg_kernel_code vseg missing'
665	sys.exit()
666
667	if ( kernel_init_found == False ):
668	print '[genmap error] in giet_vsegs()'
669	print ' seg_kernel_init vseg missing'
670	sys.exit()
671
672	# build string
673	s = '/* Generated by genmap for %s */\n' % self.name
674	s += '\n'
675
676	s += 'boot_code_vbase = 0x%x;\n' % boot_code_vbase
677	s += 'boot_code_size = 0x%x;\n' % boot_code_size
678	s += '\n'
679	s += 'boot_data_vbase = 0x%x;\n' % boot_data_vbase
680	s += 'boot_data_size = 0x%x;\n' % boot_data_size
681	s += '\n'
682	s += 'kernel_code_vbase = 0x%x;\n' % kernel_code_vbase
683	s += 'kernel_code_size = 0x%x;\n' % kernel_code_size
684	s += '\n'
685	s += 'kernel_data_vbase = 0x%x;\n' % kernel_data_vbase
686	s += 'kernel_data_size = 0x%x;\n' % kernel_data_size
687	s += '\n'
688	s += 'kernel_init_vbase = 0x%x;\n' % kernel_init_vbase
689	s += 'kernel_init_size = 0x%x;\n' % kernel_init_size
690	s += '\n'
691
692	return s
693
694	###################################################################################
695	def hard_config( self ): # compute string for hard_config.h file generation,
696	# required by
697	# - top.cpp compilation
698	# - giet_vm compilation
699	# - tsar_preloader compilation
700
701	nb_total_procs = 0
702
703	# for each peripheral type, define default values
704	# for pbase address, size, number of components, and channels
705	nb_cma = 0
706	cma_channels = 0
707	seg_cma_base = 0xFFFFFFFF
708	seg_cma_size = 0
709
710	nb_dma = 0
711	dma_channels = 0
712	seg_dma_base = 0xFFFFFFFF
713	seg_dma_size = 0
714
715	nb_fbf = 0
716	fbf_channels = 0
717	seg_fbf_base = 0xFFFFFFFF
718	seg_fbf_size = 0
719	fbf_arg0 = 0
720	fbf_arg1 = 0
721
722	nb_iob = 0
723	iob_channels = 0
724	seg_iob_base = 0xFFFFFFFF
725	seg_iob_size = 0
726
727	nb_ioc = 0
728	ioc_channels = 0
729	seg_ioc_base = 0xFFFFFFFF
730	seg_ioc_size = 0
731
732	nb_mmc = 0
733	mmc_channels = 0
734	seg_mmc_base = 0xFFFFFFFF
735	seg_mmc_size = 0
736
737	nb_mwr = 0
738	mwr_channels = 0
739	seg_mwr_base = 0xFFFFFFFF
740	seg_mwr_size = 0
741	mwr_arg0 = 0
742	mwr_arg1 = 0
743	mwr_arg2 = 0
744	mwr_arg3 = 0
745
746	nb_nic = 0
747	nic_channels = 0
748	seg_nic_base = 0xFFFFFFFF
749	seg_nic_size = 0
750
751	nb_pic = 0
752	pic_channels = 0
753	seg_pic_base = 0xFFFFFFFF
754	seg_pic_size = 0
755
756	nb_rom = 0
757	rom_channels = 0
758	seg_rom_base = 0xFFFFFFFF
759	seg_rom_size = 0
760
761	nb_sim = 0
762	sim_channels = 0
763	seg_sim_base = 0xFFFFFFFF
764	seg_sim_size = 0
765
766	nb_tim = 0
767	tim_channels = 0
768	seg_tim_base = 0xFFFFFFFF
769	seg_tim_size = 0
770
771	nb_tty = 0
772	tty_channels = 0
773	seg_tty_base = 0xFFFFFFFF
774	seg_tty_size = 0
775
776	nb_xcu = 0
777	xcu_channels = 0
778	seg_xcu_base = 0xFFFFFFFF
779	seg_xcu_size = 0
780	xcu_arg0 = 0
781
782	nb_drom = 0
783	drom_channels = 0
784	seg_drom_base = 0xFFFFFFFF
785	seg_drom_size = 0
786
787	use_bdv = False
788	use_spi = False
789	use_hba = False
790
791	# get peripherals attributes
792	for cluster in self.clusters:
793	for periph in cluster.periphs:
794	if ( periph.ptype == 'CMA' ):
795	seg_cma_base = periph.pseg.base & 0xFFFFFFFF
796	seg_cma_size = periph.pseg.size
797	cma_channels = periph.channels
798	nb_cma +=1
799
800	elif ( periph.ptype == 'DMA' ):
801	seg_dma_base = periph.pseg.base & 0xFFFFFFFF
802	seg_dma_size = periph.pseg.size
803	dma_channels = periph.channels
804	nb_dma +=1
805
806	elif ( periph.ptype == 'FBF' ):
807	seg_fbf_base = periph.pseg.base & 0xFFFFFFFF
808	seg_fbf_size = periph.pseg.size
809	fbf_channels = periph.channels
810	fbf_arg0 = periph.arg0
811	fbf_arg1 = periph.arg1
812	nb_fbf +=1
813
814	elif ( periph.ptype == 'IOB' ):
815	seg_iob_base = periph.pseg.base & 0xFFFFFFFF
816	seg_iob_size = periph.pseg.size
817	iob_channels = periph.channels
818	nb_iob +=1
819
820	elif ( periph.ptype == 'IOC' ):
821	seg_ioc_base = periph.pseg.base & 0xFFFFFFFF
822	seg_ioc_size = periph.pseg.size
823	ioc_channels = periph.channels
824	nb_ioc += 1
825
826	if self.use_ramdisk: continue
827
828	if ( periph.subtype == 'BDV' ): use_bdv = True
829	elif ( periph.subtype == 'HBA' ): use_hba = True
830	elif ( periph.subtype == 'SPI' ): use_spi = True
831
832	elif ( periph.ptype == 'MMC' ):
833	seg_mmc_base = periph.pseg.base & 0xFFFFFFFF
834	seg_mmc_size = periph.pseg.size
835	mmc_channels = periph.channels
836	nb_mmc +=1
837
838	elif ( periph.ptype == 'MWR' ):
839	seg_mwr_base = periph.pseg.base & 0xFFFFFFFF
840	seg_mwr_size = periph.pseg.size
841	mwr_channels = periph.channels
842	mwr_arg0 = periph.arg0
843	mwr_arg1 = periph.arg1
844	mwr_arg2 = periph.arg2
845	mwr_arg3 = periph.arg3
846	nb_mwr +=1
847
848	elif ( periph.ptype == 'ROM' ):
849	seg_rom_base = periph.pseg.base & 0xFFFFFFFF
850	seg_rom_size = periph.pseg.size
851	rom_channels = periph.channels
852	nb_rom +=1
853
854	elif ( periph.ptype == 'DROM' ):
855	seg_drom_base = periph.pseg.base & 0xFFFFFFFF
856	seg_drom_size = periph.pseg.size
857	drom_channels = periph.channels
858	nb_drom +=1
859
860	elif ( periph.ptype == 'SIM' ):
861	seg_sim_base = periph.pseg.base & 0xFFFFFFFF
862	seg_sim_size = periph.pseg.size
863	sim_channels = periph.channels
864	nb_sim +=1
865
866	elif ( periph.ptype == 'NIC' ):
867	seg_nic_base = periph.pseg.base & 0xFFFFFFFF
868	seg_nic_size = periph.pseg.size
869	nic_channels = periph.channels
870	nb_nic +=1
871
872	elif ( periph.ptype == 'PIC' ):
873	seg_pic_base = periph.pseg.base & 0xFFFFFFFF
874	seg_pic_size = periph.pseg.size
875	pic_channels = periph.channels
876	nb_pic +=1
877
878	elif ( periph.ptype == 'TIM' ):
879	seg_tim_base = periph.pseg.base & 0xFFFFFFFF
880	seg_tim_size = periph.pseg.size
881	tim_channels = periph.channels
882	nb_tim +=1
883
884	elif ( periph.ptype == 'TTY' ):
885	seg_tty_base = periph.pseg.base & 0xFFFFFFFF
886	seg_tty_size = periph.pseg.size
887	tty_channels = periph.channels
888	nb_tty +=1
889
890	elif ( periph.ptype == 'XCU' ):
891	seg_xcu_base = periph.pseg.base & 0xFFFFFFFF
892	seg_xcu_size = periph.pseg.size
893	xcu_channels = periph.channels
894	xcu_arg0 = periph.arg0
895	nb_xcu +=1
896
897	# no more than two access to external peripherals
898	assert ( nb_fbf <= 2 )
899	assert ( nb_cma <= 2 )
900	assert ( nb_ioc <= 2 )
901	assert ( nb_nic <= 2 )
902	assert ( nb_tim <= 2 )
903	assert ( nb_tty <= 2 )
904	assert ( nb_pic <= 2 )
905
906	# one and only one type of IOC controller
907	nb_iocs = 0
908	if use_hba : nb_iocs += 1
909	if use_bdv : nb_iocs += 1
910	if use_spi : nb_iocs += 1
911	if self.use_ramdisk: nb_iocs += 1
912	assert ( nb_iocs == 1 )
913
914	# Compute total number of processors
915	for cluster in self.clusters:
916	nb_total_procs += len( cluster.procs )
917
918	# Compute physical addresses for BOOT vsegs
919	boot_mapping_found = False
920	boot_code_found = False
921	boot_data_found = False
922	boot_stack_found = False
923
924	for vseg in self.globs:
925	if ( vseg.name == 'seg_boot_mapping' ):
926	boot_mapping_base = vseg.vbase
927	boot_mapping_size = vseg.length
928	boot_mapping_identity = vseg.identity
929	boot_mapping_found = True
930
931	if ( vseg.name == 'seg_boot_code' ):
932	boot_code_base = vseg.vbase
933	boot_code_size = vseg.length
934	boot_code_identity = vseg.identity
935	boot_code_found = True
936
937	if ( vseg.name == 'seg_boot_data' ):
938	boot_data_base = vseg.vbase
939	boot_data_size = vseg.length
940	boot_data_identity = vseg.identity
941	boot_data_found = True
942
943	if ( vseg.name == 'seg_boot_stack' ):
944	boot_stack_base = vseg.vbase
945	boot_stack_size = vseg.length
946	boot_stack_identity = vseg.identity
947	boot_stack_found = True
948
949	# check that BOOT vsegs are found and identity mapping
950	if ( (boot_mapping_found == False) or (boot_mapping_identity == False) ):
951	print '[genmap error] in hard_config()'
952	print ' seg_boot_mapping missing or not identity mapping'
953	sys.exit()
954
955	if ( (boot_code_found == False) or (boot_code_identity == False) ):
956	print '[genmap error] in hard_config()'
957	print ' seg_boot_code missing or not identity mapping'
958	sys.exit()
959
960	if ( (boot_data_found == False) or (boot_data_identity == False) ):
961	print '[genmap error] in hard_config()'
962	print ' seg_boot_data missing or not identity mapping'
963	sys.exit()
964
965	if ( (boot_stack_found == False) or (boot_stack_identity == False) ):
966	print '[genmap error] in giet_vsegs()'
967	print ' seg_boot_stask missing or not identity mapping'
968	sys.exit()
969
970	# Search RAMDISK global vseg if required
971	seg_rdk_base = 0xFFFFFFFF
972	seg_rdk_size = 0
973	seg_rdk_found = False
974
975	if self.use_ramdisk:
976	for vseg in self.globs:
977	if ( vseg.name == 'seg_ramdisk' ):
978	seg_rdk_base = vseg.vbase
979	seg_rdk_size = vseg.length
980	seg_rdk_found = True
981
982	if ( seg_rdk_found == False ):
983	print 'Error in hard_config() "seg_ramdisk" not found'
984	sys.exit(1)
985
986	# build string
987	s = '/* Generated by genmap for %s */\n' % self.name
988	s += '\n'
989	s += '#ifndef HARD_CONFIG_H\n'
990	s += '#define HARD_CONFIG_H\n'
991	s += '\n'
992
993	s += '/* General platform parameters */\n'
994	s += '\n'
995	s += '#define X_SIZE %d\n' % self.x_size
996	s += '#define Y_SIZE %d\n' % self.y_size
997	s += '#define X_WIDTH %d\n' % self.x_width
998	s += '#define Y_WIDTH %d\n' % self.y_width
999	s += '#define P_WIDTH %d\n' % self.p_width
1000	s += '#define X_IO %d\n' % self.x_io
1001	s += '#define Y_IO %d\n' % self.y_io
1002	s += '#define NB_PROCS_MAX %d\n' % self.nprocs
1003	s += '#define IRQ_PER_PROCESSOR %d\n' % self.irq_per_proc
1004	s += '#define RESET_ADDRESS 0x%x\n' % self.reset_address
1005	s += '#define NB_TOTAL_PROCS %d\n' % nb_total_procs
1006	s += '\n'
1007
1008	s += '/* Peripherals */\n'
1009	s += '\n'
1010	s += '#define NB_TTY_CHANNELS %d\n' % tty_channels
1011	s += '#define NB_IOC_CHANNELS %d\n' % ioc_channels
1012	s += '#define NB_NIC_CHANNELS %d\n' % nic_channels
1013	s += '#define NB_CMA_CHANNELS %d\n' % cma_channels
1014	s += '#define NB_TIM_CHANNELS %d\n' % tim_channels
1015	s += '#define NB_DMA_CHANNELS %d\n' % dma_channels
1016	s += '\n'
1017	s += '#define USE_XCU %d\n' % ( nb_xcu != 0 )
1018	s += '#define USE_IOB %d\n' % ( nb_iob != 0 )
1019	s += '#define USE_PIC %d\n' % ( nb_pic != 0 )
1020	s += '#define USE_FBF %d\n' % ( nb_fbf != 0 )
1021	s += '\n'
1022	s += '#define USE_IOC_BDV %d\n' % use_bdv
1023	s += '#define USE_IOC_SPI %d\n' % use_spi
1024	s += '#define USE_IOC_HBA %d\n' % use_hba
1025	s += '#define USE_IOC_RDK %d\n' % self.use_ramdisk
1026	s += '\n'
1027	s += '#define FBUF_X_SIZE %d\n' % fbf_arg0
1028	s += '#define FBUF_Y_SIZE %d\n' % fbf_arg1
1029	s += '\n'
1030	s += '#define XCU_NB_INPUTS %d\n' % xcu_arg0
1031	s += '\n'
1032	s += '#define MWR_TO_COPROC %d\n' % mwr_arg0
1033	s += '#define MWR_FROM_COPROC %d\n' % mwr_arg1
1034	s += '#define MWR_CONFIG %d\n' % mwr_arg2
1035	s += '#define MWR_STATUS %d\n' % mwr_arg3
1036	s += '\n'
1037
1038	s += '/* base addresses and sizes for physical segments */\n'
1039	s += '\n'
1040	s += '#define SEG_RAM_BASE 0x%x\n' % self.ram_base
1041	s += '#define SEG_RAM_SIZE 0x%x\n' % self.ram_size
1042	s += '\n'
1043	s += '#define SEG_CMA_BASE 0x%x\n' % seg_cma_base
1044	s += '#define SEG_CMA_SIZE 0x%x\n' % seg_cma_size
1045	s += '\n'
1046	s += '#define SEG_DMA_BASE 0x%x\n' % seg_dma_base
1047	s += '#define SEG_DMA_SIZE 0x%x\n' % seg_dma_size
1048	s += '\n'
1049	s += '#define SEG_FBF_BASE 0x%x\n' % seg_fbf_base
1050	s += '#define SEG_FBF_SIZE 0x%x\n' % seg_fbf_size
1051	s += '\n'
1052	s += '#define SEG_IOB_BASE 0x%x\n' % seg_iob_base
1053	s += '#define SEG_IOB_SIZE 0x%x\n' % seg_iob_size
1054	s += '\n'
1055	s += '#define SEG_IOC_BASE 0x%x\n' % seg_ioc_base
1056	s += '#define SEG_IOC_SIZE 0x%x\n' % seg_ioc_size
1057	s += '\n'
1058	s += '#define SEG_MMC_BASE 0x%x\n' % seg_mmc_base
1059	s += '#define SEG_MMC_SIZE 0x%x\n' % seg_mmc_size
1060	s += '\n'
1061	s += '#define SEG_MWR_BASE 0x%x\n' % seg_mwr_base
1062	s += '#define SEG_MWR_SIZE 0x%x\n' % seg_mwr_size
1063	s += '\n'
1064	s += '#define SEG_ROM_BASE 0x%x\n' % seg_rom_base
1065	s += '#define SEG_ROM_SIZE 0x%x\n' % seg_rom_size
1066	s += '\n'
1067	s += '#define SEG_SIM_BASE 0x%x\n' % seg_sim_base
1068	s += '#define SEG_SIM_SIZE 0x%x\n' % seg_sim_size
1069	s += '\n'
1070	s += '#define SEG_NIC_BASE 0x%x\n' % seg_nic_base
1071	s += '#define SEG_NIC_SIZE 0x%x\n' % seg_nic_size
1072	s += '\n'
1073	s += '#define SEG_PIC_BASE 0x%x\n' % seg_pic_base
1074	s += '#define SEG_PIC_SIZE 0x%x\n' % seg_pic_size
1075	s += '\n'
1076	s += '#define SEG_TIM_BASE 0x%x\n' % seg_tim_base
1077	s += '#define SEG_TIM_SIZE 0x%x\n' % seg_tim_size
1078	s += '\n'
1079	s += '#define SEG_TTY_BASE 0x%x\n' % seg_tty_base
1080	s += '#define SEG_TTY_SIZE 0x%x\n' % seg_tty_size
1081	s += '\n'
1082	s += '#define SEG_XCU_BASE 0x%x\n' % seg_xcu_base
1083	s += '#define SEG_XCU_SIZE 0x%x\n' % seg_xcu_size
1084	s += '\n'
1085	s += '#define SEG_RDK_BASE 0x%x\n' % seg_rdk_base
1086	s += '#define SEG_RDK_SIZE 0x%x\n' % seg_rdk_size
1087	s += '\n'
1088	s += '#define SEG_DROM_BASE 0x%x\n' % seg_drom_base
1089	s += '#define SEG_DROM_SIZE 0x%x\n' % seg_drom_size
1090	s += '\n'
1091	s += '#define PERI_CLUSTER_INCREMENT 0x%x\n' % self.peri_increment
1092	s += '\n'
1093
1094	s += '/* physical base addresses for identity mapped vsegs */\n'
1095	s += '/* used by the GietVM OS */\n'
1096	s += '\n'
1097	s += '#define SEG_BOOT_MAPPING_BASE 0x%x\n' % boot_mapping_base
1098	s += '#define SEG_BOOT_MAPPING_SIZE 0x%x\n' % boot_mapping_size
1099	s += '\n'
1100	s += '#define SEG_BOOT_CODE_BASE 0x%x\n' % boot_code_base
1101	s += '#define SEG_BOOT_CODE_SIZE 0x%x\n' % boot_code_size
1102	s += '\n'
1103	s += '#define SEG_BOOT_DATA_BASE 0x%x\n' % boot_data_base
1104	s += '#define SEG_BOOT_DATA_SIZE 0x%x\n' % boot_data_size
1105	s += '\n'
1106	s += '#define SEG_BOOT_STACK_BASE 0x%x\n' % boot_stack_base
1107	s += '#define SEG_BOOT_STACK_SIZE 0x%x\n' % boot_stack_size
1108	s += '#endif\n'
1109
1110	return s
1111
1112	# end of hard_config()
1113
1114	################################################################################
1115	def linux_dts( self ): # compute string for linux.dts file generation
1116	# used for linux configuration
1117	# header
1118	s = '/dts-v1/;\n'
1119	s += '\n'
1120	s += '/{\n'
1121	s += ' compatible = "tsar,%s";\n' % self.name
1122	s += ' #address-cells = <2>;\n' # physical address on 64 bits
1123	s += ' #size-cells = <1>;\n' # segment size on 32 bits
1124	s += ' model = "%s";\n' % self.name
1125	s += '\n'
1126
1127	# linux globals arguments
1128	s += ' chosen {\n'
1129	s += ' linux,stdout-path = &tty;\n'
1130	s += ' bootargs = "console=tty0 console=ttyVTTY0 earlyprintk";\n'
1131	s += ' };\n\n'
1132
1133	# cpus (for each cluster)
1134	s += ' cpus {\n'
1135	s += ' #address-cells = <1>;\n'
1136	s += ' #size-cells = <0>;\n'
1137
1138	for cluster in self.clusters:
1139	for proc in cluster.procs:
1140	x = cluster.x
1141	y = cluster.y
1142	l = proc.lpid
1143	proc_id = (((x << self.y_width) + y) << self.p_width) + l
1144	s += ' cpu@%d_%d_%d {\n' %(x,y,l)
1145	s += ' device_type = "cpu";\n'
1146	s += ' compatible = "soclib,mips32el";\n'
1147	s += ' reg = <0x%x>;\n' % proc_id
1148	s += ' };\n'
1149	s += '\n'
1150
1151	s += ' };\n\n'
1152
1153	# devices (ram or peripheral) are grouped per cluster
1154	# the "compatible" attribute links a peripheral device
1155	# to one or several drivers identified by ("major","minor")
1156
1157	for cluster in self.clusters:
1158	x = cluster.x
1159	y = cluster.y
1160	found_xcu = False
1161	found_pic = False
1162
1163	s += ' /* cluster[%d,%d] */\n\n' % (x,y)
1164
1165	# scan all psegs to find RAM in current cluster
1166	for pseg in cluster.psegs:
1167	if ( pseg.segtype == 'RAM' ):
1168	msb = pseg.base >> 32
1169	lsb = pseg.base & 0xFFFFFFFF
1170	size = pseg.size
1171
1172	s += ' ram_%d_%d: ram@0x%x {\n' % (x, y, pseg.base)
1173	s += ' device_type = "memory";\n'
1174	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1175	s += ' };\n\n'
1176
1177	# scan all periphs to find XCU or PIC in current cluster
1178	for periph in cluster.periphs:
1179	msb = periph.pseg.base >> 32
1180	lsb = periph.pseg.base & 0xFFFFFFFF
1181	size = periph.pseg.size
1182
1183	# search XCU (can be replicated)
1184	if ( (periph.ptype == 'XCU') ):
1185	found_xcu = True
1186	xcu = periph
1187	irq_ctrl_name = 'xcu_%d_%d' % (x, y)
1188
1189	s += ' %s: xcu@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
1190	s += ' compatible = "soclib,vci_xicu","soclib,vci_xicu_timer";\n'
1191	s += ' interrupt-controller;\n'
1192	s += ' #interrupt-cells = <1>;\n'
1193	s += ' clocks = <&freq>;\n' # XCU contains a timer
1194	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1195	s += ' };\n\n'
1196
1197	# search PIC (non replicated)
1198	if ( periph.ptype == 'PIC' ):
1199	found_pic = True
1200	pic = periph
1201	irq_ctrl_name = 'pic'
1202
1203	s += ' %s: pic@0x%x {\n' % (irq_ctrl_name, periph.pseg.base)
1204	s += ' compatible = "soclib,vci_iopic";\n'
1205	s += ' interrupt-controller;\n'
1206	s += ' #interrupt-cells = <1>;\n'
1207	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1208	s += ' };\n\n'
1209
1210	# we need one interrupt controler in any cluster containing peripherals
1211	if ( (found_xcu == False) and
1212	(found_pic == False) and
1213	(len(cluster.periphs) > 0) ):
1214	print '[genmap error] in linux_dts()'
1215	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
1216	sys.exit(1)
1217
1218	if ( found_pic == True ): irq_ctrl = pic
1219	else: irq_ctrl = xcu
1220
1221	# scan all periphs to find TTY and IOC in current cluster
1222	for periph in cluster.periphs:
1223	msb = periph.pseg.base >> 32
1224	lsb = periph.pseg.base & 0xFFFFFFFF
1225	size = periph.pseg.size
1226
1227	# search TTY (non replicated)
1228	if ( periph.ptype == 'TTY' ):
1229
1230	# get HWI index to XCU or PIC (only TTY channel 0 is used by Linux)
1231	hwi_id = 0xFFFFFFFF
1232	for irq in irq_ctrl.irqs:
1233	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == 0) ):
1234	hwi_id = irq.srcid
1235
1236	if ( hwi_id == 0xFFFFFFFF ):
1237	print '[genmap error] in linux.dts()'
1238	print ' IRQ_TTY_RX not found'
1239	sys.exit(1)
1240
1241	s += ' tty: tty@0x%x {\n' % (periph.pseg.base)
1242	s += ' compatible = "soclib,vci_multi_tty";\n'
1243	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
1244	s += ' interrupts = <%d>;\n' % hwi_id
1245	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1246	s += ' };\n\n'
1247
1248	# search IOC (non replicated)
1249	elif ( periph.ptype == 'IOC' ):
1250
1251	if ( periph.subtype == 'BDV' ):
1252
1253	# get irq line index associated to bdv
1254	hwi_id = 0xFFFFFFFF
1255	for irq in irq_ctrl.irqs:
1256	if ( irq.isrtype == 'ISR_BDV' ): hwi_id = irq.srcid
1257
1258	if ( hwi_id == 0xFFFFFFFF ):
1259	print '[genmap error] in linux.dts()'
1260	print ' ISR_BDV not found'
1261	sys.exit(1)
1262
1263	s += ' bdv: bdv@0x%x {\n' % (periph.pseg.base)
1264	s += ' compatible = "tsar,vci_block_device";\n'
1265	s += ' interrupt-parent = <&%s>;\n' % (irq_ctrl_name)
1266	s += ' interrupts = <%d>;\n' % hwi_id
1267	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1268	s += ' };\n\n'
1269
1270	else:
1271	print '[genmap warning] in linux_dts() : %s' % (periph.subtype),
1272	print 'peripheral not supported by LINUX'
1273
1274	# XCU or PIC have been already parsed
1275	elif ( periph.ptype == 'XCU' ) or ( periph.ptype == 'PIC' ):
1276	pass
1277
1278	# other peripherals
1279	else:
1280	print '[genmap warning] in linux_dts()'
1281	print ' %s peripheral not supported by LINUX' % (periph.ptype)
1282
1283	# clocks
1284	s += ' /* clocks */\n\n'
1285	s += ' clocks {\n'
1286	s += ' freq: freq@50MHZ {\n'
1287	s += ' #clock-cells = <0>;\n'
1288	s += ' compatible = "fixed-clock";\n'
1289	s += ' clock-frequency = <50000000>;\n'
1290	s += ' };\n'
1291	s += ' };\n\n'
1292	s += ' cpuclk {\n'
1293	s += ' compatible = "soclib,mips32_clksrc";\n'
1294	s += ' clocks = <&freq>;\n'
1295	s += ' };\n'
1296	s += '};\n'
1297
1298	return s
1299	# end linux_dts()
1300
1301
1302	#############################################################################
1303	def netbsd_dts( self ): # compute string for netbsd.dts file generation,
1304	# used for netbsd configuration
1305	# header
1306	s = '/dts-v1/;\n'
1307	s += '\n'
1308	s += '/{\n'
1309	s += ' #address-cells = <2>;\n'
1310	s += ' #size-cells = <1>;\n'
1311
1312	# cpus (for each cluster)
1313	s += ' cpus {\n'
1314	s += ' #address-cells = <1>;\n'
1315	s += ' #size-cells = <0>;\n'
1316
1317	for cluster in self.clusters:
1318	for proc in cluster.procs:
1319	proc_id = (((cluster.x << self.y_width) + cluster.y) << self.p_width) + proc.lpid
1320
1321	s += ' Mips,32@0x%x {\n' % proc_id
1322	s += ' device_type = "cpu";\n'
1323	s += ' icudev_type = "cpu:mips";\n'
1324	s += ' name = "Mips,32";\n'
1325	s += ' reg = <0x%x>;\n' % proc_id
1326	s += ' };\n'
1327	s += '\n'
1328
1329	s += ' };\n'
1330
1331	# physical memory banks (for each cluster)
1332	for cluster in self.clusters:
1333	for pseg in cluster.psegs:
1334
1335	if ( pseg.segtype == 'RAM' ):
1336	msb = pseg.base >> 32
1337	lsb = pseg.base & 0xFFFFFFFF
1338	size = pseg.size
1339
1340	s += ' %s@0x%x {\n' % (pseg.name, pseg.base)
1341	s += ' cached = <1>;\n'
1342	s += ' device_type = "memory";\n'
1343	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1344	s += ' };\n'
1345
1346	# peripherals (for each cluster)
1347	for cluster in self.clusters:
1348	x = cluster.x
1349	y = cluster.y
1350
1351	# research XCU component
1352	found_xcu = False
1353	for periph in cluster.periphs:
1354	if ( (periph.ptype == 'XCU') ):
1355	found_xcu = True
1356	xcu = periph
1357	msb = periph.pseg.base >> 32
1358	lsb = periph.pseg.base & 0xFFFFFFFF
1359	size = periph.pseg.size
1360
1361	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1362	s += ' device_type = "soclib:xicu:root";\n'
1363	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1364	s += ' input_lines = <%d>;\n' % periph.arg
1365	s += ' ipis = <%d>;\n' % periph.arg
1366	s += ' timers = <%d>;\n' % periph.arg
1367
1368	output_id = 0 # output index from XCU
1369	for lpid in xrange ( len(cluster.procs) ): # destination processor index
1370	for itid in xrange ( self.irq_per_proc ): # input irq index on processor
1371	cluster_xy = (cluster.x << self.y_width) + cluster.y
1372	proc_id = (cluster_xy << self.p_width) + lpid
1373	s += ' out@%d {\n' % output_id
1374	s += ' device_type = "soclib:xicu:filter";\n'
1375	s += ' irq = <&{/cpus/Mips,32@0x%x} %d>;\n' % (proc_id, itid)
1376	s += ' output_line = <%d>;\n' % output_id
1377	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
1378	s += ' };\n'
1379
1380	output_id += 1
1381
1382	s += ' };\n'
1383
1384	# research PIC component
1385	found_pic = False
1386	for periph in cluster.periphs:
1387	if ( periph.ptype == 'PIC' ):
1388	found_pic = True
1389	pic = periph
1390	msb = periph.pseg.base >> 32
1391	lsb = periph.pseg.base & 0xFFFFFFFF
1392	size = periph.pseg.size
1393
1394	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1395	s += ' device_type = "soclib:pic:root";\n'
1396	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1397	s += ' input_lines = <%d>;\n' % periph.channels
1398	s += ' };\n'
1399
1400	# at least one interrupt controller
1401	if ( (found_xcu == False) and (found_pic == False) and (len(cluster.periphs) > 0) ):
1402	print '[genmap error] in netbsd_dts()'
1403	print ' No XCU/PIC in cluster(%d,%d)' % (x,y)
1404	sys.exit(1)
1405
1406	if ( found_pic == True ): irq_tgt = pic
1407	else: irq_tgt = xcu
1408
1409	# get all others peripherals in cluster
1410	for periph in cluster.periphs:
1411	msb = periph.pseg.base >> 32
1412	lsb = periph.pseg.base & 0xFFFFFFFF
1413	size = periph.pseg.size
1414
1415	# research DMA component
1416	if ( periph.ptype == 'DMA' ):
1417
1418	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1419	s += ' device_type = "soclib:dma";\n'
1420	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1421	s += ' channel_count = <%d>;\n' % periph.channels
1422
1423	# multi-channels : get HWI index (to XCU) for each channel
1424	for channel in xrange( periph.channels ):
1425	hwi_id = 0xFFFFFFFF
1426	for irq in xcu.irqs:
1427	if ( (irq.isrtype == 'ISR_DMA') and (irq.channel == channel) ):
1428	hwi_id = irq.srcid
1429
1430	if ( hwi_id == 0xFFFFFFFF ):
1431	print '[genmap error] in netbsd.dts()'
1432	print ' ISR_DMA channel %d not found' % channel
1433	sys.exit(1)
1434
1435	name = '%s@0x%x' % (xcu.pseg.name, xcu.pseg.base)
1436	s += ' irq@%d{\n' % channel
1437	s += ' device_type = "soclib:periph:irq";\n'
1438	s += ' output_line = <%d>;\n' % channel
1439	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
1440	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
1441	s += ' };\n'
1442
1443	s += ' };\n'
1444
1445	# research MMC component
1446	elif ( periph.ptype == 'MMC' ):
1447
1448	# get irq line index associated to MMC in XCU
1449	irq_in = 0xFFFFFFFF
1450	for irq in xcu.irqs:
1451	if ( irq.isrtype == 'ISR_MMC' ): irq_in = irq.srcid
1452
1453	if ( irq_in == 0xFFFFFFFF ):
1454	print '[genmap error] in netbsd.dts()'
1455	print ' ISR_MMC not found'
1456	sys.exit(1)
1457
1458	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1459	s += ' device_type = "soclib:mmc";\n'
1460	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name, irq_tgt.pseg.base, irq_in)
1461	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1462	s += ' };\n'
1463
1464	# research FBF component
1465	elif ( periph.ptype == 'FBF' ):
1466
1467	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1468	s += ' device_type = "soclib:framebuffer";\n'
1469	s += ' mode = <32>;\n' # bits par pixel
1470	s += ' width = <%d>;\n' % periph.arg
1471	s += ' height = <%d>;\n' % periph.arg
1472	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1473	s += ' };\n'
1474
1475	# research IOC component
1476	elif ( periph.ptype == 'IOC' ):
1477
1478	if ( periph.subtype == 'BDV' ):
1479
1480	# get irq line index associated to bdv
1481	irq_in = 0xFFFFFFFF
1482	for irq in irq_tgt.irqs:
1483	if ( irq.isrtype == 'ISR_BDV' ): irq_in = irq.srcid
1484	if ( irq_in == 0xFFFFFFFF ):
1485	print '[genmap error] in netbsd.dts()'
1486	print ' ISR_BDV not found'
1487	sys.exit(1)
1488
1489	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1490	s += ' device_type = "soclib:blockdevice";\n'
1491	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
1492	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1493	s += ' };\n'
1494
1495	elif ( periph.subtype == 'HBA' ):
1496	print '[genmap error] in netbsd_dts()'
1497	print ' HBA peripheral not supported by NetBSD'
1498	sys.exit(1)
1499
1500	elif ( periph.subtype == 'SPI' ):
1501
1502	# get irq line index associated to spi
1503	irq_in = 0xFFFFFFFF
1504	for irq in irq_tgt.irqs:
1505	if ( irq.isrtype == 'ISR_SPI' ): irq_in = irq.srcid
1506	if ( irq_in == 0xFFFFFFFF ):
1507	print '[genmap error] in netbsd.dts()'
1508	print ' ISR_SPI not found'
1509	sys.exit(1)
1510
1511	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1512	s += ' device_type = "soclib:spi";\n'
1513	s += ' irq = <&{/%s@0x%x} %d>;\n' % (irq_tgt.pseg.name,irq_tgt.pseg.base,irq_in)
1514	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1515	s += ' };\n'
1516
1517	# research ROM component
1518	elif ( periph.ptype == 'ROM' ):
1519
1520	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1521	s += ' device_type = "rom";\n'
1522	s += ' cached = <1>;\n'
1523	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1524	s += ' };\n'
1525
1526	# research SIM component
1527	elif ( periph.ptype == 'SIM' ):
1528
1529	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1530	s += ' device_type = "soclib:simhelper";\n'
1531	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1532	s += ' };\n'
1533
1534	# research TTY component
1535	elif ( periph.ptype == 'TTY' ):
1536
1537	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1538	s += ' device_type = "soclib:tty";\n'
1539	s += ' channel_count = < %d >;\n' % periph.channels
1540	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1541
1542	# multi-channels : get HWI index (to XCU or PIC) for each channel
1543	for channel in xrange( periph.channels ):
1544	hwi_id = 0xFFFFFFFF
1545	for irq in irq_tgt.irqs:
1546	if ( (irq.isrtype == 'ISR_TTY_RX') and (irq.channel == channel) ):
1547	hwi_id = irq.srcid
1548	if ( hwi_id == 0xFFFFFFFF ):
1549	print '[genmap error] in netbsd.dts()'
1550	print ' ISR_TTY_RX channel %d not found' % channel
1551	sys.exit(1)
1552
1553	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
1554	s += ' irq@%d{\n' % channel
1555	s += ' device_type = "soclib:periph:irq";\n'
1556	s += ' output_line = <%d>;\n' % channel
1557	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
1558	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
1559	s += ' };\n'
1560
1561	s += ' };\n'
1562
1563	# research IOB component
1564	elif ( periph.ptype == 'IOB' ):
1565
1566	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1567	s += ' device_type = "soclib:iob";\n'
1568	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1569	s += ' };\n'
1570
1571	# research NIC component
1572	elif ( periph.ptype == 'NIC' ):
1573
1574	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1575	s += ' device_type = "soclib:nic";\n'
1576	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1577	s += ' channel_count = < %d >;\n' % periph.channels
1578
1579	# multi-channels : get HWI index (to XCU or PIC) for RX & TX IRQs
1580	# RX IRQ : (2channel) / TX IRQs : (2channel + 1)
1581	for channel in xrange( periph.channels ):
1582	hwi_id = 0xFFFFFFFF
1583	for irq in irq_tgt.irqs:
1584	if ( (irq.isrtype == 'ISR_NIC_RX') and (irq.channel == channel) ):
1585	hwi_id = irq.srcid
1586	if ( hwi_id == 0xFFFFFFFF ):
1587	print '[genmap error] in netbsd.dts()'
1588	print ' ISR_NIC_RX channel %d not found' % channel
1589	sys.exit(1)
1590
1591	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
1592	s += ' irq_rx@%d{\n' % channel
1593	s += ' device_type = "soclib:periph:irq";\n'
1594	s += ' output_line = <%d>;\n' % (2*channel)
1595	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
1596	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
1597	s += ' };\n'
1598
1599	hwi_id = 0xFFFFFFFF
1600	for irq in irq_tgt.irqs:
1601	if ( (irq.isrtype == 'ISR_NIC_TX') and (irq.channel == channel) ):
1602	hwi_id = irq.srcid
1603	if ( hwi_id == 0xFFFFFFFF ):
1604	print '[genmap error] in netbsd.dts()'
1605	print ' ISR_NIC_TX channel %d not found' % channel
1606	sys.exit(1)
1607
1608	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
1609	s += ' irq_tx@%d{\n' % channel
1610	s += ' device_type = "soclib:periph:irq";\n'
1611	s += ' output_line = <%d>;\n' % (2*channel + 1)
1612	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
1613	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
1614	s += ' };\n'
1615
1616	s += ' };\n'
1617
1618	# research CMA component
1619	elif ( periph.ptype == 'CMA' ):
1620
1621	s += ' %s@0x%x {\n' % (periph.pseg.name, periph.pseg.base)
1622	s += ' device_type = "soclib:cma";\n'
1623	s += ' reg = <0x%x 0x%x 0x%x>;\n' % (msb, lsb, size)
1624	s += ' channel_count = < %d >;\n' % periph.channels
1625
1626	# multi-channels : get HWI index (to XCU or PIC) for each channel
1627	for channel in xrange( periph.channels ):
1628	hwi_id = 0xFFFFFFFF
1629	for irq in irq_tgt.irqs:
1630	if ( (irq.isrtype == 'ISR_CMA') and (irq.channel == channel) ):
1631	hwi_id = irq.srcid
1632
1633	if ( hwi_id == 0xFFFFFFFF ):
1634	print '[genmap error] in netbsd.dts()'
1635	print ' ISR_CMA channel %d not found' % channel
1636	sys.exit(1)
1637
1638	name = '%s@0x%x' % (irq_tgt.pseg.name, irq_tgt.pseg.base)
1639	s += ' irq@%d{\n' % channel
1640	s += ' device_type = "soclib:periph:irq";\n'
1641	s += ' output_line = <%d>;\n' % channel
1642	s += ' irq = <&{/%s} %d>;\n' % (name, hwi_id)
1643	s += ' parent = <&{/%s@0x%x}>;\n' % (periph.pseg.name, periph.pseg.base)
1644	s += ' };\n'
1645
1646	s += ' };\n'
1647
1648	# research TIM component
1649	elif ( periph.ptype == 'TIM' ):
1650
1651	print '[genmap error] in netbsd_dts()'
1652	print ' TIM peripheral not supported by NetBSD'
1653	sys.exit(1)
1654
1655	# research MWR component
1656	elif ( periph.ptype == 'MWR' ):
1657
1658	print '[genmap error] in netbsd_dts()'
1659	print ' MWR peripheral not supported by NetBSD'
1660	sys.exit(1)
1661
1662	# topology
1663	s += '\n'
1664	s += ' topology {\n'
1665	s += ' #address-cells = <2>;\n'
1666	s += ' #size-cells = <0>;\n'
1667	for cluster in self.clusters:
1668	s += ' cluster@%d,%d {\n' % (cluster.x, cluster.y)
1669	s += ' reg = <%d %d>;\n' % (cluster.x, cluster.y)
1670	s += ' devices = <\n'
1671
1672	offset = ((cluster.x << self.y_width) + cluster.y) << self.p_width
1673	for proc in cluster.procs:
1674	s += ' &{/cpus/Mips,32@0x%x}\n' % (offset + proc.lpid)
1675	for periph in cluster.periphs:
1676	s += ' &{/%s@0x%x}\n' % (periph.pseg.name, periph.pseg.base)
1677	for pseg in cluster.psegs:
1678	if ( pseg.segtype == 'RAM' ):
1679	s += ' &{/%s@0x%x}\n' % (pseg.name, pseg.base)
1680
1681	s += ' >;\n'
1682	s += ' };\n'
1683	s += ' };\n'
1684	s += '};\n'
1685
1686	return s
1687	# end netbsd_dts()
1688
1689	###########################
1690	def almos_archinfo( self ): # compute string for arch.info file generation,
1691	# used for almos configuration
1692	# header
1693	s = '# arch.info file generated by genmap for %s\n' % self.name
1694	s += '\n'
1695	s += '[HEADER]\n'
1696	s += ' REVISION=1\n'
1697	s += ' ARCH=%s\n' % self.name
1698	s += ' XMAX=%d\n' % self.x_size
1699	s += ' YMAX=%d\n' % self.y_size
1700	s += ' CPU_NR=%d\n' % self.nprocs
1701	s += '\n'
1702
1703	# clusters
1704	cluster_id = 0
1705	for cluster in self.clusters:
1706
1707	ram = None
1708	nb_cpus = len( cluster.procs )
1709	nb_devs = len( cluster.periphs )
1710
1711	# search a RAM
1712	for pseg in cluster.psegs:
1713	if ( pseg.segtype == 'RAM' ):
1714	ram = pseg
1715	nb_devs += 1
1716
1717	# search XCU to get IRQs indexes if cluster contains peripherals
1718	if ( len( cluster.periphs ) != 0 ):
1719	tty_irq_id = None
1720	bdv_irq_id = None
1721	dma_irq_id = None
1722
1723	for periph in cluster.periphs:
1724	if ( periph.ptype == 'XCU' ):
1725	# scan irqs
1726	for irq in periph.irqs:
1727	if ( irq.isrtype == 'ISR_TTY_RX' ) : tty_irq_id = irq.srcid
1728	if ( irq.isrtype == 'ISR_BDV' ) : bdv_irq_id = irq.srcid
1729	if ( irq.isrtype == 'ISR_DMA' ) : dma_irq_id = irq.srcid
1730
1731	# Build the cluster description
1732	s += '[CLUSTER]\n'
1733	s += ' CID=%d\n' % cluster_id
1734	s += ' ARCH_CID=0x%x\n' % ((cluster.x << self.y_width) + cluster.y)
1735	s += ' CPU_NR=%d\n' % nb_cpus
1736	s += ' DEV_NR=%d\n' % nb_devs
1737
1738
1739	# Handling RAM when cluster contain a RAM
1740	if (ram != None ):
1741	base = ram.base
1742	size = ram.size
1743	irqid = -1
1744	s += ' DEVID=RAM'
1745	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
1746
1747	# Handling peripherals
1748	for periph in cluster.periphs:
1749	base = periph.pseg.base
1750	size = periph.pseg.size
1751
1752	if ( periph.ptype == 'XCU' ):
1753
1754	s += ' DEVID=XICU'
1755	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
1756
1757	elif ( (periph.ptype == 'TTY')
1758	and (tty_irq_id != None) ):
1759
1760	s += ' DEVID=TTY'
1761	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, tty_irq_id )
1762
1763	elif ( (periph.ptype == 'DMA')
1764	and (dma_irq_id != None) ):
1765
1766	s += ' DEVID=DMA'
1767	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, dma_irq_id )
1768
1769	elif ( periph.ptype == 'FBF' ):
1770
1771	s += ' DEVID=FB'
1772	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
1773
1774	elif ( (periph.ptype == 'IOC') and (periph.subtype == 'BDV')
1775	and (bdv_irq_id != None) ):
1776
1777	s += ' DEVID=BLKDEV'
1778	s += ' BASE=0x%x SIZE=0x%x IRQ=%d\n' % ( base, size, bdv_irq_id )
1779
1780	elif ( periph.ptype == 'PIC' ):
1781
1782	s += ' DEVID=IOPIC'
1783	s += ' BASE=0x%x SIZE=0x%x IRQ=-1\n' % ( base, size )
1784
1785	else:
1786	print '# Warning from almos_archinfo() in cluster[%d,%d]' \
1787	% (cluster.x, cluster.y)
1788	print '# peripheral type %s/%s not supported yet\n' \
1789	% ( periph.ptype, periph.subtype )
1790
1791	cluster_id += 1
1792
1793	return s
1794
1795	# end of almos_archinfo()
1796
1797
1798
1799
1800
1801
1802
1803
1804	###########################################################################################
1805	class Cluster ( object ):
1806	###########################################################################################
1807	def __init__( self,
1808	x,
1809	y ):
1810
1811	self.index = 0 # global index (set by Mapping constructor)
1812	self.x = x # x coordinate
1813	self.y = y # y coordinate
1814	self.psegs = [] # filled by addRam() or addPeriph()
1815	self.procs = [] # filled by addProc()
1816	self.periphs = [] # filled by addPeriph()
1817
1818	return
1819
1820	################
1821	def xml( self ): # xml for a cluster
1822
1823	s = ' <cluster x="%d" y="%d" >\n' % (self.x, self.y)
1824	for pseg in self.psegs: s += pseg.xml()
1825	for proc in self.procs: s += proc.xml()
1826	for peri in self.periphs: s += peri.xml()
1827	s += ' </cluster>\n'
1828
1829	return s
1830
1831	#############################################
1832	def cbin( self, mapping, verbose, expected ): # C binary structure for Cluster
1833
1834	if ( verbose ):
1835	print '*** cbin for cluster [%d,%d]' % (self.x, self.y)
1836
1837	# check index
1838	if (self.index != expected):
1839	print '[genmap error] in Cluster.cbin()'
1840	print ' cluster global index = %d / expected = %d' % (self.index,expected)
1841	sys.exit(1)
1842
1843	# compute global index for first pseg
1844	if ( len(self.psegs) > 0 ):
1845	pseg_id = self.psegs[0].index
1846	else:
1847	pseg_id = 0
1848
1849	# compute global index for first proc
1850	if ( len(self.procs) > 0 ):
1851	proc_id = self.procs[0].index
1852	else:
1853	proc_id = 0
1854
1855	# compute global index for first periph
1856	if ( len(self.periphs) > 0 ):
1857	periph_id = self.periphs[0].index
1858	else:
1859	periph_id = 0
1860
1861	byte_stream = bytearray()
1862	byte_stream += mapping.int2bytes( 4 , self.x ) # x coordinate
1863	byte_stream += mapping.int2bytes( 4 , self.y ) # x coordinate
1864	byte_stream += mapping.int2bytes( 4 , len( self.psegs ) ) # number psegs in cluster
1865	byte_stream += mapping.int2bytes( 4 , pseg_id ) # first pseg global index
1866	byte_stream += mapping.int2bytes( 4 , len( self.procs ) ) # number procs in cluster
1867	byte_stream += mapping.int2bytes( 4 , proc_id ) # first proc global index
1868	byte_stream += mapping.int2bytes( 4 , len( self.periphs ) ) # number periphs in cluster
1869	byte_stream += mapping.int2bytes( 4 , periph_id ) # first periph global index
1870
1871	if ( verbose ):
1872	print 'nb_psegs = %d' % len( self.psegs )
1873	print 'pseg_id = %d' % pseg_id
1874	print 'nb_procs = %d' % len( self.procs )
1875	print 'proc_id = %d' % proc_id
1876	print 'nb_periphs = %d' % len( self.periphs )
1877	print 'periph_id = %d' % periph_id
1878
1879	return byte_stream
1880
1881	########################################################################################
1882	class Vspace( object ):
1883	########################################################################################
1884	def __init__( self,
1885	name,
1886	startname ):
1887
1888	self.index = 0 # global index ( set by addVspace() )
1889	self.name = name # vspace name
1890	self.startname = startname # name of vseg containing the start_vector
1891	self.vsegs = []
1892	self.tasks = []
1893
1894	return
1895
1896	################
1897	def xml( self ): # xml for one vspace
1898
1899	s = ' <vspace name="%s" startname="%s" >\n' % ( self.name, self.startname )
1900	for vseg in self.vsegs: s += vseg.xml()
1901	for task in self.tasks: s += task.xml()
1902	s += ' </vspace>\n'
1903
1904	return s
1905
1906	#############################################
1907	def cbin( self, mapping, verbose, expected ): # C binary structure for Vspace
1908
1909	if ( verbose ):
1910	print '*** cbin for vspace %s' % (self.name)
1911
1912	# check index
1913	if (self.index != expected):
1914	print '[genmap error] in Vspace.cbin()'
1915	print ' vspace global index = %d / expected = %d' %(self.index,expected)
1916	sys.exit(1)
1917
1918	# compute global index for vseg containing start_vector
1919	vseg_start_id = 0xFFFFFFFF
1920	for vseg in self.vsegs:
1921	if ( vseg.name == self.startname ): vseg_start_id = vseg.index
1922
1923	if ( vseg_start_id == 0xFFFFFFFF ):
1924	print '[genmap error] in Vspace.cbin()'
1925	print ' startname %s not found for vspace %s' %(self.startname,self.name)
1926	sys.exit(1)
1927
1928	# compute first vseg and first task global index
1929	first_vseg_id = self.vsegs[0].index
1930	first_task_id = self.tasks[0].index
1931
1932	# compute number of tasks and number of vsegs
1933	nb_vsegs = len( self.vsegs )
1934	nb_tasks = len( self.tasks )
1935
1936	byte_stream = bytearray()
1937	byte_stream += mapping.str2bytes( 32, self.name ) # vspace name
1938	byte_stream += mapping.int2bytes( 4, vseg_start_id ) # vseg start_vector
1939	byte_stream += mapping.int2bytes( 4, nb_vsegs ) # number of vsegs
1940	byte_stream += mapping.int2bytes( 4, nb_tasks ) # number of tasks
1941	byte_stream += mapping.int2bytes( 4, first_vseg_id ) # first vseg global index
1942	byte_stream += mapping.int2bytes( 4, first_task_id ) # first task global index
1943
1944	if ( verbose ):
1945	print 'start_id = %d' % vseg_start_id
1946	print 'nb_vsegs = %d' % nb_vsegs
1947	print 'nb_tasks = %d' % nb_tasks
1948	print 'vseg_id = %d' % first_vseg_id
1949	print 'task_id = %d' % first_task_id
1950
1951	return byte_stream
1952
1953	########################################################################################
1954	class Task( object ):
1955	########################################################################################
1956	def __init__( self,
1957	name,
1958	trdid,
1959	x,
1960	y,
1961	p,
1962	stackname,
1963	heapname,
1964	startid ):
1965
1966	self.index = 0 # global index value set by addTask()
1967	self.name = name # tsk name
1968	self.trdid = trdid # task index (unique in vspace)
1969	self.x = x # cluster x coordinate
1970	self.y = y # cluster y coordinate
1971	self.p = p # processor local index
1972	self.stackname = stackname # name of vseg containing the stack
1973	self.heapname = heapname # name of vseg containing the heap
1974	self.startid = startid # index in start_vector
1975	return
1976
1977	################
1978	def xml( self ): # xml for one task
1979
1980	s = ' <task name="%s"' % self.name
1981	s += ' trdid="%d"' % self.trdid
1982	s += ' x="%d"' % self.x
1983	s += ' y="%d"' % self.y
1984	s += ' p="%d"' % self.p
1985	s += '\n '
1986	s += ' stackname="%s"' % self.stackname
1987	s += ' heapname="%s"' % self.heapname
1988	s += ' startid="%d"' % self.startid
1989	s += ' />\n'
1990
1991	return s
1992
1993	#####################################################
1994	def cbin( self, mapping, verbose, expected, vspace ): # C binary data structure for Task
1995
1996	if ( verbose ):
1997	print '*** cbin for task %s in vspace %s' % (self.name, vspace.name)
1998
1999	# check index
2000	if (self.index != expected):
2001	print '[genmap error] in Task.cbin()'
2002	print ' task global index = %d / expected = %d' %(self.index,expected)
2003	sys.exit(1)
2004
2005	# compute cluster global index
2006	cluster_id = (self.x * mapping.y_size) + self.y
2007
2008	# compute vseg index for stack
2009	vseg_stack_id = 0xFFFFFFFF
2010	for vseg in vspace.vsegs:
2011	if ( vseg.name == self.stackname ): vseg_stack_id = vseg.index
2012
2013	if ( vseg_stack_id == 0xFFFFFFFF ):
2014	print '[genmap error] in Task.cbin()'
2015	print ' stackname %s not found for task %s in vspace %s' \
2016	% ( self.stackname, self.name, vspace.name )
2017	sys.exit(1)
2018
2019	# compute vseg index for heap
2020	if ( self.heapname == '' ):
2021	vseg_heap_id = 0
2022	else:
2023	vseg_heap_id = 0xFFFFFFFF
2024	for vseg in vspace.vsegs:
2025	if ( vseg.name == self.heapname ): vseg_heap_id = vseg.index
2026
2027	if ( vseg_heap_id == 0xFFFFFFFF ):
2028	print '[genmap error] in Task.cbin()'
2029	print ' heapname %s not found for task %s in vspace %s' \
2030	% ( self.heapname, self.name, vspace.name )
2031	sys.exit(1)
2032
2033	byte_stream = bytearray()
2034	byte_stream += mapping.str2bytes( 32, self.name ) # task name in vspace
2035	byte_stream += mapping.int2bytes( 4, cluster_id ) # cluster global index
2036	byte_stream += mapping.int2bytes( 4, self.p ) # processor local index
2037	byte_stream += mapping.int2bytes( 4, self.trdid ) # thread local index in vspace
2038	byte_stream += mapping.int2bytes( 4, vseg_stack_id ) # stack vseg local index
2039	byte_stream += mapping.int2bytes( 4, vseg_heap_id ) # heap vseg local index
2040	byte_stream += mapping.int2bytes( 4, self.startid ) # index in start vector
2041
2042	if ( verbose ):
2043	print 'clusterid = %d' % cluster_id
2044	print 'lpid = %d' % self.p
2045	print 'trdid = %d' % self.trdid
2046	print 'stackid = %d' % vseg_stack_id
2047	print 'heapid = %d' % vseg_heap_id
2048	print 'startid = %d' % self.startid
2049
2050	return byte_stream
2051
2052	########################################################################################
2053	class Vseg( object ):
2054	########################################################################################
2055	def __init__( self,
2056	name,
2057	vbase,
2058	length,
2059	mode,
2060	vtype,
2061	x,
2062	y,
2063	pseg,
2064	identity = False,
2065	local = False,
2066	big = False,
2067	binpath = '' ):
2068
2069	assert (vbase & 0xFFFFFFFF) == vbase
2070
2071	assert (length & 0xFFFFFFFF) == length
2072
2073	assert mode in VSEGMODES
2074
2075	assert vtype in VSEGTYPES
2076
2077	assert (vtype != 'ELF') or (binpath != '')
2078
2079	self.index = 0 # global index ( set by addVseg() )
2080	self.name = name # vseg name (unique in vspace)
2081	self.vbase = vbase # virtual base address in vspace
2082	self.length = length # vseg length (bytes)
2083	self.vtype = vtype # vseg type (defined in VSEGTYPES)
2084	self.mode = mode # CXWU access rights
2085	self.x = x # x coordinate of destination cluster
2086	self.y = y # y coordinate of destination cluster
2087	self.psegname = pseg # name of pseg in destination cluster
2088	self.identity = identity # identity mapping required
2089	self.local = local # only mapped in local PTAB when true
2090	self.big = big # to be mapped in a big physical page
2091	self.binpath = binpath # path name for binary file (ELF or BLOB)
2092
2093	return
2094
2095	################
2096	def xml( self ): # xml for one vseg
2097
2098	s = ' <vseg name="%s"' %(self.name)
2099	s += ' vbase="0x%x"' %(self.vbase)
2100	s += ' length="0x%x"' %(self.length)
2101	s += ' type="%s"' %(self.vtype)
2102	s += ' mode="%s"' %(self.mode)
2103	s += '\n '
2104	s += ' x="%d"' %(self.x)
2105	s += ' y="%d"' %(self.y)
2106	s += ' psegname="%s"' %(self.psegname)
2107	if ( self.identity ): s += ' ident="1"'
2108	if ( self.local ): s += ' local="1"'
2109	if ( self.big ): s += ' big="1"'
2110	if ( self.binpath != '' ): s += ' binpath="%s"' %(self.binpath)
2111	s += ' />\n'
2112
2113	return s
2114
2115	#############################################
2116	def cbin( self, mapping, verbose, expected ): # C binary structure for Vseg
2117
2118	if ( verbose ):
2119	print '*** cbin for vseg[%d] %s' % (self.index, self.name)
2120
2121	# check index
2122	if (self.index != expected):
2123	print '[genmap error] in Vseg.cbin()'
2124	print ' vseg global index = %d / expected = %d' \
2125	% (self.index, expected )
2126	sys.exit(1)
2127
2128	# compute pseg_id
2129	pseg_id = 0xFFFFFFFF
2130	cluster_id = (self.x * mapping.y_size) + self.y
2131	cluster = mapping.clusters[cluster_id]
2132	for pseg in cluster.psegs:
2133	if (self.psegname == pseg.name):
2134	pseg_id = pseg.index
2135	if (pseg_id == 0xFFFFFFFF):
2136	print '[genmap error] in Vseg.cbin() : '
2137	print ' psegname %s not found for vseg %s in cluster %d' \
2138	% ( self.psegname, self.name, cluster_id )
2139	sys.exit(1)
2140
2141	# compute numerical value for mode
2142	mode_id = 0xFFFFFFFF
2143	for x in xrange( len(VSEGMODES) ):
2144	if ( self.mode == VSEGMODES[x] ):
2145	mode_id = x
2146	if ( mode_id == 0xFFFFFFFF ):
2147	print '[genmap error] in Vseg.cbin() : '
2148	print ' undefined vseg mode %s' % self.mode
2149	sys.exit(1)
2150
2151	# compute numerical value for vtype
2152	vtype_id = 0xFFFFFFFF
2153	for x in xrange( len(VSEGTYPES) ):
2154	if ( self.vtype == VSEGTYPES[x] ):
2155	vtype_id = x
2156	if ( vtype_id == 0xFFFFFFFF ):
2157	print '[genmap error] in Vseg.cbin()'
2158	print ' undefined vseg type %s' % self.vtype
2159	sys.exit(1)
2160
2161	byte_stream = bytearray()
2162	byte_stream += mapping.str2bytes( 32, self.name ) # vseg name
2163	byte_stream += mapping.str2bytes( 64, self.binpath ) # binpath
2164	byte_stream += mapping.int2bytes( 4, self.vbase ) # virtual base address
2165	byte_stream += mapping.int2bytes( 8, 0 ) # physical base address
2166	byte_stream += mapping.int2bytes( 4, self.length ) # vseg size (bytes)
2167	byte_stream += mapping.int2bytes( 4, pseg_id ) # pseg global index
2168	byte_stream += mapping.int2bytes( 4, mode_id ) # CXWU flags
2169	byte_stream += mapping.int2bytes( 4, vtype_id ) # vseg type
2170	byte_stream += mapping.int2bytes( 1, 0 ) # mapped when non zero
2171	byte_stream += mapping.int2bytes( 1, self.identity ) # identity mapping
2172	byte_stream += mapping.int2bytes( 1, self.local ) # only mapped in local PTAB
2173	byte_stream += mapping.int2bytes( 1, self.big ) # to be mapped in BPP
2174
2175	if ( verbose ):
2176	print 'binpath = %s' % self.binpath
2177	print 'vbase = %x' % self.vbase
2178	print 'pbase = 0'
2179	print 'length = %x' % self.length
2180	print 'pseg_id = %d' % pseg_id
2181	print 'mode = %d' % mode_id
2182	print 'type = %d' % vtype_id
2183	print 'mapped = 0'
2184	print 'ident = %d' % self.identity
2185	print 'local = %d' % self.local
2186	print 'big = %d' % self.big
2187
2188	return byte_stream
2189
2190	######################################################################################
2191	class Processor ( object ):
2192	######################################################################################
2193	def __init__( self,
2194	x,
2195	y,
2196	lpid ):
2197
2198	self.index = 0 # global index ( set by addProc() )
2199	self.x = x # x cluster coordinate
2200	self.y = y # y cluster coordinate
2201	self.lpid = lpid # processor local index
2202
2203	return
2204
2205	################
2206	def xml( self ): # xml for a processor
2207	return ' <proc index="%d" />\n' % (self.lpid)
2208
2209	#############################################
2210	def cbin( self, mapping, verbose, expected ): # C binary structure for Proc
2211
2212	if ( verbose ):
2213	print '*** cbin for proc %d in cluster (%d,%d)' % (self.lpid, self.x, self.y)
2214
2215	# check index
2216	if (self.index != expected):
2217	print '[genmap error] in Proc.cbin()'
2218	print ' proc global index = %d / expected = %d' % (self.index,expected)
2219	sys.exit(1)
2220
2221	byte_stream = bytearray()
2222	byte_stream += mapping.int2bytes( 4 , self.lpid ) # local index
2223
2224	return byte_stream
2225
2226	######################################################################################
2227	class Pseg ( object ):
2228	######################################################################################
2229	def __init__( self,
2230	name,
2231	base,
2232	size,
2233	x,
2234	y,
2235	segtype ):
2236
2237	assert( segtype in PSEGTYPES )
2238
2239	self.index = 0 # global index ( set by addPseg() )
2240	self.name = name # pseg name (unique in cluster)
2241	self.base = base # physical base address
2242	self.size = size # segment size (bytes)
2243	self.x = x # cluster x coordinate
2244	self.y = y # cluster y coordinate
2245	self.segtype = segtype # RAM / PERI (defined in mapping_info.h)
2246
2247	return
2248
2249	################
2250	def xml( self ): # xml for a pseg
2251
2252	return ' <pseg name="%s" type="%s" base="0x%x" length="0x%x" />\n' \
2253	% (self.name, self.segtype, self.base, self.size)
2254
2255	######################################################
2256	def cbin( self, mapping, verbose, expected, cluster ): # C binary structure for Pseg
2257
2258	if ( verbose ):
2259	print '*** cbin for pseg[%d] %s in cluster[%d,%d]' \
2260	% (self.index, self.name, cluster.x, cluster.y)
2261
2262	# check index
2263	if (self.index != expected):
2264	print '[genmap error] in Pseg.cbin()'
2265	print ' pseg global index = %d / expected = %d' % (self.index,expected)
2266	sys.exit(1)
2267
2268	# compute numerical value for segtype
2269	segtype_int = 0xFFFFFFFF
2270	for x in xrange( len(PSEGTYPES) ):
2271	if ( self.segtype == PSEGTYPES[x] ): segtype_int = x
2272
2273	if ( segtype_int == 0xFFFFFFFF ):
2274	print '[genmap error] in Pseg.cbin()'
2275	print ' undefined segment type %s' % self.segtype
2276	sys.exit(1)
2277
2278	byte_stream = bytearray()
2279	byte_stream += mapping.str2bytes( 32, self.name ) # pseg name
2280	byte_stream += mapping.int2bytes( 8 , self.base ) # physical base address
2281	byte_stream += mapping.int2bytes( 8 , self.size ) # segment length
2282	byte_stream += mapping.int2bytes( 4 , segtype_int ) # segment type
2283	byte_stream += mapping.int2bytes( 4 , cluster.index ) # cluster global index
2284	byte_stream += mapping.int2bytes( 4 , 0 ) # linked list of vsegs
2285
2286	if ( verbose ):
2287	print 'pbase = %x' % self.base
2288	print 'size = %x' % self.size
2289	print 'type = %s' % self.segtype
2290
2291	return byte_stream
2292
2293	######################################################################################
2294	class Periph ( object ):
2295	######################################################################################
2296	def __init__( self,
2297	pseg, # associated pseg
2298	ptype, # peripheral type
2299	subtype = 'NONE', # peripheral subtype
2300	channels = 1, # for multi-channels peripherals
2301	arg0 = 0, # optional argument (semantic depends on ptype)
2302	arg1 = 0, # optional argument (semantic depends on ptype)
2303	arg2 = 0, # optional argument (semantic depends on ptype)
2304	arg3 = 0 ): # optional argument (semantic depends on ptype)
2305
2306	self.index = 0 # global index ( set by addPeriph() )
2307	self.channels = channels
2308	self.ptype = ptype
2309	self.subtype = subtype
2310	self.arg0 = arg0
2311	self.arg1 = arg1
2312	self.arg2 = arg2
2313	self.arg3 = arg3
2314	self.pseg = pseg
2315	self.irqs = []
2316	return
2317
2318	################
2319	def xml( self ): # xml for a periph
2320
2321	s = ' <periph type="%s"' % self.ptype
2322	s += ' subtype="%s"' % self.subtype
2323	s += ' psegname="%s"' % self.pseg.name
2324	s += ' channels="%d"' % self.channels
2325	s += ' arg0="%d"' % self.arg0
2326	s += ' arg1="%d"' % self.arg1
2327	s += ' arg2="%d"' % self.arg2
2328	s += ' arg3="%d"' % self.arg3
2329	if ( (self.ptype == 'PIC') or (self.ptype == 'XCU') ):
2330	s += ' >\n'
2331	for irq in self.irqs: s += irq.xml()
2332	s += ' </periph>\n'
2333	else:
2334	s += ' />\n'
2335	return s
2336
2337	#############################################
2338	def cbin( self, mapping, verbose, expected ): # C binary structure for Periph
2339
2340	if ( verbose ):
2341	print '*** cbin for periph %s in cluster [%d,%d]' \
2342	% (self.ptype, self.pseg.x, self.pseg.y)
2343
2344	# check index
2345	if (self.index != expected):
2346	print '[genmap error] in Periph.cbin()'
2347	print ' periph global index = %d / expected = %d' % (self.index,expected)
2348	sys.exit(1)
2349
2350	# compute pseg global index
2351	pseg_id = self.pseg.index
2352
2353	# compute first irq global index
2354	if ( len(self.irqs) > 0 ):
2355	irq_id = self.irqs[0].index
2356	else:
2357	irq_id = 0
2358
2359	# compute numerical value for ptype
2360	ptype_id = 0xFFFFFFFF
2361	for x in xrange( len(PERIPHTYPES) ):
2362	if ( self.ptype == PERIPHTYPES[x] ): ptype_id = x
2363
2364	if ( ptype_id == 0xFFFFFFFF ):
2365	print '[genmap error] in Periph.cbin()'
2366	print ' undefined peripheral type %s' % self.ptype
2367	sys.exit(1)
2368
2369	# compute numerical value for subtype
2370	subtype_id = 0xFFFFFFFF
2371	if (self.ptype == 'IOC'):
2372	for x in xrange( len(IOCSUBTYPES) ):
2373	if ( self.subtype == IOCSUBTYPES[x] ): subtype_id = x
2374	if (self.ptype == 'MWR'):
2375	for x in xrange( len(MWRSUBTYPES) ):
2376	if ( self.subtype == MWRSUBTYPES[x] ): subtype_id = x
2377
2378	byte_stream = bytearray()
2379	byte_stream += mapping.int2bytes( 4 , ptype_id ) # peripheral type
2380	byte_stream += mapping.int2bytes( 4 , subtype_id ) # peripheral subtype
2381	byte_stream += mapping.int2bytes( 4 , pseg_id ) # pseg global index
2382	byte_stream += mapping.int2bytes( 4 , self.channels ) # number of channels
2383	byte_stream += mapping.int2bytes( 4 , self.arg0 ) # optionnal arg0
2384	byte_stream += mapping.int2bytes( 4 , self.arg1 ) # optionnal arg1
2385	byte_stream += mapping.int2bytes( 4 , self.arg2 ) # optionnal arg2
2386	byte_stream += mapping.int2bytes( 4 , self.arg3 ) # optionnal arg3
2387	byte_stream += mapping.int2bytes( 4 , len( self.irqs ) ) # number of input irqs
2388	byte_stream += mapping.int2bytes( 4 , irq_id ) # first irq global index
2389
2390	if ( verbose ):
2391	print 'ptype = %d' % ptype_id
2392	print 'subtype = %d' % subtype_id
2393	print 'pseg_id = %d' % pseg_id
2394	print 'nb_irqs = %d' % len( self.irqs )
2395	print 'irq_id = %d' % irq_id
2396	return byte_stream
2397
2398	######################################################################################
2399	class Irq ( object ):
2400	######################################################################################
2401	def __init__( self,
2402	irqtype, # input IRQ type : HWI / WTI / PTI (for XCU only)
2403	srcid, # input IRQ index (for XCU or PIC)
2404	isrtype, # Type of ISR to be executed
2405	channel = 0 ): # channel index for multi-channel ISR
2406
2407	assert irqtype in IRQTYPES
2408	assert isrtype in ISRTYPES
2409	assert srcid < 32
2410
2411	self.index = 0 # global index ( set by addIrq() )
2412	self.irqtype = irqtype # IRQ type
2413	self.srcid = srcid # source IRQ index
2414	self.isrtype = isrtype # ISR type
2415	self.channel = channel # channel index (for multi-channels ISR)
2416	return
2417
2418	################
2419	def xml( self ): # xml for Irq
2420
2421	return ' <irq srctype="%s" srcid="%d" isr="%s" channel="%d" />\n' \
2422	% ( self.irqtype, self.srcid, self.isrtype, self.channel )
2423
2424	#############################################
2425	def cbin( self, mapping, verbose, expected ): # C binary structure for Irq
2426
2427	if ( verbose ):
2428	print '*** cbin for irq[%d]' % (self.index)
2429
2430	# check index
2431	if (self.index != expected):
2432	print '[genmap error] in Irq.cbin()'
2433	print ' irq global index = %d / expected = %d' % (self.index,expected)
2434	sys.exit(1)
2435
2436	# compute numerical value for irqtype
2437	irqtype_id = 0xFFFFFFFF
2438	for x in xrange( len(IRQTYPES) ):
2439	if ( self.irqtype == IRQTYPES[x] ): irqtype_id = x
2440
2441	if ( irqtype_id == 0xFFFFFFFF ):
2442	print '[genmap error] in Irq.cbin()'
2443	print ' undefined irqtype %s' % self.irqtype
2444	sys.exit(1)
2445
2446	# compute numerical value for isrtype
2447	isrtype_id = 0xFFFFFFFF
2448	for x in xrange( len(ISRTYPES) ):
2449	if ( self.isrtype == ISRTYPES[x] ): isrtype_id = x
2450
2451	if ( isrtype_id == 0xFFFFFFFF ):
2452	print '[genmap error] in Irq.cbin()'
2453	print ' undefined isrtype %s' % self.isrtype
2454	sys.exit(1)
2455
2456	byte_stream = bytearray()
2457	byte_stream += mapping.int2bytes( 4, irqtype_id )
2458	byte_stream += mapping.int2bytes( 4, self.srcid )
2459	byte_stream += mapping.int2bytes( 4, isrtype_id )
2460	byte_stream += mapping.int2bytes( 4, self.channel )
2461	byte_stream += mapping.int2bytes( 4, 0 )
2462	byte_stream += mapping.int2bytes( 4, 0 )
2463
2464	if ( verbose ):
2465	print 'irqtype = %s' % self.irqtype
2466	print 'srcid = %d' % self.srcid
2467	print 'isrtype = %s' % self.isrtype
2468	print 'channel = %d' % self.channel
2469
2470	return byte_stream
2471
2472	# Local Variables:
2473	# tab-width: 4;
2474	# c-basic-offset: 4;
2475	# c-file-offsets:((innamespace . 0)(inline-open . 0));
2476	# indent-tabs-mode: nil;
2477	# End:
2478	#
2479	# vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
2480

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