| 1 | #!/usr/bin/env python |
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| 2 | |
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| 3 | from mapping import * |
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| 4 | |
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| 5 | ####################################################################################### |
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| 6 | # file : tsar_generic_leti.py |
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| 7 | # date : april 2014 |
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| 8 | # author : Alain Greiner |
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| 9 | ####################################################################################### |
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| 10 | # This file contains a mapping generator for the tsar_generic_leti platform. |
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| 11 | # This includes both the hardware architecture (clusters, processors, peripherals, |
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| 12 | # physical space segmentation) and the mapping of all kernel objects (global vsegs). |
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| 13 | # This platform does not include any external peripherals, but only a block-device |
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| 14 | # controler and a single channel TTY in cluster[0,0]. |
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| 15 | # The parameters are: |
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| 16 | # - x_size : number of clusters in a row |
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| 17 | # - y_size : number of clusters in a column |
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| 18 | # - nb_procs : number of processors per cluster |
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| 19 | ####################################################################################### |
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| 20 | |
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| 21 | ##################################### |
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| 22 | def tsar_generic_leti( x_size = 2, |
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| 23 | y_size = 2, |
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| 24 | nb_procs = 4 ): |
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| 25 | |
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| 26 | ### parameters checking |
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| 27 | |
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| 28 | assert ( nb_procs <= 4 ) |
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| 29 | assert ( (x_size==1) or (x_size==2) or (x_size==4) or (x_size==8) or (x_size==16) ) |
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| 30 | assert ( (y_size==1) or (y_size==2) or (y_size==4) or (y_size==8) ) |
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| 31 | |
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| 32 | ### define architecture constants |
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| 33 | |
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| 34 | platform_name = 'tsar_leti_%d_%d_%d' % (x_size, y_size, nb_procs) |
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| 35 | x_width = 4 |
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| 36 | y_width = 4 |
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| 37 | paddr_width = 40 |
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| 38 | irq_per_proc = 4 |
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| 39 | use_ram_disk = True |
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| 40 | x_io = 0 |
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| 41 | y_io = 0 |
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| 42 | |
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| 43 | ### physical segments |
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| 44 | |
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| 45 | ram_base = 0x0000000000 |
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| 46 | ram_size = 0x4000000 # 64 Mbytes |
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| 47 | |
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| 48 | xcu_base = 0x00F0000000 |
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| 49 | xcu_size = 0x1000 # 4 Kbytes |
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| 50 | |
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| 51 | mmc_base = 0x00E0000000 |
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| 52 | mmc_size = 0x1000 # 4 Kbytes |
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| 53 | |
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| 54 | bdv_base = 0x00F2000000 |
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| 55 | bdv_size = 0x1000 # 4 Kbytes |
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| 56 | |
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| 57 | tty_base = 0x00F4000000 |
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| 58 | tty_size = 0x1000 # 4 Kbytes |
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| 59 | |
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| 60 | ### Global vsegs / identity mapping |
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| 61 | |
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| 62 | reset_vbase = 0x00000000 |
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| 63 | reset_vsize = 0x00010000 # 64 Kbytes |
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| 64 | |
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| 65 | boot_code_vbase = 0x00010000 |
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| 66 | boot_code_vsize = 0x00020000 # 128 Kbytes |
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| 67 | |
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| 68 | boot_data_vbase = 0x00030000 |
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| 69 | boot_data_vsize = 0x00010000 # 64 Kbytes |
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| 70 | |
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| 71 | boot_buffer_vbase = 0x00040000 |
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| 72 | boot_buffer_vsize = 0x00060000 # 384 Kbytes |
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| 73 | |
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| 74 | boot_stack_vbase = 0x000A0000 |
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| 75 | boot_stack_vsize = 0x00050000 # 320 Kbytes |
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| 76 | |
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| 77 | boot_mapping_vbase = 0x000F0000 |
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| 78 | boot_mapping_vsize = 0x00010000 # 64 Kbytes |
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| 79 | |
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| 80 | ram_disk_vbase = 0x02000000 |
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| 81 | ram_disk_vsize = 0x02000000 # 1 Mbytes |
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| 82 | |
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| 83 | ### Global vsegs / no identity mapping |
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| 84 | |
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| 85 | kernel_code_vbase = 0x80000000 |
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| 86 | kernel_code_vsize = 0x00020000 # 128 Kbytes |
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| 87 | |
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| 88 | kernel_data_vbase = 0x80020000 |
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| 89 | kernel_data_vsize = 0x00060000 # 384 Kbytes |
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| 90 | |
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| 91 | kernel_uncdata_vbase = 0x80080000 |
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| 92 | kernel_uncdata_vsize = 0x00040000 # 256 Kbytes |
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| 93 | |
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| 94 | kernel_init_vbase = 0x800C0000 |
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| 95 | kernel_init_vsize = 0x00010000 # 64 Kbytes |
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| 96 | |
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| 97 | kernel_sched_vbase = 0x800D0000 # distributed in all clusters |
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| 98 | kernel_sched_vsize = 0x1000 * nb_procs # 4 kbytes per processor |
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| 99 | |
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| 100 | ### create mapping |
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| 101 | |
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| 102 | mapping = Mapping( name = platform_name, |
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| 103 | x_size = x_size, |
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| 104 | y_size = y_size, |
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| 105 | nb_procs = nb_procs, |
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| 106 | x_width = x_width, |
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| 107 | y_width = y_width, |
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| 108 | paddr_width = paddr_width, |
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| 109 | coherence = True, |
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| 110 | irq_per_proc = irq_per_proc, |
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| 111 | use_ram_disk = use_ram_disk, |
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| 112 | x_io = x_io, |
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| 113 | y_io = y_io ) |
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| 114 | |
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| 115 | ### add components in clusters |
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| 116 | |
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| 117 | for x in xrange( x_size ): |
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| 118 | for y in xrange( y_size ): |
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| 119 | cluster_xy = (x << y_width) + y; |
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| 120 | offset = cluster_xy << (paddr_width - x_width - y_width) |
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| 121 | |
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| 122 | if( (x==0) and (y==0) ): |
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| 123 | bdv = Bdv( 'PSEG_BDV', base = bdv_base , size = bdv_size ) |
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| 124 | mapping.addPeripheral( bdv ) |
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| 125 | |
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| 126 | tty = Tty( 'PSEG_TTY', base = tty_base , size = tty_size , channels = 1 ) |
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| 127 | mapping.addPeripheral( tty ) |
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| 128 | |
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| 129 | ram = Pseg( 'PSEG_RAM', base = ram_base + offset, size = ram_size, segtype = 'RAM' ) |
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| 130 | mapping.addPseg( ram ) |
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| 131 | |
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| 132 | mmc = Mmc( 'PSEG_MMC', base = mmc_base + offset, size = mmc_size ) |
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| 133 | mapping.addPeripheral( mmc ) |
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| 134 | |
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| 135 | xcu = Xcu( 'PSEG_XCU', base = xcu_base + offset, size = xcu_size, channels = nb_procs * irq_per_proc ) |
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| 136 | xcu.add ( XcuIrq ( srctype = 'HWI', srcid = 8 , isrtype = 'ISR_MMC' , dstid = 0 ) ) |
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| 137 | for p in xrange( nb_procs ): |
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| 138 | xcu.add ( XcuIrq ( srctype = 'WTI', srcid = p , isrtype = 'ISR_WAKUP' , dstid = p ) ) |
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| 139 | xcu.add ( XcuIrq ( srctype = 'PTI', srcid = p , isrtype = 'ISR_TICK' , dstid = p ) ) |
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| 140 | if ( (x==0) and (y==0) ): |
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| 141 | xcu.add ( XcuIrq ( srctype = 'HWI', srcid = 9 , isrtype = 'ISR_BDV' , dstid = 0 ) ) |
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| 142 | xcu.add ( XcuIrq ( srctype = 'HWI', srcid = 10 , isrtype = 'ISR_TTY_RX', dstid = 0 ) ) |
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| 143 | mapping.addPeripheral( xcu ) |
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| 144 | |
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| 145 | ### processors |
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| 146 | |
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| 147 | for x in xrange ( x_size ): |
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| 148 | for y in xrange ( y_size ): |
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| 149 | for p in xrange (nb_procs): |
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| 150 | proc = Processor ( x, y, p ) |
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| 151 | mapping.addProc ( proc ) |
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| 152 | |
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| 153 | ### glogal vsegs for Preloader and RamDisk / identity mapping |
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| 154 | |
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| 155 | vseg = Vseg( 'seg_reset_code' , reset_vbase , 'CX__' , 0, 0, 'PSEG_RAM', ident = True ) |
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| 156 | vseg.add ( Vobj( 'reset_code' , reset_vsize , 'BUFFER' ) ) |
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| 157 | mapping.addGlobal( vseg ) |
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| 158 | |
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| 159 | vseg = Vseg( 'seg_ram_disk' , ram_disk_vbase , 'CX__' , 0, 0, 'PSEG_RAM', ident = True ) |
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| 160 | vseg.add ( Vobj( 'reset_code' , ram_disk_vsize , 'BUFFER' ) ) |
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| 161 | mapping.addGlobal( vseg ) |
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| 162 | |
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| 163 | ### global vsegs for boot_loader segments / identity mapping |
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| 164 | |
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| 165 | vseg = Vseg( 'seg_boot_mapping' , boot_mapping_vbase , 'C_W_' , 0, 0, 'PSEG_RAM', ident = True ) |
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| 166 | vseg.add ( Vobj( 'boot_mapping' , boot_mapping_vsize , 'BLOB' , binpath = 'map.bin' ) ) |
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| 167 | mapping.addGlobal( vseg ) |
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| 168 | |
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| 169 | vseg = Vseg( 'seg_boot_code' , boot_code_vbase , 'CXW_' , 0, 0, 'PSEG_RAM', ident = True ) |
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| 170 | vseg.add ( Vobj( 'boot_code' , boot_code_vsize , 'BUFFER' ) ) |
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| 171 | mapping.addGlobal( vseg ) |
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| 172 | |
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| 173 | vseg = Vseg( 'seg_boot_data' , boot_data_vbase , 'C_W_' , 0, 0, 'PSEG_RAM', ident = True ) |
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| 174 | vseg.add ( Vobj( 'boot_data' , boot_data_vsize , 'BUFFER' ) ) |
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| 175 | mapping.addGlobal( vseg ) |
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| 176 | |
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| 177 | vseg = Vseg( 'seg_boot_buffer' , boot_buffer_vbase , 'C_W_' , 0, 0, 'PSEG_RAM', ident = True ) |
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| 178 | vseg.add ( Vobj( 'boot_buffer' , boot_buffer_vsize , 'BUFFER' ) ) |
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| 179 | mapping.addGlobal( vseg ) |
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| 180 | |
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| 181 | vseg = Vseg( 'seg_boot_stack' , boot_stack_vbase , 'C_W_' , 0, 0, 'PSEG_RAM', ident = True ) |
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| 182 | vseg.add ( Vobj( 'boot_stack' , boot_stack_vsize , 'BUFFER' ) ) |
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| 183 | mapping.addGlobal( vseg ) |
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| 184 | |
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| 185 | ### add global vsegs for kernel segments |
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| 186 | |
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| 187 | vseg = Vseg( 'seg_kernel_code' , kernel_code_vbase , 'CXW_' , 0, 0, 'PSEG_RAM' ) |
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| 188 | vseg.add ( Vobj( 'kernel_code' , kernel_code_vsize , 'ELF' , binpath = 'build/kernel/kernel.elf' ) ) |
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| 189 | mapping.addGlobal( vseg ) |
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| 190 | |
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| 191 | vseg = Vseg( 'seg_kernel_data' , kernel_data_vbase , 'C_W_' , 0, 0, 'PSEG_RAM' ) |
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| 192 | vseg.add ( Vobj( 'kernel_data' , kernel_data_vsize , 'ELF' , binpath = 'build/kernel/kernel.elf' ) ) |
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| 193 | mapping.addGlobal( vseg ) |
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| 194 | |
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| 195 | vseg = Vseg( 'seg_kernel_uncdata' , kernel_uncdata_vbase , '__W_' , 0, 0, 'PSEG_RAM' ) |
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| 196 | vseg.add ( Vobj( 'kernel_uncdata' , kernel_uncdata_vsize , 'ELF' , binpath = 'build/kernel/kernel.elf' ) ) |
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| 197 | mapping.addGlobal( vseg ) |
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| 198 | |
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| 199 | vseg = Vseg( 'seg_kernel_init' , kernel_init_vbase , 'CXW_' , 0, 0, 'PSEG_RAM' ) |
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| 200 | vseg.add ( Vobj( 'kernel_init' , kernel_init_vsize , 'ELF' , binpath = 'build/kernel/kernel.elf' ) ) |
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| 201 | mapping.addGlobal( vseg ) |
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| 202 | |
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| 203 | ### global vsegs for for bdv and tty peripherals |
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| 204 | |
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| 205 | vseg = Vseg( 'seg_bdv' , bdv_base , '__W_' , 0, 0, 'PSEG_BDV' ) |
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| 206 | vseg.add ( Vobj( 'bdv' , bdv_size , 'PERI' ) ) |
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| 207 | mapping.addGlobal( vseg ) |
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| 208 | |
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| 209 | vseg = Vseg( 'seg_tty' , tty_base , '__W_' , 0, 0, 'PSEG_TTY' ) |
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| 210 | vseg.add ( Vobj( 'tty' , tty_size , 'PERI' ) ) |
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| 211 | mapping.addGlobal( vseg ) |
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| 212 | |
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| 213 | ### Global vsegs for replicated XCU, MMC and Scheduler |
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| 214 | |
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| 215 | for x in xrange ( x_size ): |
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| 216 | for y in xrange ( y_size ): |
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| 217 | offset = ((x << y_width) + y) << 16 |
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| 218 | |
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| 219 | vseg = Vseg( 'seg_xcu_%d_%d' %(x,y) , xcu_base + offset, '__W_' , x, y, 'PSEG_XCU' ) |
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| 220 | vseg.add ( Vobj( 'xcu_%d_%d' %(x,y) , xcu_size, 'PERI' ) ) |
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| 221 | mapping.addGlobal( vseg ) |
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| 222 | |
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| 223 | vseg = Vseg( 'seg_mmc_%d_%d' %(x,y) , mmc_base + offset, '__W_' , x, y, 'PSEG_MMC' ) |
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| 224 | vseg.add ( Vobj( 'mmc_%d_%d' %(x,y) , mmc_size, 'PERI' ) ) |
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| 225 | mapping.addGlobal( vseg ) |
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| 226 | |
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| 227 | vseg = Vseg( 'seg_sch_%d_%d' %(x,y) , kernel_sched_vbase + offset, '__W_' , x, y, 'PSEG_RAM' ) |
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| 228 | vseg.add ( Vobj( 'sch_%d_%d' %(x,y) , kernel_sched_vsize, 'SCHED' ) ) |
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| 229 | mapping.addGlobal( vseg ) |
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| 230 | |
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| 231 | ### return mapping |
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| 232 | |
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| 233 | return mapping |
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| 234 | |
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| 235 | ################################# transpose test ####################################################### |
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| 236 | |
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| 237 | if __name__ == '__main__': |
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| 238 | print tsar_generic_leti() |
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| 239 | |
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| 240 | |
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| 241 | # Local Variables: |
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| 242 | # tab-width: 4; |
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| 243 | # c-basic-offset: 4; |
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| 244 | # c-file-offsets:((innamespace . 0)(inline-open . 0)); |
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| 245 | # indent-tabs-mode: nil; |
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| 246 | # End: |
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| 247 | # |
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| 248 | # vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 249 | |
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