*** This first section describes an instance of the "tsar_generic_xbar" architecture *** with 1 clusters, 4 processor per cluster and 40 bits physical address. *** Boot ROM and peripherals *** segments used by the boot code / A[31:28] = 0xB / Identity mapping *** peripherals / A[31:28] = 0xB / Identity mapping *** segments used by the kernel / A[31:28] = 0x8