1 | <?xml version="1.0"?> |
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2 | |
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3 | <mapping_info signature = "0xdeadbeef" |
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4 | name = "4c_1p_four" |
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5 | x_size = "2" |
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6 | y_size = "2" |
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7 | x_width = "4" |
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8 | y_width = "4" |
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9 | vspaces = "4" |
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10 | increment = "0x10000" > |
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11 | |
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12 | *** The "increment" parameter is the virtual address cluster increment |
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13 | *** The physical address cluster increment is 0x10000000000 / NB_CLUSTERS |
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14 | |
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15 | *** This first section describes an instance of the "tsar_generic_xbar" architecture |
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16 | *** with 4 clusters, 1 processor per cluster and 40 bits physical address. |
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17 | |
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18 | <clusterset> |
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19 | |
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20 | <cluster x = "0" y = "0" > |
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21 | <pseg name = "PSEG_RAM" type = "RAM" base = "0x0000000000" length = "0x0001000000" /> |
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22 | <pseg name = "PSEG_XCU" type = "PERI" base = "0x00B0000000" length = "0x0000002000" /> |
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23 | <pseg name = "PSEG_DMA" type = "PERI" base = "0x00B1000000" length = "0x0000008000" /> |
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24 | <pseg name = "PSEG_MMC" type = "PERI" base = "0x00B8000000" length = "0x0000001000" /> |
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25 | |
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26 | *** Non replicated peripherals (including the ROM containing the preloader code) |
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27 | |
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28 | <pseg name = "PSEG_FBF" type = "PERI" base = "0x00B2000000" length = "0x0000004000" /> |
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29 | <pseg name = "PSEG_IOC" type = "PERI" base = "0x00B3000000" length = "0x0000001000" /> |
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30 | <pseg name = "PSEG_TTY" type = "PERI" base = "0x00B4000000" length = "0x0000001000" /> |
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31 | <pseg name = "PSEG_NIC" type = "PERI" base = "0x00B5000000" length = "0x0000080000" /> |
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32 | <pseg name = "PSEG_CMA" type = "PERI" base = "0x00B6000000" length = "0x0000008000" /> |
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33 | <pseg name = "PSEG_ROM" type = "PERI" base = "0x00BFC00000" length = "0x0000004000" /> |
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34 | |
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35 | <proc index = "0" > |
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36 | <irq type = "SOFT" icuid = "0" isr = "ISR_WAKUP" /> |
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37 | <irq type = "TIME" icuid = "1" isr = "ISR_SWITCH" /> |
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38 | |
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39 | <irq type = "HARD" icuid = "16" isr = "ISR_TTY" channel = "0" /> |
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40 | <irq type = "HARD" icuid = "17" isr = "ISR_TTY" channel = "1" /> |
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41 | <irq type = "HARD" icuid = "18" isr = "ISR_TTY" channel = "2" /> |
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42 | <irq type = "HARD" icuid = "19" isr = "ISR_TTY" channel = "3" /> |
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43 | <irq type = "HARD" icuid = "20" isr = "ISR_TTY" channel = "4" /> |
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44 | <irq type = "HARD" icuid = "21" isr = "ISR_TTY" channel = "5" /> |
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45 | <irq type = "HARD" icuid = "22" isr = "ISR_TTY" channel = "6" /> |
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46 | <irq type = "HARD" icuid = "23" isr = "ISR_TTY" channel = "7" /> |
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47 | |
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48 | <irq type = "HARD" icuid = "31" isr = "ISR_IOC" /> |
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49 | </proc> |
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50 | |
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51 | <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> |
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52 | <periph type = "XCU" psegname = "PSEG_XCU" channels = "6" /> |
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53 | <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> |
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54 | <periph type = "IOC" psegname = "PSEG_IOC" channels = "1" /> |
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55 | <periph type = "TTY" psegname = "PSEG_TTY" channels = "8" /> |
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56 | <periph type = "NIC" psegname = "PSEG_NIC" channels = "2" /> |
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57 | <periph type = "CMA" psegname = "PSEG_CMA" channels = "4" /> |
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58 | <periph type = "FBF" psegname = "PSEG_FBF" channels = "1" /> |
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59 | <periph type = "ROM" psegname = "PSEG_ROM" channels = "1" /> |
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60 | |
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61 | </cluster> |
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62 | |
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63 | <cluster x = "0" y = "1" > |
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64 | <pseg name = "PSEG_RAM" type = "RAM" base = "0x0100000000" length = "0x0001000000" /> |
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65 | <pseg name = "PSEG_XCU" type = "PERI" base = "0x01B0000000" length = "0x0000002000" /> |
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66 | <pseg name = "PSEG_DMA" type = "PERI" base = "0x01B1000000" length = "0x0000008000" /> |
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67 | <pseg name = "PSEG_MMC" type = "PERI" base = "0x01B8000000" length = "0x0000001000" /> |
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68 | |
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69 | <proc index = "0" > |
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70 | <irq type = "SOFT" icuid = "0" isr = "ISR_WAKUP" /> |
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71 | <irq type = "TIME" icuid = "1" isr = "ISR_SWITCH" /> |
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72 | </proc> |
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73 | |
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74 | <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> |
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75 | <periph type = "XCU" psegname = "PSEG_XCU" channels = "6" /> |
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76 | <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> |
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77 | </cluster> |
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78 | |
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79 | <cluster x = "1" y = "0" > |
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80 | <pseg name = "PSEG_RAM" type = "RAM" base = "0x1000000000" length = "0x0001000000" /> |
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81 | <pseg name = "PSEG_XCU" type = "PERI" base = "0x10B0000000" length = "0x0000002000" /> |
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82 | <pseg name = "PSEG_DMA" type = "PERI" base = "0x10B1000000" length = "0x0000008000" /> |
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83 | <pseg name = "PSEG_MMC" type = "PERI" base = "0x10B8000000" length = "0x0000001000" /> |
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84 | |
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85 | <proc index = "0" > |
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86 | <irq type = "SOFT" icuid = "0" isr = "ISR_WAKUP" /> |
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87 | <irq type = "TIME" icuid = "1" isr = "ISR_SWITCH" /> |
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88 | </proc> |
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89 | |
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90 | <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> |
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91 | <periph type = "XCU" psegname = "PSEG_XCU" channels = "6" /> |
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92 | <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> |
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93 | </cluster> |
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94 | |
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95 | <cluster x = "1" y = "1" > |
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96 | <pseg name = "PSEG_RAM" type = "RAM" base = "0x1100000000" length = "0x0001000000" /> |
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97 | <pseg name = "PSEG_XCU" type = "PERI" base = "0x11B0000000" length = "0x0000002000" /> |
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98 | <pseg name = "PSEG_DMA" type = "PERI" base = "0x11B1000000" length = "0x0000008000" /> |
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99 | <pseg name = "PSEG_MMC" type = "PERI" base = "0x11B8000000" length = "0x0000001000" /> |
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100 | |
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101 | <proc index = "0" > |
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102 | <irq type = "SOFT" icuid = "0" isr = "ISR_WAKUP" /> |
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103 | <irq type = "TIME" icuid = "1" isr = "ISR_SWITCH" /> |
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104 | </proc> |
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105 | |
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106 | <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> |
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107 | <periph type = "XCU" psegname = "PSEG_XCU" channels = "6" /> |
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108 | <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> |
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109 | </cluster> |
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110 | </clusterset> |
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111 | |
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112 | <globalset> |
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113 | |
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114 | *** Segments used by the boot code / A[31:28] = 0x0 / Identity mapping |
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115 | - seg_boot_mapping is loaded by the boot-loader. It contains the mapping info. The content is reused by the kernel. |
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116 | - seg_boot_code and seg_boot data are loaded by the preloader, used by the boot-loader The content is not reused by the kernel. |
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117 | - seg_boot_stack is contains the stacks used by all processors during reset and boot. The content is not reused by the Kernel. |
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118 | - seg_boot_buffer is used by the boot-loader. It can contain a complete .elf file. The content is not reused by the kernel. |
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119 | |
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120 | <vseg name = "seg_boot_mapping" vbase = "0x00000000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" > |
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121 | <vobj name = "boot_mapping" type = "BLOB" length = "0x00010000" binpath = "map.bin" /> |
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122 | </vseg> |
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123 | <vseg name = "seg_boot_code" vbase = "0x00010000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" > |
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124 | <vobj name = "boot_code" type = "BUFFER" length = "0x00020000" /> |
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125 | </vseg> |
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126 | <vseg name = "seg_boot_data" vbase = "0x00030000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" > |
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127 | <vobj name = "boot_data" type = "BUFFER" length = "0x00010000" /> |
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128 | </vseg> |
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129 | <vseg name = "seg_boot_buffer" vbase = "0x00040000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" > |
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130 | <vobj name = "boot_buffer" type = "BUFFER" length = "0x00020000" /> |
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131 | </vseg> |
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132 | <vseg name = "seg_boot_stack" vbase = "0x00060000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" > |
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133 | <vobj name = "boot_stack" type = "BUFFER" length = "0x00090000" /> |
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134 | </vseg> |
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135 | |
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136 | *** Segments used by the kernel / A[31:28] = 0x8 |
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137 | |
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138 | <vseg name = "seg_kernel_code" vbase = "0x80000000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > |
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139 | <vobj name = "kernel_code" type = "ELF" length = "0x00020000" binpath = "build/kernel/kernel.elf" /> |
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140 | </vseg> |
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141 | <vseg name = "seg_kernel_data" vbase = "0x80020000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" > |
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142 | <vobj name = "kernel_data" type = "ELF" length = "0x00060000" binpath = "build/kernel/kernel.elf" /> |
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143 | </vseg> |
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144 | <vseg name = "seg_kernel_uncdata" vbase = "0x80080000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_RAM" > |
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145 | <vobj name = "kernel_uncdata" type = "ELF" length = "0x00040000" binpath = "build/kernel/kernel.elf" /> |
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146 | </vseg> |
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147 | <vseg name = "seg_kernel_init" vbase = "0x800C0000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > |
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148 | <vobj name = "kernel_init" type = "ELF" length = "0x00010000" binpath = "build/kernel/kernel.elf" /> |
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149 | </vseg> |
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150 | |
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151 | *** Segments for non replicated peripherals / A[31:28] = 0xB / Identity mapping |
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152 | |
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153 | <vseg name = "seg_fbf" vbase = "0xB2000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_FBF" ident = "1" > |
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154 | <vobj name = "fbf" type = "PERI" length = "0x00004000" /> |
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155 | </vseg> |
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156 | <vseg name = "seg_ioc" vbase = "0xB3000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_IOC" ident = "1" > |
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157 | <vobj name = "ioc" type = "PERI" length = "0x00001000" /> |
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158 | </vseg> |
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159 | <vseg name = "seg_tty" vbase = "0xB4000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_TTY" ident = "1" > |
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160 | <vobj name = "tty" type = "PERI" length = "0x00001000" /> |
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161 | </vseg> |
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162 | <vseg name = "seg_nic" vbase = "0xB5000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_NIC" ident = "1" > |
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163 | <vobj name = "nic" type = "PERI" length = "0x00080000" /> |
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164 | </vseg> |
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165 | <vseg name = "seg_cma" vbase = "0xB6000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_CMA" ident = "1" > |
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166 | <vobj name = "cma" type = "PERI" length = "0x00008000" /> |
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167 | </vseg> |
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168 | <vseg name = "seg_rom" vbase = "0xBFC00000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_ROM" ident = "1" > |
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169 | <vobj name = "rom" type = "PERI" length = "0x00004000" /> |
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170 | </vseg> |
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171 | |
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172 | *** Segments for replicated ICUS / A[31:24] = 0xB0 / Increment = 0x10000 / Identity mapping in cluster 0 |
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173 | |
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174 | <vseg name = "seg_icu_0" vbase = "0xB0000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_XCU" ident = "1" > |
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175 | <vobj name = "icu_0" type = "PERI" length = "0x00001000" /> |
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176 | </vseg> |
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177 | <vseg name = "seg_icu_1" vbase = "0xB0010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_XCU" > |
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178 | <vobj name = "icu_1" type = "PERI" length = "0x00001000" /> |
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179 | </vseg> |
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180 | <vseg name = "seg_icu_2" vbase = "0xB0100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_XCU" > |
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181 | <vobj name = "icu_2" type = "PERI" length = "0x00001000" /> |
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182 | </vseg> |
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183 | <vseg name = "seg_icu_3" vbase = "0xB0110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_XCU" > |
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184 | <vobj name = "icu_3" type = "PERI" length = "0x00001000" /> |
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185 | </vseg> |
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186 | |
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187 | *** segments for replicated DMAs / A[31:24] = 0xB1 / Increment = 0x10000 / Tdentity mapping in cluster 0 |
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188 | *** The peripheral type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000) |
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189 | *** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000) |
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190 | |
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191 | <vseg name = "seg_dma_0" vbase = "0xB1000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_DMA" ident = "1" > |
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192 | <vobj name = "dma_0" type = "PERI" length = "0x00008000" /> |
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193 | </vseg> |
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194 | <vseg name = "seg_dma_1" vbase = "0xB1010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_DMA" > |
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195 | <vobj name = "dma_1" type = "PERI" length = "0x00008000" /> |
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196 | </vseg> |
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197 | <vseg name = "seg_dma_2" vbase = "0xB1100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_DMA" > |
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198 | <vobj name = "dma_2" type = "PERI" length = "0x00008000" /> |
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199 | </vseg> |
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200 | <vseg name = "seg_dma_3" vbase = "0xB1110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_DMA" > |
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201 | <vobj name = "dma_3" type = "PERI" length = "0x00008000" /> |
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202 | </vseg> |
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203 | |
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204 | *** segments for replicated MMC / A[31:24] = 0xB8 / Increment = 0x10000 / Identity mapping in cluster 0 |
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205 | *** The peripheral type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000) |
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206 | *** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000) |
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207 | |
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208 | <vseg name = "seg_memc_0" vbase = "0xB8000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_MMC" ident = "1" > |
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209 | <vobj name = "memc_0" type = "PERI" length = "0x00001000" /> |
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210 | </vseg> |
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211 | <vseg name = "seg_memc_1" vbase = "0xB8010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_MMC" > |
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212 | <vobj name = "memc_1" type = "PERI" length = "0x00001000" /> |
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213 | </vseg> |
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214 | <vseg name = "seg_memc_2" vbase = "0xB8100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_MMC" > |
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215 | <vobj name = "memc_2" type = "PERI" length = "0x00001000" /> |
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216 | </vseg> |
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217 | <vseg name = "seg_memc_3" vbase = "0xB8110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_MMC" > |
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218 | <vobj name = "memc_3" type = "PERI" length = "0x00001000" /> |
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219 | </vseg> |
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220 | |
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221 | *** segments for replicated schedulers / A[31:28] = 0xF / Increment = 0x10000 |
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222 | *** The type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000) |
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223 | *** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000) |
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224 | |
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225 | <vseg name = "seg_sched_0" vbase = "0xF0000000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" > |
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226 | <vobj name = "sched_0" type = "SCHED" length = "0x00008000" /> |
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227 | </vseg> |
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228 | <vseg name = "seg_sched_1" vbase = "0xF0010000" mode = "C_W_" x = "0" y = "1" psegname = "PSEG_RAM" > |
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229 | <vobj name = "sched_1" type = "SCHED" length = "0x00008000" /> |
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230 | </vseg> |
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231 | <vseg name = "seg_sched_2" vbase = "0xF0100000" mode = "C_W_" x = "1" y = "0" psegname = "PSEG_RAM" > |
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232 | <vobj name = "sched_2" type = "SCHED" length = "0x00008000" /> |
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233 | </vseg> |
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234 | <vseg name = "seg_sched_3" vbase = "0xF0110000" mode = "C_W_" x = "1" y = "1" psegname = "PSEG_RAM" > |
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235 | <vobj name = "sched_3" type = "SCHED" length = "0x00008000" /> |
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236 | </vseg> |
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237 | *** |
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238 | </globalset> |
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239 | |
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240 | <vspaceset> |
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241 | |
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242 | *** For each vspace, the startname field is the name of the vobj containing the start_vector (entry point array) |
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243 | *** For each task, the startid field define the task entry point as an index in the start_vector |
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244 | *** For each task, the x,y and proclocid arguments define the task static placement |
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245 | *** For each task, the stackname field is the name of the vobj containing the task stack |
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246 | *** For each task, the heapname field is the name of the vobj containing the task heap |
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247 | |
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248 | <vspace name = "router" startname = "data" > |
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249 | <vseg name = "seg_code" vbase = "0x00400000" mode = "CX_U" x = "0" y = "0" psegname = "PSEG_RAM" > |
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250 | <vobj name = "code" type = "ELF" length = "0x00010000" binpath = "build/router/router.elf" /> |
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251 | </vseg> |
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252 | <vseg name = "seg_data" vbase = "0x00500000" mode = "__WU" x = "0" y = "0" psegname = "PSEG_RAM" > |
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253 | <vobj name = "data" type = "ELF" length = "0x00010000" binpath = "build/router/router.elf" /> |
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254 | </vseg> |
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255 | <vseg name = "seg_ptab" vbase = "0x00600000" mode = "C___" x = "0" y = "0" psegname = "PSEG_RAM" > |
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256 | <vobj name = "ptab" type = "PTAB" length = "0x00012000" align = "13" /> |
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257 | </vseg> |
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258 | <vseg name = "seg_stack_prod" vbase = "0x00700000" mode = "C_WU" x = "0" y = "0" psegname = "PSEG_RAM" > |
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259 | <vobj name = "stack_prod" type = "BUFFER" length = "0x00010000" /> |
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260 | <vobj name = "heap_prod" type = "BUFFER" length = "0x00010000" /> |
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261 | </vseg> |
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262 | <vseg name = "seg_stack_cons" vbase = "0x00800000" mode = "C_WU" x = "0" y = "1" psegname = "PSEG_RAM" > |
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263 | <vobj name = "stack_cons" type = "BUFFER" length = "0x00010000" /> |
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264 | <vobj name = "heap_cons" type = "BUFFER" length = "0x00010000" /> |
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265 | </vseg> |
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266 | <vseg name = "seg_stack_routA" vbase = "0x00900000" mode = "C_WU" x = "1" y = "0" psegname = "PSEG_RAM" > |
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267 | <vobj name = "stack_routA" type = "BUFFER" length = "0x00010000" /> |
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268 | <vobj name = "heap_routA" type = "BUFFER" length = "0x00010000" /> |
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269 | </vseg> |
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270 | <vseg name = "seg_stack_routB" vbase = "0x00A00000" mode = "C_WU" x = "1" y = "1" psegname = "PSEG_RAM" > |
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271 | <vobj name = "stack_routB" type = "BUFFER" length = "0x00010000" /> |
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272 | <vobj name = "heap_routB" type = "BUFFER" length = "0x00010000" /> |
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273 | </vseg> |
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274 | <vseg name = "seg_mwmrs" vbase = "0x00B00000" mode = "__WU" x = "0" y = "0" psegname = "PSEG_RAM" > |
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275 | <vobj name = "mwmr_in" type = "MWMR" length = "0x00000020" init = "1" /> |
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276 | <vobj name = "mwmr_out" type = "MWMR" length = "0x00000020" init = "1" /> |
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