*** This first section describes an instance of the "tsar_generic_iob" architecture *** with 4 clusters, 1 processor per cluster and 40 bits physical address. *** Boot ROM and non replicated peripherals *** segments used by the boot code / A[31:28] = 0xB / Identity mapping *** Non replicated peripherals / A[31:28] = 0xB / Identity mapping *** segments used by the kernel / A[31:28] = 0x8 *** segments for replicated ICUS / A[31:28] = 0xE / Increment = 0x10000 *** segments for replicated DMAs / A[31:28] = 0xD / Increment = 0x10000 *** segments for replicated MMC / A[31:28] = 0xC / Increment = 0x10000 *** segments for replicated schedulers / A[31:28] = 0xF / Increment = 0x10000 ***