[165] | 1 | /////////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File : kernel_init.c |
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| 3 | // Date : 26/05/2012 |
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| 4 | // Authors : alain greiner & mohamed karaoui |
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| 5 | // Copyright (c) UPMC-LIP6 |
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| 6 | //////////////////////////////////////////////////////////////////////////////////// |
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| 7 | // The kernel_init.c files is part of the GIET-VM nano-kernel. |
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[189] | 8 | // It contains the kernel entry point for the last step of system initialisation. |
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| 9 | // All procs in this phase have their MMU activated, and are running in parallel. |
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[199] | 10 | // Each processor perform the following actions: |
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| 11 | // 1/ contributes to _schedulers_paddr[] initialisation |
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| 12 | // 2/ contributes to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation |
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| 13 | // 3/ computes and set the ICU mask for its private ICU channel |
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| 14 | // 4/ initialises its private TICK timer (if required) |
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| 15 | // 5/ initialises the "idle" task context in its private scheduler |
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| 16 | // 6/ initialises the SP, SR, PTPR, EPC registers |
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| 17 | // 7/ jumps to the user code with an eret. |
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[165] | 18 | //////////////////////////////////////////////////////////////////////////////////// |
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| 19 | |
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| 20 | #include <common.h> |
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[189] | 21 | #include <irq_handler.h> |
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[165] | 22 | #include <ctx_handler.h> |
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| 23 | #include <sys_handler.h> |
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| 24 | #include <mapping_info.h> |
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| 25 | #include <giet_config.h> |
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| 26 | #include <mips32_registers.h> |
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| 27 | #include <irq_handler.h> |
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[166] | 28 | #include <vm_handler.h> |
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[165] | 29 | #include <hwr_mapping.h> |
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| 30 | #include <mwmr_channel.h> |
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| 31 | #include <barrier.h> |
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| 32 | #include <drivers.h> |
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| 33 | |
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| 34 | /////////////////////////////////////////////////////////////////////////////////// |
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[189] | 35 | // Kernel Global variables |
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[167] | 36 | /////////////////////////////////////////////////////////////////////////////////// |
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| 37 | |
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[189] | 38 | __attribute__((section (".kdata"))) |
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[199] | 39 | unsigned int _ptabs_paddr[GIET_NB_VSPACE_MAX]; |
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[167] | 40 | |
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[189] | 41 | __attribute__((section (".kdata"))) |
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[199] | 42 | unsigned int _ptabs_vaddr[GIET_NB_VSPACE_MAX]; |
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[165] | 43 | |
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[189] | 44 | __attribute__((section (".kdata"))) |
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[199] | 45 | static_scheduler_t* _schedulers_paddr[NB_CLUSTERS*NB_PROCS_MAX]; |
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[165] | 46 | |
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[199] | 47 | __attribute__((section (".kdata"))) |
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| 48 | unsigned int _idle_stack[NB_CLUSTERS*NB_PROCS_MAX*64]; |
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| 49 | |
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[165] | 50 | ////////////////////////////////////////////////////////////////////////////////// |
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[189] | 51 | // This function is the entry point for the last step of the boot sequence. |
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[165] | 52 | ////////////////////////////////////////////////////////////////////////////////// |
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[189] | 53 | __attribute__((section (".kinit"))) void _kernel_init() |
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[165] | 54 | { |
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[199] | 55 | // compute cluster and local processor index |
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[189] | 56 | unsigned int proc_id = _procid(); |
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| 57 | unsigned int cluster_id = proc_id / NB_PROCS_MAX; |
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| 58 | unsigned int lpid = proc_id % NB_PROCS_MAX; |
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[165] | 59 | |
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[189] | 60 | // step 1 : Initialise scheduler physical addresses array |
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| 61 | |
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| 62 | // get scheduler physical address from register |
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| 63 | static_scheduler_t* psched = (static_scheduler_t*)_get_sched(); |
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| 64 | _schedulers_paddr[proc_id] = psched; |
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| 65 | |
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| 66 | #if GIET_DEBUG_INIT |
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| 67 | _get_lock(&_tty_put_lock); |
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| 68 | _puts("\n[GIET DEBUG] step 1 for processor "); |
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[199] | 69 | _putd( proc_id ); |
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| 70 | _puts(" / scheduler pbase = "); |
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[189] | 71 | _putw( (unsigned int)psched ); |
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| 72 | _puts("\n"); |
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| 73 | _release_lock(&_tty_put_lock); |
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| 74 | #endif |
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| 75 | |
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[199] | 76 | |
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| 77 | // step 2 : initialise page table addresse arrays |
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| 78 | // it scans all tasks contexts in the scheduler |
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| 79 | // and get VSID, PTAB and PTPR values |
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| 80 | |
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| 81 | unsigned int ltid; |
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| 82 | unsigned int tasks = _get_tasks_number(); |
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| 83 | |
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| 84 | for ( ltid = 0 ; ltid < tasks ; ltid++ ) |
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| 85 | { |
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| 86 | unsigned int vspace_id = _get_context_slot( ltid , CTX_VSID_ID ); |
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| 87 | unsigned int ptab_vaddr = _get_context_slot( ltid , CTX_PTAB_ID ); |
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| 88 | unsigned int ptab_paddr = _get_context_slot( ltid , CTX_PTPR_ID ) << 13; |
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| 89 | _ptabs_vaddr[vspace_id] = ptab_vaddr; |
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| 90 | _ptabs_paddr[vspace_id] = ptab_paddr; |
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| 91 | |
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| 92 | #if GIET_DEBUG_INIT |
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| 93 | _get_lock(&_tty_put_lock); |
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| 94 | _puts("\n[GIET DEBUG] step 2 for processor "); |
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| 95 | _putd( proc_id ); |
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| 96 | _puts(" / vspace "); |
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| 97 | _putd( vspace_id ); |
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| 98 | _puts("\n- ptab vbase = "); |
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| 99 | _putw( ptab_vaddr ); |
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| 100 | _puts("\n- ptab pbase = "); |
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| 101 | _putw( ptab_paddr ); |
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| 102 | _puts("\n"); |
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| 103 | _release_lock(&_tty_put_lock); |
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| 104 | #endif |
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| 105 | |
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| 106 | } |
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| 107 | |
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| 108 | // step 3 : compute and set ICU mask |
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[189] | 109 | unsigned int irq_id; |
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| 110 | unsigned int mask = 0; |
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| 111 | for ( irq_id = 0 ; irq_id < 32 ; irq_id++ ) |
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[165] | 112 | { |
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[189] | 113 | unsigned int entry = _get_interrupt_vector_entry(irq_id); |
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| 114 | if ( entry ) mask = mask | 0x1<< irq_id; |
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[165] | 115 | } |
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[189] | 116 | _icu_write( cluster_id, |
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| 117 | lpid, |
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| 118 | ICU_MASK_SET, |
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| 119 | mask ); |
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| 120 | |
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| 121 | #if GIET_DEBUG_INIT |
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| 122 | _get_lock(&_tty_put_lock); |
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[199] | 123 | _puts("\n[GIET DEBUG] step 3 for processor "); |
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| 124 | _putd( proc_id ); |
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| 125 | _puts(" / ICU mask = "); |
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[189] | 126 | _putw( mask ); |
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| 127 | _puts("\n"); |
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| 128 | _release_lock(&_tty_put_lock); |
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| 129 | #endif |
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[165] | 130 | |
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| 131 | |
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[189] | 132 | // step 4 : start TICK timer if more than one task |
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| 133 | if ( tasks > 1 ) |
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[165] | 134 | { |
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[189] | 135 | unsigned int period = GIET_TICK_VALUE; |
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| 136 | unsigned int mode = 0x3; |
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| 137 | _timer_access( 0, // write access |
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| 138 | cluster_id, |
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| 139 | proc_id, |
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| 140 | TIMER_PERIOD, |
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| 141 | &period ); |
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| 142 | _timer_access( 0, // write access |
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| 143 | cluster_id, |
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| 144 | proc_id, |
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| 145 | TIMER_MODE, |
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| 146 | &mode ); |
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| 147 | |
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| 148 | #if GIET_DEBUG_INIT |
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| 149 | _get_lock(&_tty_put_lock); |
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| 150 | _puts("\n[GIET DEBUG] Step 4 for processor "); |
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[199] | 151 | _putd( proc_id ); |
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| 152 | _puts(" / TICK activated\n"); |
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[189] | 153 | _release_lock(&_tty_put_lock); |
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| 154 | #endif |
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| 155 | |
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| 156 | } |
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| 157 | |
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[199] | 158 | // step 5 : initialise the "idle" task context |
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| 159 | // the SR initialisation value is 0xFF03 because |
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| 160 | // the task _ctx_idle() executes in kernel mode... |
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| 161 | // it uses the page table of vspace[0] |
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| 162 | |
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| 163 | _set_context_slot( IDLE_TASK_INDEX, CTX_RUN_ID, 1 ); |
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| 164 | _set_context_slot( IDLE_TASK_INDEX, CTX_SR_ID, 0xFF03 ); |
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| 165 | _set_context_slot( IDLE_TASK_INDEX, CTX_SP_ID, (unsigned int)&_idle_stack[proc_id] + 64 ); |
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| 166 | _set_context_slot( IDLE_TASK_INDEX, CTX_RA_ID, (unsigned int)&_ctx_eret ); |
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| 167 | _set_context_slot( IDLE_TASK_INDEX, CTX_EPC_ID, (unsigned int)&_ctx_idle ); |
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| 168 | _set_context_slot( IDLE_TASK_INDEX, CTX_LTID_ID, IDLE_TASK_INDEX ); |
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| 169 | _set_context_slot( IDLE_TASK_INDEX, CTX_PTPR_ID, _ptabs_paddr[0] >> 13 ); |
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| 170 | |
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| 171 | #if GIET_DEBUG_INIT |
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| 172 | _get_lock(&_tty_put_lock); |
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| 173 | _puts("\n[GIET DEBUG] Step 5 for processor "); |
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| 174 | _putd( proc_id ); |
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| 175 | _puts(" / idle task context set\n"); |
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| 176 | _release_lock(&_tty_put_lock); |
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| 177 | #endif |
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| 178 | |
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| 179 | // step 6 : each processor initialises SP, SR, PTPR, EPC, registers |
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[189] | 180 | // with the values corresponding to the first allocated task, |
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[199] | 181 | // and starts the "idle" task if there is no task allocated. |
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[189] | 182 | |
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[199] | 183 | unsigned int task_id; |
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| 184 | |
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| 185 | if ( tasks == 0 ) |
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[189] | 186 | { |
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[199] | 187 | task_id = IDLE_TASK_INDEX; |
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[165] | 188 | |
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[199] | 189 | _get_lock( &_tty_put_lock ); |
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| 190 | _puts("\n [GIET WARNING] No task allocated to processor "); |
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| 191 | _putw( proc_id ); |
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| 192 | _puts(" => idle\n"); |
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| 193 | _release_lock ( &_tty_put_lock ); |
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| 194 | } |
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| 195 | else |
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| 196 | { |
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| 197 | task_id = 0; |
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| 198 | } |
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| 199 | |
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| 200 | unsigned int sp_value = _get_context_slot( task_id, CTX_SP_ID ); |
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| 201 | unsigned int sr_value = _get_context_slot( task_id, CTX_SR_ID ); |
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| 202 | unsigned int ptpr_value = _get_context_slot( task_id, CTX_PTPR_ID ); |
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| 203 | unsigned int epc_value = _get_context_slot( task_id, CTX_EPC_ID ); |
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| 204 | |
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[189] | 205 | #if GIET_DEBUG_INIT |
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| 206 | _get_lock(&_tty_put_lock); |
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[199] | 207 | _puts("\n[GIET DEBUG] step 6 for processor "); |
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| 208 | _putd( proc_id ); |
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| 209 | _puts(" / registers initialised \n"); |
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[189] | 210 | _puts("- sp = "); |
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| 211 | _putw( sp_value ); |
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| 212 | _puts("\n"); |
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| 213 | _puts("- sr = "); |
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| 214 | _putw( sr_value ); |
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| 215 | _puts("\n"); |
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| 216 | _puts("- ptpr = "); |
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| 217 | _putw( ptpr_value<<13 ); |
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| 218 | _puts("\n"); |
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| 219 | _puts("- epc = "); |
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| 220 | _putw( epc_value ); |
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| 221 | _puts("\n"); |
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| 222 | _release_lock(&_tty_put_lock); |
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| 223 | #endif |
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[165] | 224 | |
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[199] | 225 | // set registers and jump to user code |
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| 226 | asm volatile ( "move $29, %0 \n" /* SP <= ctx[CTX_SP_ID] */ |
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| 227 | "mtc0 %1, $12 \n" /* SR <= ctx[CTX_SR_ID] */ |
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| 228 | "mtc2 %2, $0 \n" /* PTPR <= ctx[CTX_PTPR_ID] */ |
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| 229 | "mtc0 %3, $14 \n" /* EPC <= ctx[CTX_EPC_ID] */ |
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| 230 | "eret \n" /* jump to user code */ |
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| 231 | "nop \n" |
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| 232 | : |
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| 233 | : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value) ); |
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[165] | 234 | |
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| 235 | } // end _kernel_init() |
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