1 | /////////////////////////////////////////////////////////////////////////////////// |
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2 | // File : kernel_init.c |
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3 | // Date : 26/05/2012 |
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4 | // Authors : alain greiner & mohamed karaoui |
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5 | // Copyright (c) UPMC-LIP6 |
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6 | //////////////////////////////////////////////////////////////////////////////////// |
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7 | // The kernel_init.c files is part of the GIET-VM nano-kernel. |
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8 | // It contains the kernel entry point for the last step of system initialisation. |
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9 | // All procs in this phase have their MMU activated, and are running in parallel. |
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10 | // - each processor updates its own scheduler, to replace the ISR index |
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11 | // by the actual ISR virtual address, and set its own entry in the |
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12 | // kernel _schedulers_paddr[] array. |
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13 | // - each processor initialises the SP, SR, PTPR, EPC registers, and starts |
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14 | // its private Timer, before jumping to the user code with an eret. |
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15 | //////////////////////////////////////////////////////////////////////////////////// |
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16 | |
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17 | #include <common.h> |
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18 | #include <irq_handler.h> |
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19 | #include <ctx_handler.h> |
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20 | #include <sys_handler.h> |
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21 | #include <mapping_info.h> |
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22 | #include <giet_config.h> |
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23 | #include <mips32_registers.h> |
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24 | #include <irq_handler.h> |
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25 | #include <vm_handler.h> |
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26 | #include <hwr_mapping.h> |
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27 | #include <mwmr_channel.h> |
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28 | #include <barrier.h> |
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29 | #include <drivers.h> |
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30 | |
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31 | /////////////////////////////////////////////////////////////////////////////////// |
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32 | // Kernel Global variables |
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33 | /////////////////////////////////////////////////////////////////////////////////// |
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34 | |
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35 | __attribute__((section (".kdata"))) |
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36 | page_table_t* _ptabs_paddr[GIET_NB_VSPACE_MAX]; |
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37 | |
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38 | __attribute__((section (".kdata"))) |
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39 | page_table_t* _ptabs_vaddr[GIET_NB_VSPACE_MAX]; |
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40 | |
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41 | __attribute__((section (".kdata"))) |
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42 | static_scheduler_t* _schedulers_paddr[NB_CLUSTERS*NB_PROCS_MAX]; |
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43 | |
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44 | ////////////////////////////////////////////////////////////////////////////////// |
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45 | // This function is the entry point for the last step of the boot sequence. |
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46 | ////////////////////////////////////////////////////////////////////////////////// |
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47 | __attribute__((section (".kinit"))) void _kernel_init() |
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48 | { |
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49 | // values to be written in registers |
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50 | unsigned int sp_value; |
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51 | unsigned int sr_value; |
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52 | unsigned int ptpr_value; |
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53 | unsigned int epc_value; |
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54 | |
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55 | unsigned int proc_id = _procid(); |
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56 | unsigned int cluster_id = proc_id / NB_PROCS_MAX; |
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57 | unsigned int lpid = proc_id % NB_PROCS_MAX; |
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58 | |
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59 | // step 1 : Initialise scheduler physical addresses array |
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60 | |
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61 | // get scheduler physical address from register |
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62 | static_scheduler_t* psched = (static_scheduler_t*)_get_sched(); |
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63 | _schedulers_paddr[proc_id] = psched; |
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64 | |
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65 | #if GIET_DEBUG_INIT |
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66 | _get_lock(&_tty_put_lock); |
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67 | _puts("\n[GIET DEBUG] step 1 for processor "); |
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68 | _putw( proc_id ); |
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69 | _puts("\n"); |
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70 | _puts("- scheduler pbase = "); |
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71 | _putw( (unsigned int)psched ); |
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72 | _puts("\n"); |
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73 | _release_lock(&_tty_put_lock); |
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74 | #endif |
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75 | |
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76 | // step 2 : compute and set ICU mask |
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77 | unsigned int irq_id; |
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78 | unsigned int mask = 0; |
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79 | for ( irq_id = 0 ; irq_id < 32 ; irq_id++ ) |
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80 | { |
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81 | unsigned int entry = _get_interrupt_vector_entry(irq_id); |
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82 | if ( entry ) mask = mask | 0x1<< irq_id; |
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83 | } |
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84 | _icu_write( cluster_id, |
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85 | lpid, |
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86 | ICU_MASK_SET, |
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87 | mask ); |
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88 | |
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89 | #if GIET_DEBUG_INIT |
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90 | _get_lock(&_tty_put_lock); |
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91 | _puts("\n[GIET DEBUG] step 2 for processor "); |
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92 | _putw( proc_id ); |
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93 | _puts("\n"); |
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94 | _puts("- ICU mask = "); |
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95 | _putw( mask ); |
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96 | _puts("\n"); |
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97 | _release_lock(&_tty_put_lock); |
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98 | #endif |
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99 | |
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100 | |
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101 | // step 3 : TODO initialise page table addresse arrays |
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102 | |
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103 | |
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104 | // step 4 : start TICK timer if more than one task |
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105 | unsigned int tasks = _get_tasks_number(); |
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106 | if ( tasks > 1 ) |
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107 | { |
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108 | unsigned int period = GIET_TICK_VALUE; |
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109 | unsigned int mode = 0x3; |
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110 | _timer_access( 0, // write access |
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111 | cluster_id, |
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112 | proc_id, |
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113 | TIMER_PERIOD, |
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114 | &period ); |
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115 | _timer_access( 0, // write access |
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116 | cluster_id, |
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117 | proc_id, |
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118 | TIMER_MODE, |
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119 | &mode ); |
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120 | |
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121 | #if GIET_DEBUG_INIT |
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122 | _get_lock(&_tty_put_lock); |
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123 | _puts("\n[GIET DEBUG] Step 4 for processor "); |
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124 | _putw( proc_id ); |
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125 | _puts("\n"); |
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126 | _puts("- TICK period = "); |
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127 | _putd( period ); |
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128 | _puts("\n"); |
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129 | _release_lock(&_tty_put_lock); |
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130 | #endif |
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131 | |
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132 | } |
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133 | |
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134 | // step 5 : each processor initialises SP, SR, PTPR, EPC, registers |
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135 | // with the values corresponding to the first allocated task, |
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136 | // It does nothing, and keep idle if no task allocated. |
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137 | |
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138 | if ( tasks ) // at leat one task allocated |
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139 | { |
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140 | // initialise registers |
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141 | sp_value = _get_current_context_slot(CTX_SP_ID); |
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142 | sr_value = _get_current_context_slot(CTX_SR_ID); |
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143 | ptpr_value = _get_current_context_slot(CTX_PTPR_ID); |
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144 | epc_value = _get_current_context_slot(CTX_EPC_ID); |
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145 | |
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146 | #if GIET_DEBUG_INIT |
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147 | _get_lock(&_tty_put_lock); |
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148 | _puts("\n[GIET DEBUG] step 5 for processor "); |
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149 | _putw( proc_id ); |
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150 | _puts("\n"); |
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151 | _puts("- sp = "); |
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152 | _putw( sp_value ); |
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153 | _puts("\n"); |
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154 | _puts("- sr = "); |
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155 | _putw( sr_value ); |
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156 | _puts("\n"); |
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157 | _puts("- ptpr = "); |
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158 | _putw( ptpr_value<<13 ); |
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159 | _puts("\n"); |
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160 | _puts("- epc = "); |
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161 | _putw( epc_value ); |
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162 | _puts("\n"); |
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163 | _release_lock(&_tty_put_lock); |
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164 | #endif |
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165 | } |
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166 | else // no task allocated |
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167 | { |
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168 | _get_lock( &_tty_put_lock ); |
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169 | _puts("\n No task allocated to processor "); |
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170 | _putw( proc_id ); |
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171 | _puts(" => keep idle\n"); |
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172 | _release_lock ( &_tty_put_lock ); |
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173 | |
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174 | // enable interrupts in kernel mode |
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175 | asm volatile ( "li $26, 0xFF01 \n" |
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176 | "mtc0 $26, $12 \n" |
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177 | ::: "$26" ); |
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178 | |
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179 | // infinite loop in kernel mode |
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180 | while (1) asm volatile("nop"); |
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181 | } |
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182 | |
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183 | // set critical registers and jump to user code |
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184 | asm volatile ( |
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185 | "move $29, %0 \n" /* SP <= ctx[CTX_SP_ID] */ |
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186 | "mtc0 %1, $12 \n" /* SR <= ctx[CTX_SR_ID] */ |
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187 | "mtc2 %2, $0 \n" /* PTPR <= ctx[CTX_PTPR_ID] */ |
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188 | "mtc0 %3, $14 \n" /* EPC <= ctx[CTX_EPC_ID] */ |
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189 | "eret \n" /* jump to user code */ |
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190 | "nop \n" |
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191 | : |
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192 | : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value) ); |
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193 | |
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194 | } // end _kernel_init() |
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