source: soft/giet_vm/sys/kernel_init.c @ 207

Last change on this file since 207 was 207, checked in by alain, 12 years ago

Several bugs have been fixed to support TSAR multi-cluster architecture
such as the "tsarv4-generic_mmu" platform.
File size: 8.3 KB
Line 
1///////////////////////////////////////////////////////////////////////////////////
2// File     : kernel_init.c
3// Date     : 26/05/2012
4// Authors  : alain greiner & mohamed karaoui
5// Copyright (c) UPMC-LIP6
6////////////////////////////////////////////////////////////////////////////////////
7// The kernel_init.c files is part of the GIET-VM nano-kernel.
8// It contains the kernel entry point for the last step of system initialisation.
9// All procs in this phase have their MMU activated, and are running in parallel.
10// Each processor perform the following actions:
11// 1/ contributes to _schedulers_paddr[] initialisation
12// 2/ contributes to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation
13// 3/ computes and set the ICU mask for its private ICU channel
14// 4/ initialises its private TICK timer (if required)
15// 5/ initialises the "idle" task context in its private scheduler
16// 6/ initialises the SP, SR, PTPR, EPC registers
17// 7/ jumps to the user code with an eret.
18////////////////////////////////////////////////////////////////////////////////////
19
20#include <common.h>
21#include <irq_handler.h>
22#include <ctx_handler.h>
23#include <sys_handler.h>
24#include <mapping_info.h>
25#include <giet_config.h>
26#include <mips32_registers.h>
27#include <irq_handler.h>
28#include <vm_handler.h>
29#include <hwr_mapping.h>
30#include <mwmr_channel.h>
31#include <barrier.h>
32#include <drivers.h>
33
34///////////////////////////////////////////////////////////////////////////////////
35// Kernel Global variables
36///////////////////////////////////////////////////////////////////////////////////
37
38__attribute__((section (".kdata"))) 
39unsigned int                    _ptabs_paddr[GIET_NB_VSPACE_MAX]; 
40
41__attribute__((section (".kdata"))) 
42unsigned int                    _ptabs_vaddr[GIET_NB_VSPACE_MAX]; 
43
44__attribute__((section (".kdata"))) 
45static_scheduler_t*             _schedulers_paddr[NB_CLUSTERS*NB_PROCS_MAX]; 
46
47__attribute__((section (".kdata"))) 
48unsigned int                    _idle_stack[NB_CLUSTERS*NB_PROCS_MAX*64]; 
49
50//////////////////////////////////////////////////////////////////////////////////
51// This function is the entry point for the last step of the boot sequence.
52//////////////////////////////////////////////////////////////////////////////////
53__attribute__((section (".kinit"))) void _kernel_init()
54{
55    // compute cluster and local processor index
56    unsigned int        global_pid = _procid();
57    unsigned int    cluster_id = global_pid / NB_PROCS_MAX;
58    unsigned int    proc_id    = global_pid % NB_PROCS_MAX;
59
60    // Step 0 : Compute number of tasks allocated to proc
61
62    unsigned int tasks = _get_tasks_number();
63
64#if GIET_DEBUG_INIT
65_get_lock(&_tty_put_lock);
66_puts("\n[GIET DEBUG] step 0 for processor ");
67_putd( global_pid );
68_puts(" : tasks = ");
69_putd( tasks );
70_puts("\n");
71_release_lock(&_tty_put_lock);
72#endif
73
74    // step 1 : Initialise scheduler physical addresses array
75    //          get scheduler physical address (from CP0 register)
76
77    static_scheduler_t*         psched = (static_scheduler_t*)_get_sched();
78    _schedulers_paddr[global_pid]  = psched;
79
80#if GIET_DEBUG_INIT
81_get_lock(&_tty_put_lock);
82_puts("\n[GIET DEBUG] step 1 for processor ");
83_putd( global_pid );
84_puts(" / scheduler pbase = ");
85_putx( (unsigned int)psched );
86_puts("\n");
87_release_lock(&_tty_put_lock);
88#endif
89
90    // step 2 : initialise page table addresse arrays
91    //          each processor scans all tasks contexts in its
92    //          private scheduler and get VSID, PTAB and PTPR values
93
94    unsigned int ltid;
95
96    for ( ltid = 0 ; ltid < tasks ; ltid++ )
97    {
98        unsigned int vspace_id  = _get_context_slot( ltid , CTX_VSID_ID ); 
99        unsigned int ptab_vaddr = _get_context_slot( ltid , CTX_PTAB_ID ); 
100        unsigned int ptab_paddr = _get_context_slot( ltid , CTX_PTPR_ID ) << 13; 
101
102        _ptabs_vaddr[vspace_id] = ptab_vaddr;
103        _ptabs_paddr[vspace_id] = ptab_paddr;
104
105#if GIET_DEBUG_INIT
106_get_lock(&_tty_put_lock);
107_puts("\n[GIET DEBUG] step 2 for processor ");
108_putd( global_pid );
109_puts(" / vspace ");
110_putd( vspace_id );
111_puts("\n- ptab vbase = ");
112_putx( ptab_vaddr );
113_puts("\n- ptab pbase = ");
114_putx( ptab_paddr );
115_puts("\n");
116_release_lock(&_tty_put_lock);
117#endif
118
119    }
120 
121    // step 3 : compute and set ICU masks
122    //          there is at most 32 interrupts per processor
123    //          software interrupts are not supported yet
124
125    unsigned int irq_id;
126    unsigned int hwi_mask = 0;
127    unsigned int pti_mask = 0;
128
129    for ( irq_id = 0 ; irq_id < 32 ; irq_id++ )
130    {
131        unsigned int entry  = _get_interrupt_vector_entry(irq_id);
132        unsigned int isr    = entry & 0x000000FF;
133
134        if ( (isr == ISR_DMA) || (isr == ISR_IOC) || (isr == ISR_TTY) )
135        {
136             hwi_mask = hwi_mask | 0x1<< irq_id;
137        }
138        else if ( (isr == ISR_SWITCH) || (isr == ISR_TIMER) )
139        { 
140            pti_mask = pti_mask | 0x1<< irq_id;
141        }
142    }
143    _icu_set_mask( cluster_id, proc_id, hwi_mask, 0 ); // set HWI_MASK
144    _icu_set_mask( cluster_id, proc_id, pti_mask, 1 );  // set PTI_MASK
145   
146#if GIET_DEBUG_INIT
147_get_lock(&_tty_put_lock);
148_puts("\n[GIET DEBUG] step 3 for processor ");
149_putd( global_pid );
150_puts("\n - ICU HWI_MASK = ");
151_putx( hwi_mask );
152_puts("\n - ICU PTI_MASK = ");
153_putx( pti_mask );
154_puts("\n");
155_release_lock(&_tty_put_lock);
156#endif
157
158    // step 4 : start TICK timer if more than one task
159    if ( tasks > 1 )
160    {
161        _timer_start( cluster_id, 
162                      proc_id, 
163                      GIET_TICK_VALUE );
164       
165#if GIET_DEBUG_INIT
166_get_lock(&_tty_put_lock);
167_puts("\n[GIET DEBUG] Step 4 for processor ");
168_putd( global_pid );
169_puts(" / context switch activated\n");
170_release_lock(&_tty_put_lock);
171#endif
172   
173    } 
174
175    // step 5 : initialise the "idle" task context
176    //          the SR initialisation value is 0xFF03 because
177    //          the task _ctx_idle() executes in kernel mode...
178    //          it uses the page table of vspace[0]
179 
180    _set_context_slot( IDLE_TASK_INDEX, CTX_RUN_ID,  1 );
181    _set_context_slot( IDLE_TASK_INDEX, CTX_SR_ID,   0xFF03 );
182    _set_context_slot( IDLE_TASK_INDEX, CTX_SP_ID,   (unsigned int)&_idle_stack[global_pid] + 64 );
183    _set_context_slot( IDLE_TASK_INDEX, CTX_RA_ID,   (unsigned int)&_ctx_eret );
184    _set_context_slot( IDLE_TASK_INDEX, CTX_EPC_ID,  (unsigned int)&_ctx_idle );
185    _set_context_slot( IDLE_TASK_INDEX, CTX_LTID_ID, IDLE_TASK_INDEX );
186    _set_context_slot( IDLE_TASK_INDEX, CTX_PTPR_ID, _ptabs_paddr[0] >> 13 );
187
188#if GIET_DEBUG_INIT
189_get_lock(&_tty_put_lock);
190_puts("\n[GIET DEBUG] Step 5 for processor ");
191_putd( global_pid );
192_puts(" / idle task context set\n");
193_release_lock(&_tty_put_lock);
194#endif
195   
196    // step 6 : each processor initialises SP, SR, PTPR, EPC, registers
197    //          with the values corresponding to the first allocated task,
198    //          and starts the "idle" task if there is no task allocated.
199
200    unsigned int task_id;
201
202    if ( tasks == 0 )
203    {
204        task_id = IDLE_TASK_INDEX;
205
206        _get_lock( &_tty_put_lock );
207        _puts("\n [GIET WARNING] No task allocated to processor ");
208        _putd( global_pid );
209        _puts(" => idle\n");
210        _release_lock ( &_tty_put_lock );
211    }
212    else
213    {
214        task_id = 0;
215    }
216       
217    unsigned int    sp_value   = _get_context_slot( task_id, CTX_SP_ID );
218    unsigned int    sr_value   = _get_context_slot( task_id, CTX_SR_ID );
219    unsigned int    ptpr_value = _get_context_slot( task_id, CTX_PTPR_ID );
220    unsigned int    epc_value  = _get_context_slot( task_id, CTX_EPC_ID );
221
222#if GIET_DEBUG_INIT
223_get_lock(&_tty_put_lock);
224_puts("\n[GIET DEBUG] step 6 for processor ");
225_putd( global_pid );
226_puts(" / registers initialised \n");
227_puts("- sp   = ");
228_putx( sp_value );
229_puts("\n");
230_puts("- sr   = ");
231_putx( sr_value );
232_puts("\n");
233_puts("- ptpr = ");
234_putx( ptpr_value<<13 );
235_puts("\n");
236_puts("- epc  = ");
237_putx( epc_value );
238_puts("\n");
239_release_lock(&_tty_put_lock);
240#endif
241
242    // set  registers and jump to user code
243    asm volatile ( "move        $29,    %0              \n"             /* SP <= ctx[CTX_SP_ID] */
244                   "mtc0        %1,             $12             \n"             /* SR <= ctx[CTX_SR_ID] */
245                   "mtc2        %2,             $0              \n"             /* PTPR <= ctx[CTX_PTPR_ID] */
246                   "mtc0        %3,             $14             \n"             /* EPC <= ctx[CTX_EPC_ID] */
247                   "eret                                        \n"             /* jump to user code */
248                   "nop                                         \n"
249                   :
250                   : "r"(sp_value), "r"(sr_value), "r"(ptpr_value), "r"(epc_value) );
251
252} // end _kernel_init()
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