Last change
on this file since 254 was
238,
checked in by alain, 11 years ago
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Major evolution to support physical addresses larger than 32 bits.
The map.xml format has been modified: the vsegs associated to schedulers
are now explicitely defined and mapped in the page tables.
|
File size:
2.3 KB
|
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1 | /********************************************************************************/ |
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2 | /* File : mips32_registers.h */ |
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3 | /* Author : Alain Greiner */ |
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4 | /* Date : 26/03/2012 */ |
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5 | /********************************************************************************/ |
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6 | /* We define mnemonics for MIPS32 registers */ |
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7 | /********************************************************************************/ |
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8 | |
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9 | #ifndef _MIPS32_REGISTER_H |
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10 | #define _MIPS32_REGISTER_H |
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11 | |
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12 | /* processor registers */ |
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13 | |
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14 | #define zero $0 |
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15 | #define at $1 |
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16 | #define v0 $2 |
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17 | #define v1 $3 |
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18 | #define a0 $4 |
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19 | #define a1 $5 |
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20 | #define a2 $6 |
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21 | #define a3 $7 |
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22 | #define t0 $8 |
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23 | #define t1 $9 |
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24 | #define t2 $10 |
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25 | #define t3 $11 |
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26 | #define t4 $12 |
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27 | #define t5 $13 |
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28 | #define t6 $14 |
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29 | #define t7 $15 |
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30 | #define s0 $16 |
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31 | #define s1 $17 |
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32 | #define s2 $18 |
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33 | #define s3 $19 |
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34 | #define s4 $20 |
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35 | #define s5 $21 |
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36 | #define s6 $22 |
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37 | #define s7 $23 |
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38 | #define t8 $24 |
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39 | #define t9 $25 |
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40 | #define k0 $26 |
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41 | #define k1 $27 |
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42 | #define gp $28 |
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43 | #define sp $29 |
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44 | #define fp $30 |
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45 | #define ra $31 |
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46 | |
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47 | /* CP0 registers */ |
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48 | |
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49 | #define CP0_BVAR $8 |
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50 | #define CP0_TIME $9 |
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51 | #define CP0_SR $12 |
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52 | #define CP0_CR $13 |
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53 | #define CP0_EPC $14 |
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54 | #define CP0_PROCID $15,1 |
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55 | #define CP0_SCHED $22,0 |
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56 | #define CP0_SCHED_EXT $22,1 |
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57 | |
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58 | /* CP2 registers */ |
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59 | |
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60 | #define CP2_PTPR $0 |
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61 | #define CP2_MODE $1 |
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62 | #define CP2_ICACHE_FLUSH $2 |
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63 | #define CP2_DCACHE_FLUSH $3 |
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64 | #define CP2_ITLB_INVAL $4 |
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65 | #define CP2_DTLB_INVAL $5 |
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66 | #define CP2_ICACHE_INVAL $6 |
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67 | #define CP2_DCACHE_INVAL $7 |
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68 | #define CP2_ICACHE_PREFETCH $8 |
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69 | #define CP2_DCACHE_PREFETCH $9 |
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70 | #define CP2_SYNC $10 |
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71 | #define CP2_IETR $11 |
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72 | #define CP2_DETR $12 |
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73 | #define CP2_IBVAR $13 |
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74 | #define CP2_DBVAR $14 |
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75 | #define CP2_PARAMS $15 |
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76 | #define CP2_RELEASE $16 |
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77 | #define CP2_DATA_LO $17 |
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78 | #define CP2_DATA_HI $18 |
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79 | #define CP2_ICACHE_INVAL_PA $19 |
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80 | #define CP2_DCACHE_INVAL_PA $20 |
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81 | |
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82 | #endif |
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83 | |
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84 | // Local Variables: |
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85 | // tab-width: 4 |
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86 | // c-basic-offset: 4 |
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87 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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88 | // indent-tabs-mode: nil |
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89 | // End: |
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90 | // vim: filetype=c:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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91 | |
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