[158] | 1 | /********************************************************************************/ |
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| 2 | /* File : reset.S */ |
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| 3 | /* Author : Alain Greiner */ |
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| 4 | /* Date : 26/04/2012 */ |
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| 5 | /********************************************************************************/ |
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| 6 | /* This boot code is for a multi-cluster, multi-processor architecture, */ |
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| 7 | /* running one or several multi-tasks software application(s) defined in the */ |
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| 8 | /* the mapping_info data-structure. */ |
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| 9 | /* It uses the mapping_info data structure to build the page tables, the tasks */ |
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| 10 | /* contexts, and to initialize the peripherals. */ |
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| 11 | /* Processor 0 is in charge of building all pages tables, all tasks contexts */ |
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| 12 | /* and to initialize all peripherals. Other processors are waiting until the */ |
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| 13 | /* mapping_info signature has been modified by processor 0. */ |
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| 14 | /* The entry point is 0xbfc00000, but the actual boot code starts at address */ |
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| 15 | /* 0xbfc00500, and a minimal boot exception handler is implemented at address */ |
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| 16 | /* 0xbfc0380. */ |
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| 17 | /********************************************************************************/ |
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| 18 | |
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| 19 | #include <giet_config.h> |
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| 20 | #include <mips32_registers.h> |
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| 21 | |
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| 22 | #define EXCEP_ORG 0x380 |
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| 23 | #define START_ORG 0x500 |
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| 24 | |
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| 25 | #define OUT_MAPPING_SIGNATURE 0xBABEF00D |
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| 26 | |
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| 27 | .section .boot,"ax",@progbits |
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| 28 | .align 2 |
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| 29 | .set noreorder |
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| 30 | |
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| 31 | /********************************************************/ |
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| 32 | /* reset entry point */ |
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| 33 | /* (address 0xBFC00000 imposed by the hardware) */ |
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| 34 | /********************************************************/ |
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| 35 | boot_reset: |
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| 36 | j boot_start |
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| 37 | nop |
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| 38 | |
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| 39 | /*******************************************************/ |
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| 40 | /* handling exceptions in the boot phase */ |
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| 41 | /* (address 0xBFC00380 imposed by the hardware */ |
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| 42 | /*******************************************************/ |
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| 43 | .align 2 |
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| 44 | .org EXCEP_ORG |
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| 45 | boot_excep: |
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| 46 | la a0, boot_error_string |
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| 47 | jal boot_tty_puts |
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| 48 | nop |
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| 49 | mfc0 a0, CP0_TIME |
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| 50 | jal boot_tty_putw |
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| 51 | nop |
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| 52 | la a0, boot_lf_string |
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| 53 | jal boot_tty_puts |
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| 54 | nop |
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| 55 | |
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| 56 | la a0, boot_epc_string |
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| 57 | jal boot_tty_puts |
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| 58 | nop |
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| 59 | mfc0 a0, CP0_EPC |
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| 60 | jal boot_tty_putw |
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| 61 | nop |
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| 62 | la a0, boot_lf_string |
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| 63 | jal boot_tty_puts |
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| 64 | nop |
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| 65 | |
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| 66 | la a0, boot_cr_string |
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| 67 | jal boot_tty_puts |
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| 68 | nop |
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| 69 | mfc0 a0, CP0_CR |
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| 70 | jal boot_tty_putw |
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| 71 | nop |
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| 72 | la a0, boot_lf_string |
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| 73 | jal boot_tty_puts |
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| 74 | nop |
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| 75 | |
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| 76 | la a0, boot_sr_string |
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| 77 | jal boot_tty_puts |
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| 78 | nop |
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| 79 | mfc0 a0, CP0_SR |
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| 80 | jal boot_tty_putw |
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| 81 | nop |
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| 82 | la a0, boot_lf_string |
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| 83 | jal boot_tty_puts |
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| 84 | nop |
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| 85 | |
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| 86 | la a0, boot_bar_string |
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| 87 | jal boot_tty_puts |
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| 88 | nop |
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| 89 | mfc0 a0, CP0_BAR |
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| 90 | jal boot_tty_putw |
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| 91 | nop |
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| 92 | la a0, boot_lf_string |
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| 93 | jal boot_tty_puts |
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| 94 | nop |
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| 95 | |
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| 96 | j boot_exit |
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| 97 | nop |
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| 98 | |
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| 99 | /*******************************************/ |
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| 100 | /* actual starting point for the boot code */ |
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| 101 | /*******************************************/ |
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| 102 | .align 2 |
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| 103 | .org START_ORG |
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| 104 | |
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| 105 | boot_start: |
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| 106 | /* get the procid */ |
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| 107 | mfc0 k0, CP0_PROCID |
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| 108 | andi k0, k0, 0x3FF /* no more than 1024 processors... */ |
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| 109 | |
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| 110 | /* Only processor 0 does init */ |
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| 111 | bne k0, zero, boot_wait_signature |
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| 112 | nop |
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| 113 | |
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| 114 | /* temporary stack for procesor 0 : 16K */ |
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| 115 | la sp, seg_boot_stack_base |
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| 116 | addiu sp, sp, 0x4000 |
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| 117 | |
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| 118 | /* plat-form initialisation */ |
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| 119 | jal boot_init |
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| 120 | nop |
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| 121 | |
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| 122 | boot_wait_signature: |
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| 123 | la k0, seg_boot_mapping_base |
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| 124 | cache 0x11, 0(k0) /* invalidate local cache copy */ |
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| 125 | lw k0, 0(k0) /* k0 <= mapping_info[0] */ |
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| 126 | li k1, OUT_MAPPING_SIGNATURE |
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| 127 | bne k1, k0, boot_wait_signature |
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| 128 | nop |
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| 129 | |
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| 130 | /* All processors initialize SR / PTPR / SP / EPC / MODE */ |
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| 131 | /* and jump to user code. */ |
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| 132 | |
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| 133 | /* get the procid */ |
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| 134 | mfc0 s0, CP0_PROCID |
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| 135 | andi s0, s0, 0x3FF /* no more than 1024 processors... */ |
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| 136 | |
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| 137 | /* get the scheduler address s2 */ |
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| 138 | li k0, 256 |
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| 139 | li k1, GIET_NB_TASKS_MAX |
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| 140 | mul s2, k1, k0 /* s2 <= sizeof(context_array) */ |
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| 141 | addiu k0, s2, 8 /* k0 <= sizeof(scheduler_t) */ |
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| 142 | mul k0, k0, s0 /* k0 <= proc_id*sizeof(scheduler_t) */ |
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| 143 | la k1, _scheduler |
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| 144 | addu s1, k1, k0 /* s1 <= &_scheduler[proc_id] */ |
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| 145 | |
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| 146 | /* test number of tasks */ |
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| 147 | addu k1, s1, s2 /* k1 <= &tasks */ |
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| 148 | lw k1, 0(k1) /* k1 <= tasks */ |
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| 149 | beq k1, zero, boot_exit |
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| 150 | nop |
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| 151 | |
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| 152 | /* load SP */ |
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| 153 | li k1, CTX_SP_ID |
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| 154 | sll k1, k1, 2 |
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| 155 | addu k1, s1, k1 |
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| 156 | lw k1, 0(k1) |
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| 157 | move sp, k1 /* sp <= ctx[SP] */ |
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| 158 | |
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| 159 | /* load SR */ |
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| 160 | li k1, CTX_SR_ID |
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| 161 | sll k1, k1, 2 |
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| 162 | addu k1, s1, k1 |
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| 163 | lw k1, 0(k1) |
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| 164 | mtc0 k1, CP0_SR /* sr <= ctx[SR] */ |
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| 165 | |
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| 166 | /* load PTPR */ |
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| 167 | li k1, CTX_PTPR_ID |
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| 168 | sll k1, k1, 2 |
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| 169 | addu k1, s1, k1 |
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| 170 | lw k1, 0(k1) |
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| 171 | mtc2 k1, CP2_PTPR /* ptpr <= ctx[PTPR] */ |
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| 172 | |
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| 173 | /* load EPC */ |
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| 174 | li k1, CTX_EPC_ID |
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| 175 | sll k1, k1, 2 |
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| 176 | addu k1, s1, k1 |
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| 177 | lw k1, 0(k1) |
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| 178 | mtc0 k1, CP0_EPC /* epc <= ctx[EPC] */ |
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| 179 | |
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| 180 | /* activates MMU */ |
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| 181 | li k1, 0xF |
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| 182 | mtc2 k1, CP2_MODE /* load MODE register */ |
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| 183 | |
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| 184 | /* jump to user's code in user mode */ |
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| 185 | eret |
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| 186 | |
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| 187 | boot_error_string: .asciiz "\n[BOOT] Fatal Error at cycle" |
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| 188 | boot_sp_string: .asciiz " SP = " |
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| 189 | boot_sr_string: .asciiz " SR = " |
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| 190 | boot_cr_string: .asciiz " CR = " |
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| 191 | boot_epc_string: .asciiz " EPC = " |
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| 192 | boot_ptpr_string: .asciiz " PTPR = " |
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| 193 | boot_bar_string: .asciiz " BAR = " |
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| 194 | boot_lf_string: .asciiz "\n" |
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| 195 | |
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| 196 | .set reorder |
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| 197 | |
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| 198 | |
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