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reset.S @ 160

Last change on this file since 160 was 158, checked in by alain, 12 years ago
Introducing the giet_vm and some example applications
File size: 5.3 KB

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1	/********************************************************************************/
2	/* File : reset.S */
3	/* Author : Alain Greiner */
4	/* Date : 26/04/2012 */
5	/********************************************************************************/
6	/* This boot code is for a multi-cluster, multi-processor architecture, */
7	/* running one or several multi-tasks software application(s) defined in the */
8	/* the mapping_info data-structure. */
9	/* It uses the mapping_info data structure to build the page tables, the tasks */
10	/* contexts, and to initialize the peripherals. */
11	/* Processor 0 is in charge of building all pages tables, all tasks contexts */
12	/* and to initialize all peripherals. Other processors are waiting until the */
13	/* mapping_info signature has been modified by processor 0. */
14	/* The entry point is 0xbfc00000, but the actual boot code starts at address */
15	/* 0xbfc00500, and a minimal boot exception handler is implemented at address */
16	/* 0xbfc0380. */
17	/********************************************************************************/
18
19	#include <giet_config.h>
20	#include <mips32_registers.h>
21
22	#define EXCEP_ORG 0x380
23	#define START_ORG 0x500
24
25	#define OUT_MAPPING_SIGNATURE 0xBABEF00D
26
27	.section .boot,"ax",@progbits
28	.align 2
29	.set noreorder
30
31	/********************************************************/
32	/* reset entry point */
33	/* (address 0xBFC00000 imposed by the hardware) */
34	/********************************************************/
35	boot_reset:
36	j boot_start
37	nop
38
39	/*******************************************************/
40	/* handling exceptions in the boot phase */
41	/* (address 0xBFC00380 imposed by the hardware */
42	/*******************************************************/
43	.align 2
44	.org EXCEP_ORG
45	boot_excep:
46	la a0, boot_error_string
47	jal boot_tty_puts
48	nop
49	mfc0 a0, CP0_TIME
50	jal boot_tty_putw
51	nop
52	la a0, boot_lf_string
53	jal boot_tty_puts
54	nop
55
56	la a0, boot_epc_string
57	jal boot_tty_puts
58	nop
59	mfc0 a0, CP0_EPC
60	jal boot_tty_putw
61	nop
62	la a0, boot_lf_string
63	jal boot_tty_puts
64	nop
65
66	la a0, boot_cr_string
67	jal boot_tty_puts
68	nop
69	mfc0 a0, CP0_CR
70	jal boot_tty_putw
71	nop
72	la a0, boot_lf_string
73	jal boot_tty_puts
74	nop
75
76	la a0, boot_sr_string
77	jal boot_tty_puts
78	nop
79	mfc0 a0, CP0_SR
80	jal boot_tty_putw
81	nop
82	la a0, boot_lf_string
83	jal boot_tty_puts
84	nop
85
86	la a0, boot_bar_string
87	jal boot_tty_puts
88	nop
89	mfc0 a0, CP0_BAR
90	jal boot_tty_putw
91	nop
92	la a0, boot_lf_string
93	jal boot_tty_puts
94	nop
95
96	j boot_exit
97	nop
98
99	/*******************************************/
100	/* actual starting point for the boot code */
101	/*******************************************/
102	.align 2
103	.org START_ORG
104
105	boot_start:
106	/* get the procid */
107	mfc0 k0, CP0_PROCID
108	andi k0, k0, 0x3FF /* no more than 1024 processors... */
109
110	/* Only processor 0 does init */
111	bne k0, zero, boot_wait_signature
112	nop
113
114	/* temporary stack for procesor 0 : 16K */
115	la sp, seg_boot_stack_base
116	addiu sp, sp, 0x4000
117
118	/* plat-form initialisation */
119	jal boot_init
120	nop
121
122	boot_wait_signature:
123	la k0, seg_boot_mapping_base
124	cache 0x11, 0(k0) /* invalidate local cache copy */
125	lw k0, 0(k0) /* k0 <= mapping_info[0] */
126	li k1, OUT_MAPPING_SIGNATURE
127	bne k1, k0, boot_wait_signature
128	nop
129
130	/* All processors initialize SR / PTPR / SP / EPC / MODE */
131	/* and jump to user code. */
132
133	/* get the procid */
134	mfc0 s0, CP0_PROCID
135	andi s0, s0, 0x3FF /* no more than 1024 processors... */
136
137	/* get the scheduler address s2 */
138	li k0, 256
139	li k1, GIET_NB_TASKS_MAX
140	mul s2, k1, k0 /* s2 <= sizeof(context_array) */
141	addiu k0, s2, 8 /* k0 <= sizeof(scheduler_t) */
142	mul k0, k0, s0 /* k0 <= proc_idsizeof(scheduler_t) /
143	la k1, _scheduler
144	addu s1, k1, k0 /* s1 <= &_scheduler[proc_id] */
145
146	/* test number of tasks */
147	addu k1, s1, s2 /* k1 <= &tasks */
148	lw k1, 0(k1) /* k1 <= tasks */
149	beq k1, zero, boot_exit
150	nop
151
152	/* load SP */
153	li k1, CTX_SP_ID
154	sll k1, k1, 2
155	addu k1, s1, k1
156	lw k1, 0(k1)
157	move sp, k1 /* sp <= ctx[SP] */
158
159	/* load SR */
160	li k1, CTX_SR_ID
161	sll k1, k1, 2
162	addu k1, s1, k1
163	lw k1, 0(k1)
164	mtc0 k1, CP0_SR /* sr <= ctx[SR] */
165
166	/* load PTPR */
167	li k1, CTX_PTPR_ID
168	sll k1, k1, 2
169	addu k1, s1, k1
170	lw k1, 0(k1)
171	mtc2 k1, CP2_PTPR /* ptpr <= ctx[PTPR] */
172
173	/* load EPC */
174	li k1, CTX_EPC_ID
175	sll k1, k1, 2
176	addu k1, s1, k1
177	lw k1, 0(k1)
178	mtc0 k1, CP0_EPC /* epc <= ctx[EPC] */
179
180	/* activates MMU */
181	li k1, 0xF
182	mtc2 k1, CP2_MODE /* load MODE register */
183
184	/* jump to user's code in user mode */
185	eret
186
187	boot_error_string: .asciiz "\n[BOOT] Fatal Error at cycle"
188	boot_sp_string: .asciiz " SP = "
189	boot_sr_string: .asciiz " SR = "
190	boot_cr_string: .asciiz " CR = "
191	boot_epc_string: .asciiz " EPC = "
192	boot_ptpr_string: .asciiz " PTPR = "
193	boot_bar_string: .asciiz " BAR = "
194	boot_lf_string: .asciiz "\n"
195
196	.set reorder
197
198

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