[160] | 1 | /********************************************************************************/ |
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| 2 | /* File : reset.S */ |
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| 3 | /* Author : Alain Greiner & mohamed karaoui */ |
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| 4 | /* Date : 26/04/2012 */ |
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| 5 | /********************************************************************************/ |
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| 6 | /* This file contain a function wich is called by init.s*/ |
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| 7 | /* after initialising the peripherals and the shedulers.*/ |
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| 8 | /* this _task_init function write the (procid+1) at the */ |
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| 9 | /* first word of the mapping_base_info, to "wakeup" the */ |
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| 10 | /* the processors wich id correspond to (procid+1) */ |
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| 11 | /* ...TODO */ |
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| 12 | /********************************************************************************/ |
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| 13 | |
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| 14 | #include <giet_config.h> |
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| 15 | #include <mips32_registers.h> |
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| 16 | |
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| 17 | .section .kinitentry,"ax",@progbits |
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| 18 | .align 2 |
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| 19 | .set noreorder |
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| 20 | |
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| 21 | /* get the procid */ |
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| 22 | mfc0 k0, CP0_PROCID |
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| 23 | andi k0, k0, 0x3FF /* no more than 1024 processors... */ |
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| 24 | |
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| 25 | /* All processors jump to _task_init excepte the processor 0 */ |
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| 26 | bne k0, zero, _task_init |
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| 27 | nop |
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| 28 | |
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| 29 | /* plat-form initialisation */ |
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| 30 | jal _init |
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| 31 | nop |
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| 32 | |
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| 33 | _task_init: |
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| 34 | |
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| 35 | /* get the scheduler address */ |
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| 36 | li k0, 256 |
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| 37 | li k1, GIET_NB_TASKS_MAX |
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| 38 | mul s2, k1, k0 /* s2 <= sizeof(context_array) */ |
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| 39 | addiu k0, s2, 8 /* k0 <= sizeof(scheduler_t) */ |
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| 40 | mul k0, k0, s0 /* k0 <= proc_id*sizeof(scheduler_t) */ |
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| 41 | la k1, _scheduler |
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| 42 | addu s1, k1, k0 /* s1 <= &_scheduler[proc_id] */ |
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| 43 | |
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| 44 | /* test number of tasks */ |
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| 45 | addu k1, s1, s2 /* k1 <= &tasks */ |
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| 46 | lw k1, 0(k1) /* k1 <= tasks */ |
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| 47 | beq k1, zero, _task_exit |
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| 48 | nop |
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| 49 | |
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| 50 | /* load SP */ |
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| 51 | li k1, CTX_SP_ID |
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| 52 | sll k1, k1, 2 |
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| 53 | addu k1, s1, k1 |
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| 54 | lw k1, 0(k1) |
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| 55 | move sp, k1 /* sp <= ctx[SP] */ |
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| 56 | |
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| 57 | /* load SR */ |
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| 58 | li k1, CTX_SR_ID |
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| 59 | sll k1, k1, 2 |
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| 60 | addu k1, s1, k1 |
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| 61 | lw k1, 0(k1) |
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| 62 | mtc0 k1, CP0_SR /* sr <= ctx[SR] */ |
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| 63 | |
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| 64 | /* load PTPR, MMU already activeted */ |
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| 65 | li k1, CTX_PTPR_ID |
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| 66 | sll k1, k1, 2 |
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| 67 | addu k1, s1, k1 |
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| 68 | lw k1, 0(k1) |
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| 69 | mtc2 k1, CP2_PTPR /* ptpr <= ctx[PTPR] */ |
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| 70 | |
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| 71 | /* load EPC */ |
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| 72 | li k1, CTX_EPC_ID |
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| 73 | sll k1, k1, 2 |
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| 74 | addu k1, s1, k1 |
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| 75 | lw k1, 0(k1) |
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| 76 | mtc0 k1, CP0_EPC /* epc <= ctx[EPC] */ |
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| 77 | |
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| 78 | /* jump to user's code in user mode */ |
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| 79 | eret #jr ra |
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| 80 | nop |
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| 81 | |
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| 82 | _task_exit: |
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| 83 | j _task_exit |
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| 84 | |
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| 85 | .set reorder |
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| 86 | |
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