[57] | 1 | ################################################################################# |
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| 2 | # File : reset.s |
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| 3 | # Author : Alain Greiner |
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| 4 | # Date : 15/09/2010 |
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| 5 | ################################################################################# |
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| 6 | # This is a boot code for a multi-processor architecture supporting |
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| 7 | # up to 8 processors : |
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| 8 | # - It initializes the Status Register (SR) |
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| 9 | # - It initializes the 8 stack pointers (stack size = 64K) |
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| 10 | # - It initializes the interrupt vector with two ISR addresses. |
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| 11 | # - It configurates the ICU : IRQ_IN[0] & IRQ_IN[1] activated. |
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| 12 | # - It initializes the EPC register, and jumps to the main in user mode. |
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| 13 | ################################################################################# |
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| 14 | |
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| 15 | .section .reset,"ax",@progbits |
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| 16 | |
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| 17 | .extern seg_stack_base |
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| 18 | .extern seg_data_base |
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| 19 | .extern main |
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| 20 | .extern _interrupt_vector |
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| 21 | .extern _isr_tty_get_task0 |
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| 22 | .extern _isr_switch |
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| 23 | |
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| 24 | .globl reset # makes reset an external symbol |
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| 25 | .ent reset |
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| 26 | .align 2 |
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| 27 | |
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| 28 | reset: |
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| 29 | .set noreorder |
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| 30 | |
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| 31 | # initializes stack pointers |
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| 32 | mfc0 $10, $15, 1 |
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| 33 | andi $10, $10, 0xf # $10 <= proc_id |
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| 34 | li $27, 0x10000 # $27 <= 64 K |
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| 35 | mult $27, $10 |
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| 36 | mflo $26 # $26 <= proc_id*64K |
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| 37 | addu $26, $26, $27 # $26 <= (proc_id + 1)*64K |
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| 38 | la $29, seg_stack_base # $29 <= seg_stack_base |
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| 39 | addu $29, $29, $26 # $29 <= seg_stack_base + (proc_id + 1)*64K |
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| 40 | |
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| 41 | # initializes interrupt vector |
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| 42 | la $26, _interrupt_vector # $26 <= interrupt_vector address |
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| 43 | la $27, _isr_switch # |
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| 44 | sw $27, 0($26) # interrupt_vector[0] <= _isr_switch |
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| 45 | la $27, _isr_tty_get_task0 # |
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| 46 | sw $27, 4($26) # interrupt_vector[1] <= _isr_tty_get_task0 |
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| 47 | la $27, _isr_tty_get_task1 # |
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| 48 | sw $27, 8($26) # interrupt_vector[2] <= _isr_tty_get_task1 |
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| 49 | la $27, _isr_tty_get_task2 # |
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| 50 | sw $27, 12($26) # interrupt_vector[3] <= _isr_tty_get_task2 |
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| 51 | la $27, _isr_tty_get_task3 # |
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| 52 | sw $27, 16($26) # interrupt_vector[4] <= _isr_tty_get_task3 |
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| 53 | la $27, _isr_ioc # |
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| 54 | sw $27, 20($26) # interrupt_vector[5] <= _isr_ioc |
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| 55 | la $27, _isr_dma # |
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| 56 | sw $27, 24($26) # interrupt_vector[6] <= _isr_dma |
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| 57 | |
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| 58 | # initializes ICU |
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| 59 | li $27, 0x100000 # $27 <= 1M |
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| 60 | mult $27, $10 |
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| 61 | mflo $27 # $27 <= proc_id*1M |
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| 62 | la $26, seg_icu_base |
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| 63 | addu $26, $26, $27 # $26 <= seg_icu_base + proc_id*1M |
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| 64 | li $27, 0x3 # IRQ_IN[0] & IRQ_IN[1] enabled |
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| 65 | sw $27, 8($26) # ICU_MASK_SET 0x3 |
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| 66 | |
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| 67 | # initializes SR register |
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| 68 | li $26, 0x0000FF13 # IRQ activation |
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| 69 | mtc0 $26, $12 |
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| 70 | |
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| 71 | # jump to main in user mode |
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| 72 | la $26, main |
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| 73 | mtc0 $26, $14 |
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| 74 | eret |
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| 75 | |
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| 76 | .end reset |
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| 77 | .size reset, .-reset |
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| 78 | |
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| 79 | .set reorder |
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