Index: soft/giet_vm/boot/reset.S
===================================================================
--- soft/giet_vm/boot/reset.S	(revision 162)
+++ soft/giet_vm/boot/reset.S	(revision 165)
@@ -1,14 +1,15 @@
 /********************************************************************************/
-/*	File : reset.S								    */
-/*	Author : Alain Greiner	& Mohamed karaoui		*/
-/*	Date : 03/06/2012							    */
+/*	File : reset.S                                                              */
+/*	Author : Alain Greiner	& Mohamed karaoui                                   */
+/*	Date : 03/06/2012							                                */
 /********************************************************************************/
 /* This boot code is for a multi-cluster, multi-processor architecture,		    */
-/* running one or several multi-tasks software application(s) defined in the	*/
+/* running one or several multi-tasks software application(s) defined in    	*/
 /* the mapping_info data-structure.						                        */
-/* It uses the mapping_info data structure to build the page tables.        	*/
-/* Processor 0 is in charge of building all pages tables.                   	*/
+/* Procesor 0 uses the mapping_info data structure to build all page tables    	*/
+/* before jumping to the kernel_init code.										*/
 /* Other processors are waiting until the mapping_info signature has been       */
 /* modified by processor 0 (done while executing kernel_init code).             */
+/* Implementation note:															*/
 /* The entry point is 0xbfc00000, but the actual boot code starts at address	*/
 /* 0xbfc00500, and a minimal boot exception handler is implemented at address	*/
@@ -17,5 +18,5 @@
 		
 #include <giet_config.h>
-#include <mips32_registers.h>
+#include "../sys/mips32_registers.h"
 
 #define EXCEP_ORG    		0x380
@@ -44,52 +45,62 @@
 boot_excep:
     la	a0,	boot_error_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
     mfc0	a0,	CP0_TIME
-	jal	boot_tty_putw
+	jal	boot_putw
 	nop
     la	a0,	boot_lf_string
-    jal	boot_tty_puts
+    jal	boot_puts
+    nop
+
+	la	a0,	boot_pid_string
+    jal	boot_puts
+    nop
+    mfc0	k0,	CP0_PROCID
+    andi	a0,	k0,	0xFFF
+	jal	boot_putw
+    nop
+    la	a0,	boot_lf_string
+    jal	boot_puts
     nop
 
 	la	a0,	boot_epc_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
     mfc0	a0,	CP0_EPC
-
-	jal	boot_tty_putw
+	jal	boot_putw
     nop
     la	a0,	boot_lf_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
 
 	la	a0,	boot_cr_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
     mfc0	a0,	CP0_CR
-	jal	boot_tty_putw
+	jal	boot_putw
     nop
     la	a0,	boot_lf_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
 
 	la	a0,	boot_sr_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
     mfc0	a0,	CP0_SR
-	jal	boot_tty_putw
+	jal	boot_putw
     nop
     la	a0,	boot_lf_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
 
 	la	a0,	boot_bar_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
     mfc0	a0,	CP0_BAR
-	jal	boot_tty_putw
+	jal	boot_putw
     nop
     la	a0,	boot_lf_string
-    jal	boot_tty_puts
+    jal	boot_puts
     nop
 
@@ -101,58 +112,64 @@
 /*******************************************/
     .align 	2
-	.org	START_ORG
+    .org	START_ORG
 
 boot_start:
     /* get the procid */
     mfc0	k0,	CP0_PROCID
-	andi	k0,	k0,	0x3FF	/* no more than 1024 processors... */
+    andi	k0,	k0,	0xFFF	/* no more than 4096 processors... */
 
-	/* Only processor 0 does init */
-	bne	k0,	zero,	boot_wait_signature
+    /* Only processor 0 does init */
+    bne	k0,	zero,	boot_wait_signature
     nop
 
-	/* temporary stack for procesor 0 : 16K */
-	la	    sp,	seg_boot_stack_base
-	addiu	sp,	sp,	0x4000	
+    /* Processor 0 get a temporary stack */
+    la	    sp,	seg_boot_stack_base
+    addiu	sp,	sp,	0x3000				/* SP <= seg_boot_stack + 12K */
 
-    /* plat-form initialisation */
-	jal	boot_init
+    /* Processor 0 initialises all Page Tables */
+    jal	boot_pt_init
     nop
-    j to_kinit
+ 
+    /* jump to kernel_init */
+    j		boot_to_kernel_init
     nop
 
 boot_wait_signature:
+
+    /* all other processors are waiting signature change */
     la  k0, seg_mapping_base
-    cache   0x11,   0(k0)           /* invalidate local cache copy */
-    lw  k0, 0(k0)                   /* k0 <= mapping_info[0] */
+    cache   0x11,   0(k0)				/* invalidate local cache copy */
+    lw  k0, 0(k0)						/* k0 <= mapping_info[0]       */
     li  k1,     OUT_MAPPING_SIGNATURE
     bne k1, k0, boot_wait_signature
     nop
 	
-to_kinit:
-    /* All processors initialize PTPR / MODE */
-    /* and jump to kernel_init code.        				 */
+    /* all other processors get a temporary stack of 256 bytes */
+    la      sp, seg_boot_stack_base
+    addiu   sp, sp, 0x3100				
+    mfc0	k0, CP0_PROCID
+    andi    k0, k0, 0xFFF
+    sll     k0, k0, 8					
+    addu    sp, sp, k0		/* SP <= seg_boot_stack_base + 12K + (pid+1)*256 */
 
-    /* get the procid */
-    mfc0	s0,	CP0_PROCID
-	andi	s0,	s0,	0x3FF		/* no more than 1024 processors... TOFIX*/
+boot_to_kernel_init:
 
-    /* load a PTPR */
-	la	    k1,	_ptabs
+    /* all processors initialize PTPR with PTAB[0] */
+    la	    k1,	_ptabs
     lw	    k1,	0(k1)	
     srl     k1, k1, 13
-    mtc2	k1,	CP2_PTPR 		/* ptpr <= _ptabs[0]  */
+    mtc2	k1,	CP2_PTPR 		/* PTPR <= _ptabs[0]  */
 
-	/* activates MMU */
-	li	    k1,	0xF
-	mtc2	k1,	CP2_MODE             	/* load MODE register */
+	/* all processors activate MMU */
+    li      k1,	0xF
+    mtc2    k1,	CP2_MODE       	/* MODE register */
 
     /* jump to kernel_init */
-	la	    k0,	seg_kernel_init_base
+    la	    k0,	seg_kernel_init_base
     j       k0
     nop
 
-
-boot_error_string:	.asciiz "\n[BOOT] Fatal Error at cycle"
+boot_error_string:	.asciiz "\n[BOOT] Fatal Error in reset.S at cycle "
+boot_pid_string:	.asciiz "    PID  = "
 boot_sr_string:		.asciiz "    SR   = "
 boot_cr_string:		.asciiz "    CR   = "
