Index: soft/giet_vm/sys/irq_handler.c
===================================================================
--- soft/giet_vm/sys/irq_handler.c	(revision 160)
+++ soft/giet_vm/sys/irq_handler.c	(revision 165)
@@ -29,5 +29,5 @@
 // This functions uses an external ICU component (Interrupt Controler Unit)
 // that concentrates up to 32 input interrupts lines. This component
-// can support up to NB_PROCS_MAX output IRQ.
+// can support up to NB_PROCS output IRQ.
 //
 // This component returns the highest priority active interrupt index (smaller
@@ -38,26 +38,30 @@
 // The interrupt vector (32 ISR addresses array stored at _interrupt_vector
 // address) is initialised with the default ISR address. The actual ISR
-// addresses are supposed to be written in the interrupt vector array by the
-// boot code.
+// addresses are supposed to be written in the interrupt vector array 
+// during system initialisation.
 ///////////////////////////////////////////////////////////////////////////////////
 void _int_demux(void)
 {
-    int interrupt_index;
-    _isr_func_t isr;
-
-    // interrupt vector initialisation
-
-
-    /* retrieves the highest priority active interrupt index */
-    if (!_icu_read(ICU_IT_VECTOR, (unsigned int*)&interrupt_index))
+    int				interrupt_index;
+    _isr_func_t		isr;
+    unsigned int	pid = _procid();
+
+    // retrieves the highest priority active interrupt index 
+    if (!_icu_read( pid / NB_PROCS,
+                    pid % NB_PROCS,
+                    ICU_IT_VECTOR,
+                    (unsigned int*)&interrupt_index ) )
     {
-        /* no interrupt is active */
-        if (interrupt_index == -1)
+        if (interrupt_index == -1)	// no interrupt is active 
             return;
 
-        /* call the ISR corresponding to this index */
         isr = _interrupt_vector[interrupt_index];
         isr();
     }
+    else
+    {
+        _puts("\n[GIET ERROR] In _demux function : wrong arguments in _icu_read()\n");
+        _exit();
+    }
 }
 ///////////////////////////////////////////////////////////////////////////////////
@@ -70,22 +74,32 @@
     _puts("\n\n!!! Default ISR !!!\n");
 }
+
 ///////////////////////////////////////////////////////////////////////////////////
 // 	_isr_dma()
-// This ISR acknowledges the interrupt from the dma controller, depending on
-// the proc_id. It reset the global variable _dma_busy[i] for software
-// signaling, after copying the DMA status into the _dma_status[i] variable.
-///////////////////////////////////////////////////////////////////////////////////
-void _isr_dma()
+// This ISR handles up to 8 IRQs generated by 8 independant channels of the
+// multi_dma component. It acknowledges the interrupt and reset the synchronisation
+// variable _dma_busy[i], after copying the status into the _dma_status[i] variable.
+///////////////////////////////////////////////////////////////////////////////////
+void _isr_dma_indexed( unsigned int dma_id )
 {
     volatile unsigned int* dma_address;
-    unsigned int proc_id;
-
-    proc_id = _procid();
-    dma_address = (unsigned int*)&seg_dma_base + (proc_id * DMA_SPAN);
-
-    _dma_status[proc_id] = dma_address[DMA_LEN]; /* save status */
-    _dma_busy[proc_id] = 0;                      /* release DMA */
-    dma_address[DMA_RESET] = 0;         	 /* reset IRQ */
-}
+
+    dma_address = (unsigned int*)&seg_dma_base + (dma_id * DMA_SPAN);
+
+    dma_address[DMA_RESET] = 0;					/* reset IRQ */
+
+    _dma_status[dma_id] = dma_address[DMA_LEN]; /* save status */
+    _dma_busy[dma_id] = 0;                      /* release DMA */
+}
+
+void _isr_dma_0() { _isr_dma_indexed(0); }
+void _isr_dma_1() { _isr_dma_indexed(1); }
+void _isr_dma_2() { _isr_dma_indexed(2); }
+void _isr_dma_3() { _isr_dma_indexed(3); }
+void _isr_dma_4() { _isr_dma_indexed(4); }
+void _isr_dma_5() { _isr_dma_indexed(5); }
+void _isr_dma_6() { _isr_dma_indexed(6); }
+void _isr_dma_7() { _isr_dma_indexed(7); }
+
 ///////////////////////////////////////////////////////////////////////////////////
 // 	_isr_ioc()
@@ -103,4 +117,5 @@
     _ioc_done   = 1;                                /* signals completion */
 }
+
 ///////////////////////////////////////////////////////////////////////////////////
 // 	_isr_timer_* (* = 0,1,2,3,4,5,6,7)
