Index: /soft/giet_vm/boot/boot_init.c =================================================================== --- /soft/giet_vm/boot/boot_init.c (revision 245) +++ /soft/giet_vm/boot/boot_init.c (revision 246) @@ -156,6 +156,6 @@ { unsigned int value; - unsigned int lsb = (unsigned int)paddr; - unsigned int msb = (unsigned int)(paddr >> 32); + unsigned int lsb = (unsigned int) paddr; + unsigned int msb = (unsigned int) (paddr >> 32); asm volatile( @@ -489,9 +489,10 @@ } + // get page table physical base address pt1_pbase = boot_ptabs_paddr[vspace_id]; // get ptd in PT1 - ptd = boot_physical_read( pt1_pbase + 4*ix1 ); + ptd = boot_physical_read(pt1_pbase + 4 * ix1); if ((ptd & PTE_V) == 0) // invalid PTD: compute PT2 base address, @@ -508,6 +509,6 @@ { pt2_pbase = pt1_pbase + PT1_SIZE + PT2_SIZE * pt2_id; - ptd = PTE_V | PTE_T | (unsigned int)(pt2_pbase >> 12); - boot_physical_write( pt1_pbase + 4*ix1 , ptd); + ptd = PTE_V | PTE_T | (unsigned int) (pt2_pbase >> 12); + boot_physical_write( pt1_pbase + 4 * ix1, ptd); boot_next_free_pt2[vspace_id] = pt2_id + 1; } @@ -519,22 +520,22 @@ // set PTE in PT2 : flags & PPN in two 32 bits words - pte_paddr = pt2_pbase + 8*ix2; - boot_physical_write( pte_paddr , flags); - boot_physical_write( pte_paddr + 4 , ppn); - -if ( verbose ) -{ -boot_puts(" / pt1_pbase = "); -boot_putl( pt1_pbase ); -boot_puts(" / ptd = "); -boot_putl( ptd ); -boot_puts(" / pt2_pbase = "); -boot_putl( pt2_pbase ); -boot_puts(" / pte_paddr = "); -boot_putl( pte_paddr ); -boot_puts(" / ppn = "); -boot_putx( ppn ); -boot_puts("/\n"); -} + pte_paddr = pt2_pbase + 8 * ix2; + boot_physical_write(pte_paddr , flags); + boot_physical_write(pte_paddr + 4, ppn); + + if (verbose) + { + boot_puts(" / pt1_pbase = "); + boot_putl( pt1_pbase ); + boot_puts(" / ptd = "); + boot_putl( ptd ); + boot_puts(" / pt2_pbase = "); + boot_putl( pt2_pbase ); + boot_puts(" / pte_paddr = "); + boot_putl( pte_paddr ); + boot_puts(" / ppn = "); + boot_putx( ppn ); + boot_puts("/\n"); + } } // end boot_add_pte() @@ -567,13 +568,14 @@ { vpn = vseg[vseg_id].vbase >> 12; - ppn = (unsigned int)(vseg[vseg_id].pbase >> 12); + ppn = (unsigned int) (vseg[vseg_id].pbase >> 12); + npages = vseg[vseg_id].length >> 12; if ((vseg[vseg_id].length & 0xFFF) != 0) npages++; flags = PTE_V; - if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; - if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; - if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; - if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; + if (vseg[vseg_id].mode & C_MODE_MASK) flags = flags | PTE_C; + if (vseg[vseg_id].mode & X_MODE_MASK) flags = flags | PTE_X; + if (vseg[vseg_id].mode & W_MODE_MASK) flags = flags | PTE_W; + if (vseg[vseg_id].mode & U_MODE_MASK) flags = flags | PTE_U; #if BOOT_DEBUG_PT @@ -705,5 +707,5 @@ vobj[vobj_id].paddr = cur_paddr; - // initialise boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB + // initialize boot_ptabs_vaddr[] & boot_ptabs-paddr[] if PTAB if (vobj[vobj_id].type == VOBJ_TYPE_PTAB) { @@ -725,9 +727,9 @@ boot_ptabs_vaddr[vspace_id] = vobj[vobj_id].vaddr; boot_ptabs_paddr[vspace_id] = vobj[vobj_id].paddr; - + // reset all valid bits in PT1 for ( offset = 0 ; offset < 8192 ; offset = offset + 4) { - boot_physical_write( cur_paddr + offset, 0); + boot_physical_write(cur_paddr + offset, 0); } @@ -998,6 +1000,6 @@ for (vseg_id = vspace[vspace_id].vseg_offset; - vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs); - vseg_id++) + vseg_id < (vspace[vspace_id].vseg_offset + vspace[vspace_id].vsegs); + vseg_id++) { boot_vseg_map(&vseg[vseg_id], vspace_id); @@ -1132,5 +1134,5 @@ boot_puts(vobj[vobj_id].name); boot_puts(" / paddr = "); -boot_putx(vobj[vobj_id].paddr); +boot_putl(vobj[vobj_id].paddr); boot_puts(" / length = "); boot_putx(vobj[vobj_id].length); @@ -1179,5 +1181,5 @@ boot_puts(vobj[vobj_id].name); boot_puts(" / Paddr :"); -boot_putx(vobj[vobj_id].paddr); +boot_putl(vobj[vobj_id].paddr); boot_puts(" / init = "); boot_putx(*addr); @@ -1884,5 +1886,5 @@ // mmu activation ( with page table [Ø] ) - boot_set_mmu_ptpr( (unsigned int)(boot_ptabs_paddr[0] >> 13) ); + boot_set_mmu_ptpr((unsigned int) (boot_ptabs_paddr[0] >> 13)); boot_set_mmu_mode(0xF); @@ -1890,4 +1892,5 @@ boot_putd(boot_proctime()); boot_puts("\n"); + // vobjs initialisation Index: /soft/giet_vm/boot/reset.S =================================================================== --- /soft/giet_vm/boot/reset.S (revision 245) +++ /soft/giet_vm/boot/reset.S (revision 246) @@ -52,11 +52,11 @@ # get the lock protecting TTY0 - la k0, boot_tty0_lock - ll k1, 0(k0) - bnez k1, boot_excep - li k1, 1 - sc k1, 0(k0) - beqz k1, boot_excep - nop + #la k0, boot_tty0_lock + #ll k1, 0(k0) + #bnez k1, boot_excep + #li k1, 1 + #sc k1, 0(k0) + #beqz k1, boot_excep + #nop # display error messages on TTY0 Index: /soft/giet_vm/mappings/1c_4p_four_tsar_generic_mmu.xml =================================================================== --- /soft/giet_vm/mappings/1c_4p_four_tsar_generic_mmu.xml (revision 245) +++ /soft/giet_vm/mappings/1c_4p_four_tsar_generic_mmu.xml (revision 246) @@ -149,5 +149,5 @@ - + Index: /soft/giet_vm/mappings/4c_1p_four.xml =================================================================== --- /soft/giet_vm/mappings/4c_1p_four.xml (revision 245) +++ /soft/giet_vm/mappings/4c_1p_four.xml (revision 246) @@ -246,5 +246,5 @@ - + Index: /soft/giet_vm/sys/ctx_handler.c =================================================================== --- /soft/giet_vm/sys/ctx_handler.c (revision 245) +++ /soft/giet_vm/sys/ctx_handler.c (revision 246) @@ -105,11 +105,12 @@ unsigned int* curr_ctx_vaddr = &(psched->context[curr_task_id][0]); unsigned int* next_ctx_vaddr = &(psched->context[next_task_id][0]); + unsigned int procid = _procid(); + unsigned int local_id = procid % NB_PROCS_MAX; + unsigned int cluster_id = procid / NB_PROCS_MAX; // set current task index psched->current = next_task_id; - //_timer_reset_irq_cpt(cluster_id, local_id); - // commented until not properly supported in soclib - // (the function is not yet present in drivers.c) + _timer_reset_irq_cpt(cluster_id, local_id); _task_switch(curr_ctx_vaddr, next_ctx_vaddr); Index: /soft/giet_vm/sys/drivers.c =================================================================== --- /soft/giet_vm/sys/drivers.c (revision 245) +++ /soft/giet_vm/sys/drivers.c (revision 246) @@ -248,27 +248,42 @@ -//////////////////////////////////////////////// + +/////////////////////////////////////////////////////////////////////// // _timer_reset_irq_cpt() -//////////////////////////////////////////////// -//unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id) { -// // parameters checking -// if (cluster_id >= NB_CLUSTERS) { -// return 1; -// } -// if (local_id >= NB_TIM_CHANNELS) { -// return 2; -// } -// -//#if USE_XICU -//#error // not implemented -//#else -// unsigned int * timer_address = (unsigned int *) ((char *) &seg_tim_base + (cluster_id * GIET_CLUSTER_INCREMENT)); -// unsigned int timer_period = timer_address[local_id * TIMER_SPAN + TIMER_PERIOD]; -// -// timer_address[local_id * TIMER_SPAN + TIMER_PERIOD] = timer_period; -//#endif -// -// return 0; -//} +/////////////////////////////////////////////////////////////////////// +// This function resets the period at the end of which +// an interrupt is sent. To do so, we re-write the period +// ini the proper register, what causes the count to restart. +// The period value is read from the same (TIMER_PERIOD) register, +// this is why in appearance we do nothing useful (read a value +// from a register and write this value in the same register) +// This function is called during a context switch (user or preemptive) +/////////////////////////////////////////////////////////////////////// +unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id) { + // parameters checking + if (cluster_id >= NB_CLUSTERS) { + return 1; + } + if (local_id >= NB_TIM_CHANNELS) { + return 2; + } + +#if USE_XICU + unsigned int * timer_address = (unsigned int *) ((char *) &seg_icu_base + (cluster_id * GIET_CLUSTER_INCREMENT)); + unsigned int timer_period = timer_address[XICU_REG(XICU_PTI_PER, local_id)]; + + // we write 0 first because if the timer is currently running, the corresponding timer counter is not reset + timer_address[XICU_REG(XICU_PTI_PER, local_id)] = 0; + timer_address[XICU_REG(XICU_PTI_PER, local_id)] = timer_period; +#else + // We suppose that the TIMER_MODE register value is 0x3 + unsigned int * timer_address = (unsigned int *) ((char *) &seg_tim_base + (cluster_id * GIET_CLUSTER_INCREMENT)); + unsigned int timer_period = timer_address[local_id * TIMER_SPAN + TIMER_PERIOD]; + + timer_address[local_id * TIMER_SPAN + TIMER_PERIOD] = timer_period; +#endif + + return 0; +} @@ -599,5 +614,5 @@ unsigned int buf_xaddr = 0; // user buffer virtual address in IO space (if IOMMU) paddr_t buf_paddr = 0; // user buffer physical address (if no IOMMU), - + // check buffer alignment if ((unsigned int) user_vaddr & 0x3) @@ -626,10 +641,10 @@ { // get ppn and flags for each vpn - unsigned int ko = _v2p_translate( (page_table_t*)user_pt_vbase, - vpn, - &ppn, - &flags); + unsigned int ko = _v2p_translate((page_table_t *) user_pt_vbase, + vpn, + &ppn, + &flags); // check access rights - if (ko) + if (ko) { _get_lock(&_tty_put_lock); @@ -1254,9 +1269,10 @@ // - length : number of bytes to be transfered. ////////////////////////////////////////////////////////////////////////////////// -unsigned int _fb_sync_write( unsigned int offset, - const void* buffer, - unsigned int length) -{ - unsigned char* fb_address = (unsigned char *) &seg_fbf_base + offset; + +unsigned int _fb_sync_write(unsigned int offset, + const void * buffer, + unsigned int length) +{ + unsigned char * fb_address = (unsigned char *) &seg_fbf_base + offset; memcpy((void *) fb_address, (void *) buffer, length); return 0; Index: /soft/giet_vm/sys/drivers.h =================================================================== --- /soft/giet_vm/sys/drivers.h (revision 245) +++ /soft/giet_vm/sys/drivers.h (revision 246) @@ -19,5 +19,5 @@ unsigned int _timer_stop(unsigned int cluster_id, unsigned int local_id); unsigned int _timer_reset_irq(unsigned int cluster_id, unsigned int local_id); -//unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id); +unsigned int _timer_reset_irq_cpt(unsigned int cluster_id, unsigned int local_id); Index: /soft/giet_vm/sys/irq_handler.c =================================================================== --- /soft/giet_vm/sys/irq_handler.c (revision 245) +++ /soft/giet_vm/sys/irq_handler.c (revision 246) @@ -152,5 +152,5 @@ { // save status & reset IRQ - if (_ioc_get_status((unsigned int *) &_ioc_status )) + if (_ioc_get_status((unsigned int *) &_ioc_status)) { _get_lock(&_tty_put_lock); Index: /soft/giet_vm/sys/kernel_init.c =================================================================== --- /soft/giet_vm/sys/kernel_init.c (revision 245) +++ /soft/giet_vm/sys/kernel_init.c (revision 246) @@ -63,4 +63,5 @@ + ////////////////////////////////////////////////////////////////////////////////// // This function is the entry point for the last step of the boot sequence. @@ -101,7 +102,7 @@ for (ltid = 0; ltid < tasks; ltid++) { - unsigned int vsid = _get_task_slot(ltid , CTX_VSID_ID); - unsigned int ptab = _get_task_slot(ltid , CTX_PTAB_ID); - unsigned int ptpr = _get_task_slot(ltid , CTX_PTPR_ID); + unsigned int vsid = _get_task_slot(ltid , CTX_VSID_ID); + unsigned int ptab = _get_task_slot(ltid , CTX_PTAB_ID); + unsigned int ptpr = _get_task_slot(ltid , CTX_PTPR_ID); _ptabs[vsid] = ptab; Index: /soft/giet_vm/sys/vm_handler.c =================================================================== --- /soft/giet_vm/sys/vm_handler.c (revision 245) +++ /soft/giet_vm/sys/vm_handler.c (revision 246) @@ -38,5 +38,6 @@ // get ptba and update PT2 - if ((pt->pt1[ix1] & PTE_V) == 0) { + if ((pt->pt1[ix1] & PTE_V) == 0) + { _puts("\n[GIET ERROR] in iommu_add_pte2 function\n"); _puts("the IOMMU PT1 entry is not mapped / ix1 = "); @@ -66,5 +67,6 @@ // get ptba and inval PTE2 - if ((pt->pt1[ix1] & PTE_V) == 0) { + if ((pt->pt1[ix1] & PTE_V) == 0) + { _puts("\n[GIET ERROR] in iommu_inval_pte2 function\n"); _puts("the IOMMU PT1 entry is not mapped / ix1 = "); @@ -85,16 +87,16 @@ // Returns 0 if success, 1 if PTE1 or PTE2 unmapped ////////////////////////////////////////////////////////////////////////////// -unsigned int _v2p_translate( page_table_t* pt, - unsigned int vpn, - unsigned int* ppn, - unsigned int* flags ) +unsigned int _v2p_translate(page_table_t * pt, + unsigned int vpn, + unsigned int * ppn, + unsigned int * flags) { - paddr_t ptba; - paddr_t pte2; + paddr_t ptba; + paddr_t pte2; - register unsigned int pte2_msb; - register unsigned int pte2_lsb; - register unsigned int flags_value; - register unsigned int ppn_value; + register unsigned int pte2_msb; + register unsigned int pte2_lsb; + register unsigned int flags_value; + register unsigned int ppn_value; unsigned int ix1 = vpn >> 9; @@ -102,12 +104,15 @@ // check PTE1 mapping - if ((pt->pt1[ix1] & PTE_V) == 0) return 1; + if ((pt->pt1[ix1] & PTE_V) == 0) + { + return 1; + } else { // get physical addresses of pte2 - ptba = (paddr_t)(pt->pt1[ix1] & 0x0FFFFFFF) << 12; - pte2 = ptba + 8*ix2; - pte2_lsb = (unsigned int)pte2; - pte2_msb = (unsigned int)(pte2 >> 32); + ptba = (paddr_t) (pt->pt1[ix1] & 0x0FFFFFFF) << 12; + pte2 = ptba + 8 * ix2; + pte2_lsb = (unsigned int) pte2; + pte2_msb = (unsigned int) (pte2 >> 32); // gets ppn_value and flags_value, after temporary DTLB desactivation @@ -135,5 +140,7 @@ // check PTE2 mapping - if ((flags_value & PTE_V) == 0) return 1; + if ((flags_value & PTE_V) == 0) { + return 1; + } // set return values