- Timestamp:
- Jul 18, 2013, 6:33:38 PM (11 years ago)
- Location:
- soft/giet_vm
- Files:
-
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/Makefile
r244 r249 5 5 DU = mipsel-unknown-elf-objdump 6 6 7 MAP_XML = mappings/4c_1p_ 40.xml7 MAP_XML = mappings/4c_1p_iob.xml 8 8 9 9 SYS_OBJS = build/sys/vm_handler.o \ -
soft/giet_vm/boot/boot_init.c
r246 r249 109 109 { [0 ... GIET_NB_VSPACE_MAX - 1] = 0 }; 110 110 111 // lock protecting TTY0 112 __attribute__((section (".wdata"))) 113 unsigned int boot_tty0_lock = 0; 114 111 115 112 116 ////////////////////////////////////////////////////////////////////////////// … … 504 508 boot_puts("\n[BOOT ERROR] in boot_add_pte() function\n"); 505 509 boot_puts("the length of the ptab vobj is too small\n"); 510 511 boot_puts(" max_pt2 = "); 512 boot_putd( max_pt2 ); 513 boot_puts("\n"); 514 boot_puts(" pt2_id = "); 515 boot_putd( pt2_id ); 516 boot_puts("\n"); 517 506 518 boot_exit(); 507 519 } … … 899 911 if (periph[periph_id].type == PERIPH_TYPE_DMA) 900 912 { 901 if (periph[periph_id].channels !=NB_DMA_CHANNELS)913 if (periph[periph_id].channels > NB_DMA_CHANNELS) 902 914 { 903 915 boot_puts("\n[BOOT ERROR] Too much DMA channels in cluster "); … … 1328 1340 break; 1329 1341 case PERIPH_TYPE_IOB: // vci_io_bridge component 1330 if ( IOMMU_ACTIVE)1342 if (USE_IOB) 1331 1343 { 1332 1344 // TODO -
soft/giet_vm/boot/reset.S
r246 r249 220 220 boot_lf_string: .asciiz "\n" 221 221 222 boot_tty0_lock: .word 0223 224 222 .set reorder 225 223 -
soft/giet_vm/display/main.c
r238 r249 1 1 #include <stdio.h> 2 2 3 #define NBLOCS 32 3 #define NBLOCS 32 // (128 * 128) / 512 4 5 unsigned char buf[128*128] __attribute__((aligned(64))); 4 6 5 7 __attribute__((constructor)) int main(void) 6 8 { 7 unsigned char buf[128*128];8 9 unsigned int x; 9 10 unsigned int base = 0; … … 30 31 31 32 // Phase 2 : transfert de buf vers le frame buffer par dma 32 x = giet_fb_ write(0, buf, 128 * 128);33 x = giet_fb_sync_write(0, buf, 128 * 128); 33 34 if ( x ) 34 35 { … … 37 38 } 38 39 40 /* 39 41 giet_tty_printf("fb_write ok at date : %d\n", giet_proctime() ); 40 42 … … 45 47 giet_exit(); 46 48 } 49 */ 47 50 giet_tty_printf("display completed at date = %d \n", giet_proctime()); 48 51 -
soft/giet_vm/giet_config.h
r240 r249 32 32 #define GIET_NB_VSPACE_MAX 64 /* max number of virtual spaces */ 33 33 #define GIET_TICK_VALUE 0x100000 /* context switch period (number of cycles) */ 34 34 #define GIET_USE_IOMMU 0 /* IOMMU activated when non zero */ 35 35 #endif 36 36 -
soft/giet_vm/mappings/4c_1p_display.xml
r232 r249 1 1 <?xml version="1.0"?> 2 2 3 <mapping_info signature = "0xdeadbeef" name = "4c_1p_display" cluster_x = "2" cluster_y = "2" vspaces = "1" > 3 <mapping_info signature = "0xdeadbeef" 4 name = "4c_1p_40" 5 cluster_x = "2" 6 cluster_y = "2" 7 vspaces = "1"> 8 9 *** This first section describes an instance of the "tsar_generic_iob" architecture 10 *** with 4 clusters, 1 processor per cluster and 40 bits physical address. 4 11 5 12 <clusterset> 6 13 7 14 <cluster index = "0" > 8 9 <pseg name = "PSEG_RAM" type = "RAM" base = "0x00000000" length = "0x00C00000" /> 10 <pseg name = "PSEG_XICU" type = "PERI" base = "0x00F00000" length = "0x00001000" /> 11 <pseg name = "PSEG_DMA" type = "PERI" base = "0x00F30000" length = "0x00008000" /> 12 13 <proc index = "0" > 14 <irq type = "HARD" icuid = "0" isr = "ISR_SWITCH" /> 15 <irq type = "HARD" icuid = "8" isr = "ISR_DMA" channel = "0" /> 16 </proc> 17 18 <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> 19 <periph type = "XICU" psegname = "PSEG_XICU" channels = "1" /> 20 21 </cluster> 22 <cluster index = "1" > 23 24 <pseg name = "PSEG_RAM" type = "RAM" base = "0x40000000" length = "0x00C00000" /> 25 <pseg name = "PSEG_XICU" type = "PERI" base = "0x40F00000" length = "0x00001000" /> 26 <pseg name = "PSEG_DMA" type = "PERI" base = "0x40F30000" length = "0x00008000" /> 27 28 <proc index = "0" > 29 <irq type = "HARD" icuid = "0" isr = "ISR_SWITCH" /> 30 <irq type = "HARD" icuid = "8" isr = "ISR_DMA" channel = "0" /> 31 </proc> 32 33 <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> 34 <periph type = "XICU" psegname = "PSEG_XICU" channels = "1" /> 35 36 </cluster> 37 <cluster index = "2" > 38 39 <pseg name = "PSEG_RAM" type = "RAM" base = "0x80000000" length = "0x00C00000" /> 40 <pseg name = "PSEG_XICU" type = "PERI" base = "0x80F00000" length = "0x00001000" /> 41 <pseg name = "PSEG_DMA" type = "PERI" base = "0x80F30000" length = "0x00008000" /> 15 <pseg name = "PSEG_RAM" type = "RAM" base = "0x0000000000" length = "0x0010000000" /> 16 <pseg name = "PSEG_XICU" type = "PERI" base = "0x00B0000000" length = "0x0000002000" /> 17 <pseg name = "PSEG_DMA" type = "PERI" base = "0x00B1000000" length = "0x0000008000" /> 18 <pseg name = "PSEG_MMC" type = "PERI" base = "0x00B2000000" length = "0x0000001000" /> 42 19 43 20 *** Boot ROM and non replicated peripherals 44 21 45 <pseg name = "PSEG_FBF" type = "PERI" base = "0xBFD00000" length = "0x00200000" /> 46 <pseg name = "PSEG_TTY" type = "PERI" base = "0xBFF20000" length = "0x00001000" /> 47 <pseg name = "PSEG_IOC" type = "PERI" base = "0xBFF10000" length = "0x00001000" /> 48 <pseg name = "PSEG_NIC" type = "PERI" base = "0xBFF80000" length = "0x00021000" /> 49 <pseg name = "PSEG_ROM" type = "ROM" base = "0xBFC00000" length = "0x00100000" /> 22 <pseg name = "PSEG_IOC" type = "PERI" base = "0x00B3000000" length = "0x0000001000" /> 23 <pseg name = "PSEG_TTY" type = "PERI" base = "0x00B4000000" length = "0x0000001000" /> 24 <pseg name = "PSEG_NIC" type = "PERI" base = "0x00B5000000" length = "0x0000080000" /> 25 <pseg name = "PSEG_CMA" type = "PERI" base = "0x00B6000000" length = "0x0000008000" /> 26 <pseg name = "PSEG_FBF" type = "PERI" base = "0x00B7000000" length = "0x0000004000" /> 27 <pseg name = "PSEG_IOB" type = "PERI" base = "0x00BE000000" length = "0x0000100000" /> 28 <pseg name = "PSEG_ROM" type = "ROM" base = "0x00BFC00000" length = "0x0000100000" /> 50 29 51 30 <proc index = "0" > … … 70 49 </proc> 71 50 72 <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> 73 <periph type = "XICU" psegname = "PSEG_XICU" channels = "1" /> 74 <periph type = "IOC" psegname = "PSEG_IOC" channels = "1" /> 75 <periph type = "TTY" psegname = "PSEG_TTY" channels = "2" /> 76 <periph type = "NIC" psegname = "PSEG_NIC" channels = "8" /> 77 <periph type = "FBF" psegname = "PSEG_FBF" /> 78 79 </cluster> 80 <cluster index = "3" > 81 82 <pseg name = "PSEG_RAM" type = "RAM" base = "0xC0000000" length = "0x00C00000" /> 83 <pseg name = "PSEG_XICU" type = "PERI" base = "0xC0F00000" length = "0x00001000" /> 84 <pseg name = "PSEG_DMA" type = "PERI" base = "0xC0F30000" length = "0x00008000" /> 51 <periph type = "DMA" psegname = "PSEG_DMA" channels = "4" /> 52 <periph type = "XICU" psegname = "PSEG_XICU" channels = "18" /> 53 <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> 54 <periph type = "IOC" psegname = "PSEG_IOC" channels = "1" /> 55 <periph type = "TTY" psegname = "PSEG_TTY" channels = "8" /> 56 <periph type = "NIC" psegname = "PSEG_NIC" channels = "2" /> 57 <periph type = "CMA" psegname = "PSEG_CMA" channels = "4" /> 58 <periph type = "FBF" psegname = "PSEG_FBF" channels = "1" /> 59 <periph type = "IOB" psegname = "PSEG_IOB" channels = "1" /> 60 </cluster> 61 62 <cluster index = "1" > 63 <pseg name = "PSEG_RAM" type = "RAM" base = "0x4000000000" length = "0x0010000000" /> 64 <pseg name = "PSEG_XICU" type = "PERI" base = "0x40B0000000" length = "0x0000002000" /> 65 <pseg name = "PSEG_DMA" type = "PERI" base = "0x40B1000000" length = "0x0000008000" /> 66 <pseg name = "PSEG_MMC" type = "PERI" base = "0x40B2000000" length = "0x0000001000" /> 67 68 <proc index = "0" > 69 <irq type = "HARD" icuid = "0" isr = "ISR_SWITCH" /> 70 <irq type = "HARD" icuid = "8" isr = "ISR_DMA" channel = "0" /> 71 </proc> 72 73 <periph type = "DMA" psegname = "PSEG_DMA" channels = "4" /> 74 <periph type = "XICU" psegname = "PSEG_XICU" channels = "2" /> 75 <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> 76 </cluster> 77 78 <cluster index = "2" > 79 <pseg name = "PSEG_RAM" type = "RAM" base = "0x8000000000" length = "0x0010000000" /> 80 <pseg name = "PSEG_XICU" type = "PERI" base = "0x80B0000000" length = "0x0000002000" /> 81 <pseg name = "PSEG_DMA" type = "PERI" base = "0x80B1000000" length = "0x0000008000" /> 82 <pseg name = "PSEG_MMC" type = "PERI" base = "0x80B2000000" length = "0x0000001000" /> 85 83 86 84 <proc index = "0" > … … 89 87 </proc> 90 88 91 <periph type = "DMA" psegname = "PSEG_DMA" channels = "1" /> 92 <periph type = "XICU" psegname = "PSEG_XICU" channels = "1" /> 93 </cluster> 89 <periph type = "DMA" psegname = "PSEG_DMA" channels = "4" /> 90 <periph type = "XICU" psegname = "PSEG_XICU" channels = "2" /> 91 <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> 92 </cluster> 93 94 <cluster index = "3" > 95 <pseg name = "PSEG_RAM" type = "RAM" base = "0xC000000000" length = "0x0010000000" /> 96 <pseg name = "PSEG_XICU" type = "PERI" base = "0xC0B0000000" length = "0x0000002000" /> 97 <pseg name = "PSEG_DMA" type = "PERI" base = "0xC0B1000000" length = "0x0000008000" /> 98 <pseg name = "PSEG_MMC" type = "PERI" base = "0xC0B2000000" length = "0x0000001000" /> 99 100 <proc index = "0" > 101 <irq type = "HARD" icuid = "0" isr = "ISR_SWITCH" /> 102 <irq type = "HARD" icuid = "8" isr = "ISR_DMA" channel = "0" /> 103 </proc> 104 105 <periph type = "DMA" psegname = "PSEG_DMA" channels = "4" /> 106 <periph type = "XICU" psegname = "PSEG_XICU" channels = "2" /> 107 <periph type = "MMC" psegname = "PSEG_MMC" channels = "1" /> 108 </cluster> 109 94 110 </clusterset> 95 111 96 112 <globalset> 97 <vseg name = "seg_boot_code" vbase = "0xbfc00000" mode = "CXW_" clusterid = "2" psegname = "PSEG_ROM" ident = "1" > 113 114 *** segments used by the boot code / A[31:28] = 0xB / Identity mapping 115 116 <vseg name = "seg_boot_code" vbase = "0xBFC00000" mode = "CXW_" clusterid = "0" psegname = "PSEG_ROM" ident = "1" > 98 117 <vobj name = "boot_code" type = "ELF" length = "0x00008000" binpath = "build/boot/boot.elf" /> 99 118 </vseg> 100 <vseg name = "seg_boot_stack" vbase = "0xbfc08000" mode = "C_W_" clusterid = "2" psegname = "PSEG_ROM" ident = "1" > 101 <vobj name = "boot_stack" type = "BUFFER" length = "0x00004000" /> 102 </vseg> 103 <vseg name = "seg_boot_mapping" vbase = "0xbfc0c000" mode = "C_W_" clusterid = "2" psegname = "PSEG_ROM" ident = "1" > 119 <vseg name = "seg_boot_data" vbase = "0x00000000" mode = "C_W_" clusterid = "0" psegname = "PSEG_RAM" ident = "1" > 120 <vobj name = "boot_data" type = "ELF" length = "0x00001000" binpath = "build/boot/boot.elf" /> 121 </vseg> 122 <vseg name = "seg_boot_stack" vbase = "0x00001000" mode = "C_W_" clusterid = "0" psegname = "PSEG_RAM" ident = "1" > 123 <vobj name = "boot_stack" type = "BUFFER" length = "0x00003000" /> 124 </vseg> 125 <vseg name = "seg_boot_mapping" vbase = "0x00004000" mode = "C_W_" clusterid = "0" psegname = "PSEG_RAM" ident = "1" > 104 126 <vobj name = "boot_mapping" type = "BLOB" length = "0x00004000" binpath = "map.bin" /> 105 127 </vseg> 106 128 107 *** On voudrait répliquer le segment de code du systÚme (seg_kernel_code) dans tous les clusters... 129 *** segments for non replicated peripherals / A[31:28] = 0xB / Identity mapping 130 131 <vseg name = "seg_iob" vbase = "0xBE000000" mode = "__W_" clusterid = "0" psegname = "PSEG_IOB" ident = "1" > 132 <vobj name = "iob" type = "PERI" length = "0x00001000" /> 133 </vseg> 134 <vseg name = "seg_ioc" vbase = "0xB3000000" mode = "__W_" clusterid = "0" psegname = "PSEG_IOC" ident = "1" > 135 <vobj name = "ioc" type = "PERI" length = "0x00001000" /> 136 </vseg> 137 <vseg name = "seg_tty" vbase = "0xB4000000" mode = "__W_" clusterid = "0" psegname = "PSEG_TTY" ident = "1" > 138 <vobj name = "tty" type = "PERI" length = "0x00001000" /> 139 </vseg> 140 <vseg name = "seg_nic" vbase = "0xB5000000" mode = "__W_" clusterid = "0" psegname = "PSEG_NIC" ident = "1" > 141 <vobj name = "nic" type = "PERI" length = "0x00080000" /> 142 </vseg> 143 <vseg name = "seg_cma" vbase = "0xB6000000" mode = "__W_" clusterid = "0" psegname = "PSEG_CMA" ident = "1" > 144 <vobj name = "cma" type = "PERI" length = "0x00008000" /> 145 </vseg> 146 <vseg name = "seg_fbf" vbase = "0xB7000000" mode = "__W_" clusterid = "0" psegname = "PSEG_FBF" ident = "1" > 147 <vobj name = "fbf" type = "PERI" length = "0x00004000" /> 148 </vseg> 149 150 *** segments used by the kernel / A[31:28] = 0x8 108 151 109 152 <vseg name = "seg_kernel_code" vbase = "0x80000000" mode = "CX__" clusterid = "0" psegname = "PSEG_RAM" > 110 153 <vobj name = "kernel_code" type = "ELF" length = "0x00010000" binpath = "build/sys/sys.elf" /> 111 154 </vseg> 112 <vseg name = "seg_kernel_data" vbase = "0x800 10000" mode = "C_W_" clusterid = "0" psegname = "PSEG_RAM" >155 <vseg name = "seg_kernel_data" vbase = "0x80020000" mode = "C_W_" clusterid = "0" psegname = "PSEG_RAM" > 113 156 <vobj name = "kernel_data" type = "ELF" length = "0x00040000" binpath = "build/sys/sys.elf" /> 114 157 </vseg> … … 120 163 </vseg> 121 164 122 *** Non replicated peripherals 123 124 <vseg name = "seg_ioc" vbase = "0xbff10000" mode = "__W_" clusterid = "2" psegname = "PSEG_IOC" ident = "1" > 125 <vobj name = "ioc" type = "PERI" length = "0x00001000" /> 126 </vseg> 127 <vseg name = "seg_tty" vbase = "0xbff20000" mode = "__W_" clusterid = "2" psegname = "PSEG_TTY" ident = "1" > 128 <vobj name = "tty" type = "PERI" length = "0x00001000" /> 129 </vseg> 130 <vseg name = "seg_fbf" vbase = "0xbfd00000" mode = "__W_" clusterid = "2" psegname = "PSEG_FBF" ident = "1" > 131 <vobj name = "fbf" type = "PERI" length = "0x00200000" /> 132 </vseg> 133 <vseg name = "seg_nic" vbase = "0xbff80000" mode = "__W_" clusterid = "2" psegname = "PSEG_NIC" ident = "1" > 134 <vobj name = "nic" type = "PERI" length = "0x00021000" /> 135 </vseg> 136 137 *** On pourrait supprimer les vsegs associés aux composants XICU en les traitant comme les schedulers : 138 *** accÚs en addresse physique et stockage de l'adresse de base de chaque XICU dans chaque processeur. 139 *** On peut aussi définir un vseg factorisé en introduisant le CLUSTER_SIZE... 140 141 <vseg name = "seg_icu_0" vbase = "0x00f00000" mode = "__W_" clusterid = "0" psegname = "PSEG_XICU" > 165 *** segments for replicated ICUS / A[31:28] = 0xE / Increment = 0x100000 166 167 <vseg name = "seg_icu_0" vbase = "0xE0000000" mode = "__W_" clusterid = "0" psegname = "PSEG_XICU" > 142 168 <vobj name = "icu_0" type = "PERI" length = "0x00001000" /> 143 169 </vseg> 144 <vseg name = "seg_icu_1" vbase = "0x 40f00000" mode = "__W_" clusterid = "1" psegname = "PSEG_XICU" >170 <vseg name = "seg_icu_1" vbase = "0xE0100000" mode = "__W_" clusterid = "1" psegname = "PSEG_XICU" > 145 171 <vobj name = "icu_1" type = "PERI" length = "0x00001000" /> 146 172 </vseg> 147 <vseg name = "seg_icu_2" vbase = "0x 80f00000" mode = "__W_" clusterid = "2" psegname = "PSEG_XICU" >173 <vseg name = "seg_icu_2" vbase = "0xE0200000" mode = "__W_" clusterid = "2" psegname = "PSEG_XICU" > 148 174 <vobj name = "icu_2" type = "PERI" length = "0x00001000" /> 149 175 </vseg> 150 <vseg name = "seg_icu_3" vbase = "0x c0f00000" mode = "__W_" clusterid = "3" psegname = "PSEG_XICU" >176 <vseg name = "seg_icu_3" vbase = "0xE0300000" mode = "__W_" clusterid = "3" psegname = "PSEG_XICU" > 151 177 <vobj name = "icu_3" type = "PERI" length = "0x00001000" /> 152 178 </vseg> 153 179 154 *** Il faudrait trouver un moyen de supprimer les vsegs associés aux composants DMA distribués, ou de les factoriser...155 156 <vseg name = "seg_dma_0" vbase = "0x 00f30000" mode = "__W_" clusterid = "0" psegname = "PSEG_DMA" >180 *** segments for replicated DMAs / A[31:28] = 0xD / Increment = 0x100000 181 182 <vseg name = "seg_dma_0" vbase = "0xD0000000" mode = "__W_" clusterid = "0" psegname = "PSEG_DMA" > 157 183 <vobj name = "dma_0" type = "PERI" length = "0x00008000" /> 158 184 </vseg> 159 <vseg name = "seg_dma_1" vbase = "0x 40f30000" mode = "__W_" clusterid = "1" psegname = "PSEG_DMA" >185 <vseg name = "seg_dma_1" vbase = "0xD0100000" mode = "__W_" clusterid = "1" psegname = "PSEG_DMA" > 160 186 <vobj name = "dma_1" type = "PERI" length = "0x00008000" /> 161 187 </vseg> 162 <vseg name = "seg_dma_2" vbase = "0x 80f30000" mode = "__W_" clusterid = "2" psegname = "PSEG_DMA" >188 <vseg name = "seg_dma_2" vbase = "0xD0200000" mode = "__W_" clusterid = "2" psegname = "PSEG_DMA" > 163 189 <vobj name = "dma_2" type = "PERI" length = "0x00008000" /> 164 190 </vseg> 165 <vseg name = "seg_dma_3" vbase = "0x c0f30000" mode = "__W_" clusterid = "3" psegname = "PSEG_DMA" >191 <vseg name = "seg_dma_3" vbase = "0xD0300000" mode = "__W_" clusterid = "3" psegname = "PSEG_DMA" > 166 192 <vobj name = "dma_3" type = "PERI" length = "0x00008000" /> 193 </vseg> 194 195 *** segments for replicated MMC / A[31:28] = 0xC / Increment = 0x100000 196 197 <vseg name = "seg_memc_0" vbase = "0xC0000000" mode = "__W_" clusterid = "0" psegname = "PSEG_MMC" > 198 <vobj name = "memc_0" type = "PERI" length = "0x00001000" /> 199 </vseg> 200 <vseg name = "seg_memc_1" vbase = "0xC0100000" mode = "__W_" clusterid = "1" psegname = "PSEG_MMC" > 201 <vobj name = "memc_1" type = "PERI" length = "0x00001000" /> 202 </vseg> 203 <vseg name = "seg_memc_2" vbase = "0xC0200000" mode = "__W_" clusterid = "2" psegname = "PSEG_MMC" > 204 <vobj name = "memc_2" type = "PERI" length = "0x00001000" /> 205 </vseg> 206 <vseg name = "seg_memc_3" vbase = "0xC0300000" mode = "__W_" clusterid = "3" psegname = "PSEG_MMC" > 207 <vobj name = "memc_3" type = "PERI" length = "0x00001000" /> 208 </vseg> 209 210 *** segments for replicated schedulers / A[31:28] = 0xF / Increment = 0x100000 211 212 <vseg name = "seg_sched_0" vbase = "0xF0000000" mode = "C_W_" clusterid = "0" psegname = "PSEG_RAM" > 213 <vobj name = "sched_0" type = "SCHED" length = "0x00008000" /> 214 </vseg> 215 <vseg name = "seg_sched_1" vbase = "0xF0100000" mode = "C_W_" clusterid = "1" psegname = "PSEG_RAM" > 216 <vobj name = "sched_1" type = "SCHED" length = "0x00008000" /> 217 </vseg> 218 <vseg name = "seg_sched_2" vbase = "0xF0200000" mode = "C_W_" clusterid = "2" psegname = "PSEG_RAM" > 219 <vobj name = "sched_2" type = "SCHED" length = "0x00008000" /> 220 </vseg> 221 <vseg name = "seg_sched_3" vbase = "0xF0300000" mode = "C_W_" clusterid = "3" psegname = "PSEG_RAM" > 222 <vobj name = "sched_3" type = "SCHED" length = "0x00008000" /> 167 223 </vseg> 168 224 *** … … 170 226 171 227 <vspaceset> 172 <vspace name = "display" startname = "d ata" >173 <vseg name = "seg_data" vbase = "0x00800000" mode = "C_WU" clusterid = "3" psegname = "PSEG_RAM" >174 <vobj name = "d ata"type = "ELF" length = "0x00010000" binpath = "build/display/display.elf" />228 <vspace name = "display" startname = "disp_data" > 229 <vseg name = "seg_data" vbase = "0x00800000" mode = "C_WU" clusterid = "3" psegname = "PSEG_RAM" > 230 <vobj name = "disp_data" type = "ELF" length = "0x00010000" binpath = "build/display/display.elf" /> 175 231 </vseg> 176 <vseg name = "seg_ ptab" vbase = "0x00300000" mode = "C___" clusterid = "3" psegname = "PSEG_RAM" >177 <vobj name = " ptab" type = "PTAB" length = "0x00012000" align = "13" />232 <vseg name = "seg_code" vbase = "0x00400000" mode = "CX_U" clusterid = "3" psegname = "PSEG_RAM" > 233 <vobj name = "disp_code" type = "ELF" length = "0x00010000" binpath = "build/display/display.elf" /> 178 234 </vseg> 179 <vseg name = "seg_ code" vbase = "0x00400000" mode = "CX_U" clusterid = "3" psegname = "PSEG_RAM" >180 <vobj name = " code" type = "ELF" length = "0x00010000" binpath = "build/display/display.elf" />235 <vseg name = "seg_ptab" vbase = "0x00300000" mode = "C___" clusterid = "3" psegname = "PSEG_RAM" > 236 <vobj name = "ptab" type = "PTAB" length = "0x00020000" align = "13" /> 181 237 </vseg> 182 <vseg name = "seg_stack" vbase = "0x00010000" mode = "C_WU" clusterid = "3" psegname = "PSEG_RAM" >183 <vobj name = "stack" type = "BUFFER" length = "0x00010000" />184 <vobj name = "heap" type= "BUFFER" length = "0x00010000" />238 <vseg name = "seg_stack" vbase = "0x00010000" mode = "C_WU" clusterid = "3" psegname = "PSEG_RAM" > 239 <vobj name = "stack" type = "BUFFER" length = "0x00010000" /> 240 <vobj name = "heap" type = "BUFFER" length = "0x00010000" /> 185 241 </vseg> 186 242 187 <task name = "main_display" clusterid = "3" proclocid = "0" stackname = "stack" heapname = "heap" startid = "0" usetty = "1" use fbdma = "1" />243 <task name = "main_display" clusterid = "3" proclocid = "0" stackname = "stack" heapname = "heap" startid = "0" usetty = "1" usedma = "1" /> 188 244 </vspace> 189 245 </vspaceset> -
soft/giet_vm/sys/common.h
r238 r249 28 28 extern _ld_symbol_t seg_fbf_base; 29 29 extern _ld_symbol_t seg_ioc_base; 30 extern _ld_symbol_t seg_mmc_base; 31 30 32 extern _ld_symbol_t seg_mapping_base; 31 33 extern _ld_symbol_t seg_kernel_pt_base; -
soft/giet_vm/sys/drivers.c
r246 r249 41 41 // - seg_cma_base 42 42 // - seg_iob_base 43 // - seg_mmc_base 43 44 // 44 45 /////////////////////////////////////////////////////////////////////////////////// … … 57 58 #endif 58 59 60 #if (NB_CLUSTERS > 256) 61 # error: NB_CLUSTERS cannot be larger than 256! 62 #endif 63 59 64 #if !defined(NB_PROCS_MAX) 60 65 # error: You must define NB_PROCS_MAX in the hard_config.h file … … 69 74 #endif 70 75 76 #if !defined(GIET_USE_IOMMU) 77 # error: You must define GIET_USE_IOMMU in the giet_config.h file 78 #endif 79 71 80 #if !defined(NB_TTY_CHANNELS) 72 81 # error: You must define NB_TTY_CHANNELS in the hard_config.h file … … 121 130 #endif 122 131 123 #if !defined( IOMMU_ACTIVE)124 # error: You must define IOMMU_ACTIVEin the hard_config.h file132 #if !defined( USE_IOB ) 133 # error: You must define USE_IOB in the hard_config.h file 125 134 #endif 126 135 … … 314 323 315 324 _get_lock(&_tty_put_lock); 316 if (tty_id == 0xFFFFFFFF) { 317 _puts("\n[GIET ERROR] no TTY assigned to the task "); 318 } 319 else { 320 _puts("\n[GIET ERROR] TTY index too large for task "); 321 } 325 if (tty_id == 0xFFFFFFFF) _puts("\n[GIET ERROR] no TTY assigned to the task "); 326 else _puts("\n[GIET ERROR] TTY index too large for task "); 322 327 _putd(task_id); 323 328 _puts(" on processor "); … … 671 676 if (ix2 == 0) ppn_first = ppn; 672 677 673 if ( IOMMU_ACTIVE) // the user buffer must beremapped in the I/0 space678 if ( GIET_USE_IOMMU && USE_IOB ) // user buffer remapped in the I/0 space 674 679 { 675 680 // check buffer length < 2 Mbytes … … 710 715 _ioc_iommu_npages = (user_vpn_max - user_vpn_min) + 1; 711 716 712 // invalidate data cache in case of memory write717 // invalidate local data cache in case of memory write 713 718 if (to_mem) _dcache_buf_invalidate((void *) user_vaddr, length); 714 719 … … 737 742 #endif 738 743 744 // Invalidate L2 cache if IO Bridge is used 745 if ( to_mem && USE_IOB ) _memc_inval( buf_paddr, length ); 746 739 747 // get the lock on ioc device 740 748 _get_lock(&_ioc_lock); 741 749 742 750 // peripheral configuration 743 if ( IOMMU_ACTIVE)751 if ( GIET_USE_IOMMU && USE_IOB ) 744 752 { 745 753 ioc_address[BLOCK_DEVICE_BUFFER] = buf_xaddr; … … 791 799 792 800 // unmap the buffer from IOMMU page table if IOMMU is activated 793 if ( IOMMU_ACTIVE)801 if ( GIET_USE_IOMMU && USE_IOB ) 794 802 { 795 803 unsigned int * iob_address = (unsigned int *) &seg_iob_base; … … 1107 1115 if ( ix2 == 0 ) ppn_first = ppn; 1108 1116 1109 if ( IOMMU_ACTIVE ) // the user buffer must beremapped in the I/0 space1117 if ( GIET_USE_IOMMU && USE_IOB ) // user buffer remapped in the I/0 space 1110 1118 { 1111 1119 // check buffer length < 2 Mbytes … … 1444 1452 } 1445 1453 1454 ////////////////////////////////////////////////////////////////////////////////// 1455 // VciMemCache driver 1456 ////////////////////////////////////////////////////////////////////////////////// 1457 // The VciMemCache device can be accessed through a configuration interface. 1458 // as a set of uncached, memory mapped registers. 1459 /////////////////////////////////////////////////////////////////////////////////// 1460 1461 /////////////////////////////////////////////////////////////////////////////////// 1462 // _memc_inval() 1463 // This function invalidate all cache lines covering a memory buffer defined 1464 // by the physical base address, and the length. 1465 // The buffer address MSB are used to compute the cluster index. 1466 /////////////////////////////////////////////////////////////////////////////////// 1467 void _memc_inval( paddr_t buf_paddr, 1468 unsigned int buf_length ) 1469 { 1470 unsigned int cluster_id = (unsigned int)((buf_paddr>>32)/(256/NB_CLUSTERS)); 1471 1472 unsigned int * mmc_address = (unsigned int *) ((char *) &seg_mmc_base + 1473 (cluster_id * GIET_CLUSTER_INCREMENT)); 1474 1475 // get the lock protecting exclusive access to MEMC 1476 while ( mmc_address[MEMC_LOCK] ) { asm volatile("nop"); } 1477 1478 // write inval arguments 1479 mmc_address[MEMC_ADDR_LO] = (unsigned int)buf_paddr; 1480 mmc_address[MEMC_ADDR_HI] = (unsigned int)(buf_paddr>>32); 1481 mmc_address[MEMC_BUF_LENGTH] = buf_length; 1482 mmc_address[MEMC_CMD_TYPE] = MEMC_CMD_INVAL; 1483 1484 // release the lock protecting MEMC 1485 mmc_address[MEMC_LOCK] = 0; 1486 } 1446 1487 /////////////////////////////////////////////////////////////////////////////////// 1447 1488 // _heap_info() -
soft/giet_vm/sys/drivers.h
r246 r249 8 8 #ifndef _GIET_SYS_DRIVERS_H_ 9 9 #define _GIET_SYS_DRIVERS_H_ 10 11 10 12 11 /////////////////////////////////////////////////////////////////////////////////// … … 113 112 unsigned int _gcd_read( unsigned int register_index, unsigned int * buffer); 114 113 114 /////////////////////////////////////////////////////////////////////////////////// 115 // MEMC access functions 116 /////////////////////////////////////////////////////////////////////////////////// 117 118 void _memc_inval( unsigned long long buf_paddr, unsigned int buf_length); 119 void _memc_sync( unsigned long long buf_paddr, unsigned int buf_length); 115 120 116 121 /////////////////////////////////////////////////////////////////////////////////// -
soft/giet_vm/sys/vm_handler.c
r246 r249 29 29 unsigned int ix2, 30 30 unsigned int ppn, 31 unsigned int flags) { 31 unsigned int flags) 32 { 32 33 unsigned int ptba; 33 34 unsigned int * pt_ppn; … … 38 39 39 40 // get ptba and update PT2 40 if ((pt->pt1[ix1] & PTE_V) == 0) 41 if ((pt->pt1[ix1] & PTE_V) == 0) 41 42 { 43 _get_lock(&_tty_put_lock); 42 44 _puts("\n[GIET ERROR] in iommu_add_pte2 function\n"); 43 45 _puts("the IOMMU PT1 entry is not mapped / ix1 = "); 44 46 _putx( ix1 ); 45 47 _puts("\n"); 48 _release_lock(&_tty_put_lock); 46 49 _exit(); 47 50 } 48 else { 51 else 52 { 49 53 ptba = pt->pt1[ix1] << 12; 50 54 pt_flags = (unsigned int *) (ptba + 8 * ix2); -
soft/giet_vm/xml/mapping_info.h
r244 r249 81 81 PERIPH_TYPE_TIM = 1, 82 82 PERIPH_TYPE_DMA = 2, 83 PERIPH_TYPE_CMA = 3, 84 PERIPH_TYPE_IOC = 4, 85 PERIPH_TYPE_TTY = 5, 86 PERIPH_TYPE_FBF = 6, 87 PERIPH_TYPE_NIC = 7, 88 PERIPH_TYPE_IOB = 8, 89 PERIPH_TYPE_GCD = 9, 90 PERIPH_TYPE_MAX_VALUE = 10, 83 PERIPH_TYPE_MMC = 3, 84 85 PERIPH_TYPE_CMA = 4, 86 PERIPH_TYPE_IOC = 5, 87 PERIPH_TYPE_TTY = 6, 88 PERIPH_TYPE_FBF = 7, 89 PERIPH_TYPE_NIC = 8, 90 PERIPH_TYPE_IOB = 9, 91 PERIPH_TYPE_GCD = 10, 92 93 PERIPH_TYPE_MAX_VALUE = 11, 91 94 }; 92 95 -
soft/giet_vm/xml/xml_parser.c
r245 r249 99 99 ////////////////////////////// 100 100 char found_timer = 0; 101 char found_icu = 0; 102 char found_dma = 0; 101 char found_icu = 0; 102 char found_dma = 0; 103 char found_mmc = 0; 103 104 104 105 … … 120 121 unsigned int cma_channels = 0; // total number of channels in first CMA 121 122 122 unsigned int io_mmu_active= 0; // using IOB component123 unsigned int use_iob = 0; // using IOB component 123 124 unsigned int use_xicu = 0; // using XICU (not ICU) 124 125 … … 1205 1206 { 1206 1207 periph[periph_index]->type = PERIPH_TYPE_IOB; 1207 io_mmu_active= 1;1208 use_iob = 1; 1208 1209 if (header->iob_cluster == 0xFFFFFFFF) 1209 1210 { … … 1219 1220 } 1220 1221 } 1221 // The TIM, ICU, XICU, DMA peripherals are replicated in all clusters1222 // The TIM, ICU, XICU, DMA, MEMC peripherals are replicated in all clusters 1222 1223 // but only one component per cluster 1223 1224 else if (strcmp(str, "TIM") == 0 ) … … 1255 1256 if (dma_channels < periph[periph_index]->channels) 1256 1257 dma_channels = periph[periph_index]->channels; 1258 } 1259 else if (strcmp(str, "MMC") == 0) 1260 { 1261 periph[periph_index]->type = PERIPH_TYPE_MMC; 1262 if (found_mmc) error = 1; 1263 found_mmc = 1; 1264 if ( periph[periph_index]->channels != 1 ) error = 1; 1257 1265 } 1258 1266 else … … 1650 1658 // for replicated periph 1651 1659 found_timer = 0; 1652 found_icu = 0; 1653 found_dma = 0; 1660 found_icu = 0; 1661 found_dma = 0; 1662 found_mmc = 0; 1654 1663 1655 1664 if (xmlTextReaderNodeType(reader) == XML_READER_TYPE_END_ELEMENT) { … … 2179 2188 2180 2189 def_int_write(fdout, "USE_XICU ", use_xicu); 2181 def_int_write(fdout, " IOMMU_ACTIVE ", io_mmu_active);2190 def_int_write(fdout, "USE_IOB ", use_iob); 2182 2191 2183 2192 file_write(fdout, epil); … … 2265 2274 2266 2275 // non replicated peripherals 2267 ld_write(fdout, " \nseg_fbf_base ", periph_vbase_array[PERIPH_TYPE_FBF]);2276 ld_write(fdout, "seg_cma_base ", periph_vbase_array[PERIPH_TYPE_CMA]); 2268 2277 ld_write(fdout, "seg_ioc_base ", periph_vbase_array[PERIPH_TYPE_IOC]); 2278 ld_write(fdout, "seg_tty_base ", periph_vbase_array[PERIPH_TYPE_TTY]); 2279 ld_write(fdout, "seg_fbf_base ", periph_vbase_array[PERIPH_TYPE_FBF]); 2269 2280 ld_write(fdout, "seg_nic_base ", periph_vbase_array[PERIPH_TYPE_NIC]); 2270 ld_write(fdout, "seg_ tty_base ", periph_vbase_array[PERIPH_TYPE_TTY]);2281 ld_write(fdout, "seg_iob_base ", periph_vbase_array[PERIPH_TYPE_IOB]); 2271 2282 ld_write(fdout, "seg_gcd_base ", periph_vbase_array[PERIPH_TYPE_GCD]); 2272 ld_write(fdout, "seg_iob_base ", periph_vbase_array[PERIPH_TYPE_IOB]);2273 2283 2274 2284 file_write(fdout, "\n"); … … 2276 2286 // replicated peripherals 2277 2287 ld_write(fdout, "seg_icu_base ", periph_vbase_array[PERIPH_TYPE_ICU]); 2288 ld_write(fdout, "seg_tim_base ", periph_vbase_array[PERIPH_TYPE_TIM]); 2278 2289 ld_write(fdout, "seg_dma_base ", periph_vbase_array[PERIPH_TYPE_DMA]); 2279 ld_write(fdout, "seg_ tim_base ", periph_vbase_array[PERIPH_TYPE_TIM]);2290 ld_write(fdout, "seg_mmc_base ", periph_vbase_array[PERIPH_TYPE_MMC]); 2280 2291 2281 2292 close(fdout);
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