Changeset 298
- Timestamp:
- Apr 3, 2014, 2:00:10 PM (11 years ago)
- Location:
- soft/giet_vm/giet_drivers
- Files:
-
- 5 added
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/giet_drivers/dma_driver.c
r295 r298 174 174 } 175 175 /////////////////////////////////////////////////////////////////////////////////// 176 // This function copies a source memory buffer to a dest nation memory buffer,176 // This function copies a source memory buffer to a destination memory buffer, 177 177 // using the distributed DMA. As it makes virtual to physical address translation, 178 // the MMU should be activated. As there is one DMA channel per processor, 178 // the MMU should be activated. 179 // This driver makes the assumption that each processor has a private DMA channel: 179 180 // the DMA cluster and channel indexes are obtained from the processor index. 180 181 // The source and destination buffers base addresses must be word aligned, … … 196 197 unsigned int procid = _get_procid(); 197 198 unsigned int cluster_xy = procid/NB_PROCS_MAX; 198 unsigned int x = cluster_xy >> Y_WIDTH;199 unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1);200 199 unsigned int channel_id = procid%NB_PROCS_MAX; 201 200 -
soft/giet_vm/giet_drivers/iob_driver.c
r258 r298 8 8 // This driver supports the TSAR vci_io_bridge, that is a bridge to access 9 9 // The external peripherals, implementing an IO_MMU. 10 // This component can be instanciated in more than one cluster. 10 11 /////////////////////////////////////////////////////////////////////////////////// 11 12 // The seg_iob_base virtual base addresses must be defined in giet_vsegs.ld file. 13 // The physical base address is supposed to be (cluster_xy << 32) | seg_iob_base. 12 14 /////////////////////////////////////////////////////////////////////////////////// 13 15 … … 24 26 #endif 25 27 28 26 29 /////////////////////////////////////////////////////////////////////////////// 27 // _iob_inval_tlb_entry() 30 // This low level function returns the value contained in register "index" 31 // in the IOB component contained in cluster "cluster_xy" 32 /////////////////////////////////////////////////////////////////////////////// 33 unsigned int _iob_get_register( unsigned int cluster_xy, // cluster index 34 unsigned int index ) // register index 35 { 36 unsigned long long paddr = (unsigned long long)(unsigned int)&seg_iob_base + 37 ((unsigned long long)cluster_xy << 32) + 38 ((unsigned long long)index << 2); 39 40 return _physical_read( paddr ); 41 } 42 /////////////////////////////////////////////////////////////////////////////// 43 // This low level function sets a new value in register "index" 44 // in the IOB component contained in cluster "cluster_xy" 45 /////////////////////////////////////////////////////////////////////////////// 46 void _iob_set_register( unsigned int cluster_xy, // cluster index 47 unsigned int index, // register index 48 unsigned int value ) // value to be written 49 { 50 unsigned long long paddr = (unsigned long long)(unsigned int)&seg_iob_base + 51 ((unsigned long long)cluster_xy << 32) + 52 ((unsigned long long)index << 2); 53 54 _physical_write( paddr, value ); 55 } 56 57 58 59 60 /////////////////////////////////////////////////////////////////////////////// 28 61 // This function invalidates a TLB entry identified by a virtual address. 29 // Returns 0 if success, returns 1 if failure30 62 /////////////////////////////////////////////////////////////////////////////// 31 unsigned int _iob_inval_tlb_entry( unsigned int vaddr ) 63 void _iob_inval_tlb_entry( unsigned int cluster_xy, 64 unsigned int vaddr ) 32 65 { 33 #if USE_IOB 66 _iob_set_register( cluster_xy, 67 IOB_INVAL_PTE, 68 vaddr ); 69 } 34 70 35 unsigned int * iob_address = (unsigned int *) &seg_iob_base ; 36 iob_address[IOB_INVAL_PTE] = vaddr; 37 return 0; 71 /////////////////////////////////////////////////////////////////////////////// 72 // This function sets a new value in IOB_IOMMU_PTPR register. 73 /////////////////////////////////////////////////////////////////////////////// 74 void _iob_set_iommu_ptpr( unsigned int cluster_xy, 75 unsigned int value ) 76 { 77 _iob_set_register( cluster_xy, 78 IOB_IOMMU_PTPR, 79 value ); 80 } 38 81 39 #else 82 /////////////////////////////////////////////////////////////////////////////// 83 // This function sets a new value in IOB_XICU_BASE register. 84 /////////////////////////////////////////////////////////////////////////////// 85 void _iob_set_xicu_base( unsigned int cluster_xy, 86 unsigned int value ) 87 { 88 _iob_set_register( cluster_xy, 89 IOB_XICU_BASE, 90 value ); 91 } 40 92 41 return 1; 93 /////////////////////////////////////////////////////////////////////////////// 94 // This function sets a new value in IOB_XICU_SIZE register. 95 /////////////////////////////////////////////////////////////////////////////// 96 void _iob_set_xicu_size( unsigned int cluster_xy, 97 unsigned int value ) 98 { 99 _iob_set_register( cluster_xy, 100 IOB_XICU_SIZE, 101 value ); 102 } 42 103 43 #endif44 }45 104 46 105 -
soft/giet_vm/giet_drivers/iob_driver.h
r258 r298 10 10 11 11 /////////////////////////////////////////////////////////////////////////////////// 12 // TSAR IOB (vci_io_bridge) registers offsets12 // vci_io_bridge : registers offsets and iommu error codes 13 13 /////////////////////////////////////////////////////////////////////////////////// 14 14 15 15 enum IOB_registers 16 16 { 17 IOB_IOMMU_PTPR = 0, /* R/W : Page Table Pointer Register */ 18 IOB_IOMMU_ACTIVE = 1, /* R/W : IOMMU activated if not 0 */ 19 IOB_IOMMU_BVAR = 2, /* R : Bad Virtual Address (unmapped) */ 20 IOB_IOMMU_ETR = 3, /* R : Error Type */ 21 IOB_IOMMU_BAD_ID = 4, /* R : Faulty Peripheral Index */ 22 IOB_INVAL_PTE = 5, /* W : Invalidate a PTE (virtual address) */ 23 IOB_IT_ADDR_IOMMU_LO = 6, /* W/R : 32 LSB bits for IOMMU IT*/ 24 IOB_IT_ADDR_IOMMU_HI = 7, /* W/R : 32 MSB bits for IOMMU IT */ 25 IOB_IT_ADDRESS_BEGIN = 8, /* R/W : Peripheral IT address (2 32 bits registers) */ 17 IOB_IOMMU_PTPR = 0, // R/W : Page Table Pointer Register 18 IOB_IOMMU_ACTIVE = 1, // R/W : IOMMU activated if not 0 19 IOB_IOMMU_BVAR = 2, // R : Bad Virtual Address (unmapped) 20 IOB_IOMMU_ETR = 3, // R : Error Type 21 IOB_IOMMU_BAD_ID = 4, // R : Faulty Peripheral Index (SRCID) 22 IOB_INVAL_PTE = 5, // W : Invalidate a PTE (virtual address) 23 IOB_WTI_ENABLE = 6, // R/W : Enable WTIs (both IOMMU and peripherals) 24 IOB_WTI_ADDR_LO = 7, // W/R : 32 LSB bits for IOMMU WTI 25 IOB_WTI_ADDR_HI = 8, // W/R : 32 MSB bits for IOMMU WTI 26 IOB_XICU_BASE = 9, // R/W : XICU pbase address in cluster 0 27 IOB_XICU_SIZE = 10, // R/W : XICU segment size 26 28 }; 29 30 enum mmu_error_type_e 31 { 32 MMU_NONE = 0x0000, // None 33 MMU_WRITE_ACCES_VIOLATION = 0x0008, // Write access to a non writable page 34 MMU_WRITE_PT1_ILLEGAL_ACCESS = 0x0040, // Write Bus Error accessing Table 1 35 MMU_READ_PT1_UNMAPPED = 0x1001, // Read Page fault on Page Table 1 36 MMU_READ_PT2_UNMAPPED = 0x1002, // Read Page fault on Page Table 2 37 MMU_READ_PT1_ILLEGAL_ACCESS = 0x1040, // Read Bus Error in Table1 access 38 MMU_READ_PT2_ILLEGAL_ACCESS = 0x1080, // Read Bus Error in Table2 access 39 MMU_READ_DATA_ILLEGAL_ACCESS = 0x1100, // Read Bus Error in cache access 40 }; 41 27 42 28 43 /////////////////////////////////////////////////////////////////////////////////// … … 30 45 /////////////////////////////////////////////////////////////////////////////////// 31 46 32 extern unsigned int _iob_inval_tlb_entry( unsigned int vaddr ); 47 extern void _iob_inval_tlb_entry( unsigned int cluster_xy, 48 unsigned int vaddr ); 33 49 34 extern unsigned int _iob_set_iommu_ptpr( unsigned int value ); 50 extern void _iob_set_iommu_ptpr( unsigned int cluster_xy, 51 unsigned int value ); 52 53 extern void _iob_set_xicu_base( unsigned int cluster_xy, 54 unsigned int value ); 55 56 extern void _iob_set_xicu_size( unsigned int cluster_xy, 57 unsigned int value ); 35 58 36 59 /////////////////////////////////////////////////////////////////////////////////// -
soft/giet_vm/giet_drivers/mmc_driver.c
r297 r298 123 123 unsigned int channel ) // unused 124 124 { 125 _printf("[GIET ERROR] MMC IRQ received, but _mmc_isr() not implemented...\n"); 125 unsigned int procid = _get_procid(); 126 unsigned int cluster_xy = procid / NB_PROCS_MAX; 127 unsigned int lpid = procid % NB_PROCS_MAX; 128 unsigned int x = cluster_xy >> Y_WIDTH; 129 unsigned int y = cluster_xy & ((1<<Y_WIDTH)-1); 130 131 _printf("[GIET ERROR] MMC IRQ received by processor[%d,%d,%d]" 132 " but _mmc_isr() not implemented...\n", x, y, lpid ); 126 133 } 127 134
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