Index: soft/giet_vm/giet_kernel/ctx_handler.h
===================================================================
--- soft/giet_vm/giet_kernel/ctx_handler.h	(revision 301)
+++ soft/giet_vm/giet_kernel/ctx_handler.h	(revision 310)
@@ -69,4 +69,5 @@
     unsigned int pti_vector[32];       // timer    interrupt vector
     unsigned int wti_vector[32];       // software interrupt vector
+    unsigned int reserved[30];         // padding to 4 Kbytes
 } static_scheduler_t;
 
Index: soft/giet_vm/giet_kernel/irq_handler.c
===================================================================
--- soft/giet_vm/giet_kernel/irq_handler.c	(revision 301)
+++ soft/giet_vm/giet_kernel/irq_handler.c	(revision 310)
@@ -56,5 +56,4 @@
     unsigned int irq_id;
     unsigned int irq_type;
-    char*        irq_type_str[] = { "HWI", "WTI", "PTI" }; 
 
     // get the highest priority active IRQ index 
@@ -88,4 +87,5 @@
 
 #if GIET_DEBUG_IRQS // we don't take the TTY lock to avoid deadlocks
+char* irq_type_str[] = { "HWI", "WTI", "PTI" }; 
 _puts("\n[IRQS DEBUG] Processor[");
 _putd(x);
@@ -120,23 +120,10 @@
         else
         {
-            // we don't take the TTY lock to avoid deadlock
-            _puts("\n[GIET ERROR] in _irq_demux() illegal ISR type on processor[");
-            _putd(x);
-            _puts(",");
-            _putd(y);
-            _puts(",");
-            _putd(lpid);
-            _puts("] at cycle ");
-            _putd(_get_proctime() );
-            _puts("\n  ");
-            _puts(irq_type_str[irq_type] );
-            _puts(" : irq_id = ");
-            _putd(irq_id);
-            _puts(" / isr_type = ");
-            _putd(isr_type);
-            _puts(" / channel = ");
-            _putd(channel);
-            _puts("\n");
-            _exit();
+            _printf("\n[GIET ERROR] in _irq_demux() :"
+                    " illegal ISR type on processor[%d,%d,%d] at cycle %d\n"
+                    " - irq_type = %d\n"
+                    " - irq_id   = %d\n"
+                    " - isr_type = %x\n",
+                    x, y, lpid, _get_proctime(), irq_type, irq_id, isr_type );
         }
     }
Index: soft/giet_vm/giet_kernel/kernel_init.c
===================================================================
--- soft/giet_vm/giet_kernel/kernel_init.c	(revision 301)
+++ soft/giet_vm/giet_kernel/kernel_init.c	(revision 310)
@@ -9,15 +9,40 @@
 // This nano-kernel has been written for the MIPS32 processor.
 // The virtual adresses are on 32 bits and use the (unsigned int) type, but the 
-// physicals addresses can have up to 40 bits, and use the  (unsigned long long) type.
+// physicals addresses can have up to 40 bits, and use the (unsigned long long) type.
 // It natively supports clusterised shared mmemory multi-processors architectures, 
-// where each processor is identified by a composite index (cluster_xy, local_id),
+// where each processor is identified by a composite index [x,y,lpid],
 // and where there is one physical memory bank per cluster.
 //
-// This file contains the _kernel_init() function, that performs the second 
-// phase of system initialisation.  The three significant actions are:
-// 1) processor 0 makes peripherals and system FAT initialisation.
-// 2) processor 0 awake all other processors by an IPI.
-// 3) all processors running in parallel perform register initialisation,
-//    from their private scheduler, and jump to user code.
+// The kernel_init() function is executed in parallel by all procesors, 
+// and completes the system initialisation that has been started by processor[0,0,0] 
+// in the boot_init() function. It makes the following assuptions, regarding the work 
+// bone by the boot code:
+//
+// 1) The page tables associated to the various vspaces have been build
+//    in physical memory, and can be used by the kernel code.
+//
+// 2) All schedulers (this include all task contexts) have been initialised, 
+//    Both the virtual and the physical base addresses of the page tables
+//    are available in the CTX_PTAB and CTX_PTPR slots.
+//
+// 3) The CP0_SCHED register of each processor contains a pointer on its 
+//    private scheduler (virtual address).
+//
+// 4) The CP2_PTPR register of each processor contains a pointer on 
+//    the vspace_0 page table (physical address>>13). 
+//
+// 5) For all processors, the MMU is activated (CP2_MODE contains 0xF).
+// 
+// This code must be loaded in .kinit section, in order to control seg_kinit_base,
+// as this address is used by the boot code to jump into kernel code.
+//
+// Each processor performs the following actions:
+// 1/ contribute to _schedulers_paddr[] array initialisation.
+// 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation 
+// 3/ completes task context initialisation for ech allocated task
+// 4/ compute and set the ICU mask for its private ICU channel
+// 5/ initialise its private TICK timer (if tasks > 0)
+// 6/ initialise the "idle" task context in its private scheduler
+// 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret. 
 ////////////////////////////////////////////////////////////////////////////////////
 
@@ -77,40 +102,6 @@
 unsigned int _init_barrier = 0;
 
-////////////////////////////////////////////////////////////////////////////////////
-// This function is the entry point in kernel for all processors.
-// It is executed in parallel by all procesors, and completes the system 
-// initialisation that has been started by processor 0 in the boot_init() function.
-//
-// This kernel code makes the following assuptions, regarding the work bone 
-// by the boot code:
-//
-// 1) The page tables associated to the various vspaces have been build
-//    in physical memory, and can be used by the kernel code.
-//
-// 2) All schedulers (this include all task contexts) have been initialised, 
-//    Both the virtual and the physical base addresses of the page tables
-//    are available in the CTX_PTAB and CTX_PTPR slots.
-//
-// 3) The CP0_SCHED register of each processor contains a pointer on its 
-//    private scheduler (virtual address).
-//
-// 4) The CP2_PTPR register of each processor contains a pointer on 
-//    the vspace_0 page table (physical address>>13). 
-//
-// 5) For all processors, the MMU is activated (CP2_MODE contains 0xF).
-// 
-// This code must be loaded in .kinit section, in order to control seg_kinit_base,
-// as this address is used by the boot code to jump into kernel code.
-////////////////////////////////////////////////////////////////////////////////////
-// Each processor performs the following actions:
-// 1/ contribute to _schedulers_paddr[] array initialisation.
-// 2/ contribute to _ptabs_paddr[] and _ptabs_vaddr arrays initialisation 
-// 3/ completes task context initialisation for ech allocated task
-// 4/ compute and set the ICU mask for its private ICU channel
-// 5/ initialise its private TICK timer (if tasks > 0)
-// 6/ initialise the "idle" task context in its private scheduler
-// 7/ initialise SP, SR, PTPR, EPC registers and jump to user code with an eret. 
-////////////////////////////////////////////////////////////////////////////////////
-__attribute__((section (".kinit"))) void kernel_parallel_init() 
+///////////////////////////////////////////////////////////////////////////////////
+__attribute__((section (".kinit"))) void kernel_init() 
 {
     unsigned int global_pid = _get_procid();
@@ -119,4 +110,10 @@
     unsigned int y          = cluster_xy & ((1<<Y_WIDTH)-1);
     unsigned int lpid       = global_pid % NB_PROCS_MAX;
+    unsigned int nprocs     = TOTAL_PROCS;
+    unsigned int pid        = ((( x * Y_SIZE) + y) * NB_PROCS_MAX) + lpid;
+//  unsigned int pid        = _get_id(i n_procs );
+
+    // This last initialisation phase is done sequencially:
+    while( pid != _init_barrier ) asm volatile ( "nop" );
 
     // Step 1 : each processor get its scheduler virtual address
@@ -129,5 +126,5 @@
 
 #if GIET_DEBUG_INIT
-_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d]\n"
+_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts kernel init\n"
         " - scheduler vbase = %x\n"
         " - tasks           = %d\n",
@@ -176,5 +173,5 @@
 
 #if GIET_DEBUG_INIT
-_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] update context for task %d\n"
+_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] updates context for task %d\n"
         " - ctx_epc   = %x\n"
         " - ctx_ra    = %x\n",
@@ -211,5 +208,5 @@
 
 #if GIET_DEBUG_INIT
-_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] set XCU masks\n"
+_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] sets XCU masks\n"
         " - ICU HWI_MASK = %x\n"
         " - ICU WTI_MASK = %x\n"
@@ -250,5 +247,5 @@
 
 #if GIET_DEBUG_INIT
-_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] start TICK timer\n",
+_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] starts TICK timer\n",
         x, y, lpid );
 #endif
@@ -269,5 +266,5 @@
 
 #if GIET_DEBUG_INIT
-_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initialize IDLE task\n",
+_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] initializes IDLE task\n",
         x, y, lpid );
 #endif
@@ -296,24 +293,17 @@
     unsigned int epc_value  = _get_task_slot(global_pid, ltid, CTX_EPC_ID);
 
-#if GIET_DEBUG_INIT
-_printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n"
-        " - sp   = %x\n"
-        " - sr   = %x\n"
-        " - ptpr = %x\n"
-        " - epc  = %x\n",
-        x, y, lpid, _get_proctime(),
-        sp_value, sr_value, ptpr_value, epc_value );
-#endif
-
+    _printf("\n[GIET DEBUG INIT] Processor[%d,%d,%d] reach barrier at cycle %d\n",
+            x, y, lpid, _get_proctime() );
+
+/*
     unsigned int*  pcount = &_init_barrier;
-    unsigned int   nprocs = TOTAL_PROCS;
     unsigned int   count;
 
     // increment barrier counter with atomic LL/SC
     asm volatile ( "_init_barrier_loop:             \n"
-                   "ll    %0,   0(%1)               \n"   /* count <= *pcount  */
-                   "addi  $3,   %0,   1             \n"   /* $3 <= count + 1  */
-                   "sc    $3,   0(%1)               \n"   /* *pcount <= $3  */
-                   "beqz  $3,   _init_barrier_loop  \n"   /* retry if failure */
+                   "ll    %0,   0(%1)               \n"
+                   "addi  $3,   %0,   1             \n"
+                   "sc    $3,   0(%1)               \n"
+                   "beqz  $3,   _init_barrier_loop  \n"
                    "nop                             \n" 
                    : "=&r"(count)
@@ -323,7 +313,16 @@
     // busy waiting until all processors synchronized
     while ( *pcount != nprocs ) asm volatile ("nop");
-
+*/
+
+    // increment barrier counter 
+    _init_barrier++;
+
+    // busy waiting until all processors synchronized
+    while ( _init_barrier != nprocs ) asm volatile ("nop");
+
+/*
     _printf("\n[GIET] Processor[%d,%d,%d] jumps to user code at cycle %d\n",
             x, y, lpid, _get_proctime() );
+*/
         
     // set registers and jump to user code
@@ -338,5 +337,5 @@
                    : "$29" );
 
-} // end kernel_parallel_init()
+} // end kernel_init()
 
 
