Index: /soft/giet_vm/mappings/4c_1p_four_leti_ext.xml
===================================================================
--- /soft/giet_vm/mappings/4c_1p_four_leti_ext.xml	(revision 311)
+++ /soft/giet_vm/mappings/4c_1p_four_leti_ext.xml	(revision 311)
@@ -0,0 +1,393 @@
+<?xml version="1.0"?>
+
+<mapping_info signature    = "0xdace2014" 
+              name         = "4c_1p_four_leti_ext" 
+              x_size       = "2" 
+              y_size       = "3" 
+              x_width      = "4"
+              y_width      = "4"
+			  irq_per_proc = "4" 
+              use_ramdisk  = "0"
+              x_io         = "1"
+              y_io         = "2" >
+
+*** This mapping is for the "tsar_generic_leti" hardware architecture
+*** with 4 clusters containing processors and 4 processors per cluster
+*** 40 bits physical address, and 64 Mbytes per cluster.
+*** It uses the external peripherals, which means 2*3 clusters, because
+*** External peripherals are implemented in cluster(1,2), and the associated WTI
+*** are routed by the PIC component to the XCU in cluster (0,0).
+*** Cluster (0,0) contains two backup peripherals (TTY and Block Device),
+*** and the corresponding HWI are connected to the XICU in cluster (0,0)
+
+*** Four concurrent applications are launched on this 4 processors platform
+*** router, hello, pgcd, display, running 7 tasks. 
+
+    <clusterset>
+
+        <cluster x = "0" y = "0" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0000000000" length = "0x0001000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x00F0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x00E0000000" length = "0x0000001000" />
+            <pseg name = "PSEG_IOC"  type = "PERI" base = "0x00F2000000" length = "0x0000001000" /> 
+            <pseg name = "PSEG_TTY"  type = "PERI" base = "0x00F4000000" length = "0x0000001000" /> 
+
+            <proc index  = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC"  >
+            </periph>
+            <periph type = "IOC"  psegname = "PSEG_IOC"  subtype = "BDV" > 
+            </periph>
+            <periph type = "TTY"  psegname = "PSEG_TTY"  channels = "1" > 
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srcid = "0"  srctype = "WTI"  isr = "ISR_WAKUP"                  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "4"  srctype = "WTI"  isr = "ISR_NIC_RX"  channel = "0"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "5"  srctype = "WTI"  isr = "ISR_NIC_RX"  channel = "1"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "6"  srctype = "WTI"  isr = "ISR_NIC_TX"  channel = "0"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "7"  srctype = "WTI"  isr = "ISR_NIC_TX"  channel = "1"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "8"  srctype = "WTI"  isr = "ISR_CMA"     channel = "0"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "9"  srctype = "WTI"  isr = "ISR_CMA"     channel = "1"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "10" srctype = "WTI"  isr = "ISR_CMA"     channel = "2"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "11" srctype = "WTI"  isr = "ISR_CMA"     channel = "3"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "12" srctype = "WTI"  isr = "ISR_BDV"     channel = "0"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "13" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "0"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "14" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "1"  dstx = "0"  dsty = "0"  dstid = "0" />
+
+                <irq srcid = "0"  srctype = "PTI"  isr = "ISR_TICK"                   dstx = "0"  dsty = "0"  dstid = "0" />
+
+                <irq srcid = "8"  srctype = "HWI"  isr = "ISR_DEFAULT"                dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "9"  srctype = "HWI"  isr = "ISR_BDV"     channel = "0"  dstx = "0"  dsty = "0"  dstid = "0" />
+                <irq srcid = "10" srctype = "HWI"  isr = "ISR_TTY_RX"  channel = "0"  dstx = "0"  dsty = "0"  dstid = "0" />
+            </periph>
+        </cluster>
+
+        <cluster x = "0" y = "1" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0100000000" length = "0x0400000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x01F0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x01E0000000" length = "0x0000001000" />
+
+            <proc index  = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srcid = "0"  srctype = "WTI"  isr = "ISR_WAKUP"                  dstx = "0"  dsty = "1"  dstid = "0" />
+                <irq srcid = "0"  srctype = "PTI"  isr = "ISR_TICK"                   dstx = "0"  dsty = "1"  dstid = "0" />
+                <irq srcid = "8"  srctype = "HWI"  isr = "ISR_DEFAULT"                dstx = "0"  dsty = "1"  dstid = "0" />
+                <irq srcid = "13" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "2"  dstx = "0"  dsty = "1"  dstid = "0" />
+                <irq srcid = "14" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "3"  dstx = "0"  dsty = "1"  dstid = "0" />
+            </periph>
+        </cluster>
+
+        <cluster x = "1" y = "0" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1000000000" length = "0x0400000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x10F0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x10E0000000" length = "0x0000001000" />
+
+            <proc index  = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srcid = "0"  srctype = "WTI"  isr = "ISR_WAKUP"                  dstx = "1"  dsty = "0"  dstid = "0" />
+                <irq srcid = "0"  srctype = "PTI"  isr = "ISR_TICK"                   dstx = "1"  dsty = "0"  dstid = "0" />
+                <irq srcid = "8"  srctype = "HWI"  isr = "ISR_DEFAULT"                dstx = "1"  dsty = "0"  dstid = "0" />
+                <irq srcid = "13" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "4"  dstx = "1"  dsty = "0"  dstid = "0" />
+                <irq srcid = "14" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "5"  dstx = "1"  dsty = "0"  dstid = "0" />
+            </periph>
+        </cluster>
+
+        <cluster x = "1" y = "1" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1100000000" length = "0x0400000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x11F0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x11E0000000" length = "0x0000001000" />
+
+            <proc index  = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srcid = "0"  srctype = "WTI"  isr = "ISR_WAKUP"                  dstx = "1"  dsty = "1"  dstid = "0" />
+                <irq srcid = "0"  srctype = "PTI"  isr = "ISR_TICK"                   dstx = "1"  dsty = "1"  dstid = "0" />
+                <irq srcid = "8"  srctype = "HWI"  isr = "ISR_DEFAULT"                dstx = "1"  dsty = "1"  dstid = "0" />
+                <irq srcid = "13" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "6"  dstx = "1"  dsty = "1"  dstid = "0" />
+                <irq srcid = "14" srctype = "WTI"  isr = "ISR_TTY_RX"  channel = "7"  dstx = "1"  dsty = "1"  dstid = "0" />
+            </periph>
+        </cluster>
+
+*** empty cluster
+
+        <cluster x = "0" y = "2" >
+        </cluster>
+
+*** cluster_io
+
+        <cluster x = "1" y = "2" >
+            <pseg name = "PSEG_IOC"  type = "PERI" base = "0x12F2000000" length = "0x0000001000" /> 
+            <pseg name = "PSEG_FBF"  type = "PERI" base = "0x12F3000000" length = "0x0000004000" /> 
+            <pseg name = "PSEG_TTY"  type = "PERI" base = "0x12F4000000" length = "0x0000001000" /> 
+            <pseg name = "PSEG_NIC"  type = "PERI" base = "0x12F7000000" length = "0x0000080000" />
+            <pseg name = "PSEG_CMA"  type = "PERI" base = "0x12F8000000" length = "0x0000008000" />
+            <pseg name = "PSEG_PIC"  type = "PERI" base = "0x12F9000000" length = "0x0000004000" />
+
+            <periph type = "IOC"  psegname = "PSEG_IOC"  subtype = "BDV" > 
+            </periph>
+            <periph type = "FBF"  psegname = "PSEG_FBF" >
+            </periph>
+            <periph type = "TTY"  psegname = "PSEG_TTY"  channels = "8" > 
+            </periph>
+            <periph type = "NIC"  psegname = "PSEG_NIC"  channels = "2" >
+            </periph>
+            <periph type = "CMA"  psegname = "PSEG_CMA"  channels = "4" >
+            </periph>
+            <periph type = "PIC"  psegname = "PSEG_PIC"  channels = "32" >
+                <irq srcid = "0"  srctype  = "HWI"  isr = "ISR_NIC_RX" channel = "0"  dstx = "0"  dsty = "0"  dstid = "4"  />
+                <irq srcid = "1"  srctype  = "HWI"  isr = "ISR_NIC_RX" channel = "1"  dstx = "0"  dsty = "0"  dstid = "5"  />
+
+                <irq srcid = "2"  srctype  = "HWI"  isr = "ISR_NIC_TX" channel = "0"  dstx = "0"  dsty = "0"  dstid = "6"  />
+                <irq srcid = "3"  srctype  = "HWI"  isr = "ISR_NIC_TX" channel = "1"  dstx = "0"  dsty = "0"  dstid = "7"  />
+
+                <irq srcid = "4"  srctype  = "HWI"  isr = "ISR_CMA"    channel = "0"  dstx = "0"  dsty = "0"  dstid = "8"  />
+                <irq srcid = "5"  srctype  = "HWI"  isr = "ISR_CMA"    channel = "1"  dstx = "0"  dsty = "0"  dstid = "9"  />
+                <irq srcid = "6"  srctype  = "HWI"  isr = "ISR_CMA"    channel = "2"  dstx = "0"  dsty = "0"  dstid = "10" />
+                <irq srcid = "7"  srctype  = "HWI"  isr = "ISR_CMA"    channel = "3"  dstx = "0"  dsty = "0"  dstid = "11" />
+
+                <irq srcid = "8"  srctype  = "HWI"  isr = "ISR_BDV"    channel = "0"  dstx = "0"  dsty = "0"  dstid = "12" />
+
+                <irq srcid = "16" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "0"  dstx = "0"  dsty = "0"  dstid = "13" />
+                <irq srcid = "17" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "1"  dstx = "0"  dsty = "0"  dstid = "14" />
+                <irq srcid = "18" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "2"  dstx = "0"  dsty = "1"  dstid = "13" />
+                <irq srcid = "19" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "3"  dstx = "0"  dsty = "1"  dstid = "14" />
+                <irq srcid = "20" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "4"  dstx = "1"  dsty = "0"  dstid = "13" />
+                <irq srcid = "21" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "5"  dstx = "1"  dsty = "0"  dstid = "14" />
+                <irq srcid = "21" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "6"  dstx = "1"  dsty = "1"  dstid = "13" />
+                <irq srcid = "22" srctype  = "HWI"  isr = "ISR_TTY_RX" channel = "7"  dstx = "1"  dsty = "1"  dstid = "14" />
+            </periph>
+        </cluster>
+
+    </clusterset>
+
+    <globalset> 
+
+*** Global vsegs associated to peripherals  replicated in all clusters (XCU, MMC, SCHED)
+*** must respect the following policy (checked by the XML parser) :
+*** vbase[x,y] = vbase[0,0] + 64K * cluster_xy
+*** pbase[x,y] = pbase[0,0] + 4G  * cluster_xy 
+*** ( with cluster_xy = x*16 + y )
+*** the vseg type is entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster index must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+*** 5 global vsegs used by the boot code / A[31:28] = 0x0 / Identity mapping
+*** seg_boot_mapping is loaded by the boot-loader. It contains the mapping info.  Reused by the kernel.
+*** seg_boot_code and seg_boot data are loaded by the preloader, used by the boot-loader.  Not reused by the kernel.
+*** seg_boot_stack contains the stacks used by all processors during reset and boot.  Not reused by the Kernel.
+*** seg_boot_buffer is used by the boot-loader. It contains a complete .elf file.  Not reused by the kernel.
+
+        <vseg name = "seg_boot_code"      vbase = "0x00010000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_code"      type = "BUFFER" length = "0x00020000" />
+        </vseg>
+        <vseg name = "seg_boot_data"      vbase = "0x00030000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_data"      type = "BUFFER" length = "0x00010000" />
+        </vseg>
+        <vseg name = "seg_boot_buffer"    vbase = "0x00040000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_buffer"    type = "BUFFER" length = "0x00060000" />
+        </vseg>
+        <vseg name = "seg_boot_stack"     vbase = "0x000A0000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_stack"     type = "BUFFER" length = "0x00050000" />
+        </vseg>
+        <vseg name = "seg_boot_mapping"   vbase = "0x000F0000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_mapping"   type = "BLOB"   length = "0x00010000" binpath	= "map.bin" />
+        </vseg>
+        
+*** 4 global vsegs used by the kernel / A[31:28] = 0x8  / No identity mapping constraint
+  
+        <vseg name = "seg_kernel_code"    vbase = "0x80000000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_code"    type = "ELF" length = "0x00020000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name = "seg_kernel_data"    vbase = "0x80020000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_data"    type = "ELF" length = "0x00060000" binpath = "build/kernel/kernel.elf" />
+		</vseg>
+        <vseg name = "seg_kernel_uncdata" vbase = "0x80080000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_uncdata" type = "ELF" length = "0x00040000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name = "seg_kernel_init"    vbase = "0x800C0000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_init"    type = "ELF" length = "0x00010000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+
+*** 6 global vsegs for non replicated peripherals in cluster(1,2) / A[31:28] = 0xF / 
+
+        <vseg name = "seg_ioc"            vbase = "0xF2000000" mode = "__W_" x = "1" y = "2" psegname = "PSEG_IOC" >
+            <vobj name = "ioc"            type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_tty"            vbase = "0xF4000000" mode = "__W_" x = "1" y = "2" psegname = "PSEG_TTY" >
+   			<vobj name = "tty"            type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_nic"            vbase = "0xF5000000" mode = "__W_" x = "1" y = "2" psegname = "PSEG_NIC" >
+            <vobj name = "nic"            type = "PERI" length  = "0x00080000" /> 
+        </vseg>
+        <vseg name = "seg_cma"            vbase = "0xF8000000" mode = "__W_" x = "1" y = "2" psegname = "PSEG_CMA" >
+            <vobj name = "cma"            type = "PERI" length  = "0x00008000" /> 
+        </vseg>
+        <vseg name = "seg_fbf"            vbase = "0xF3000000" mode = "__W_" x = "1" y = "2" psegname = "PSEG_FBF" >
+            <vobj name = "fbf"            type = "PERI" length  = "0x00004000" /> 
+        </vseg>
+        <vseg name = "seg_pic"            vbase = "0xF9000000" mode = "__W_" x = "1" y = "2" psegname = "PSEG_PIC" >
+            <vobj name = "pic"            type = "PERI" length  = "0x00004000" /> 
+        </vseg>
+
+*** 1 global vseg for pseudo-peripherals (PRELOADER) / A[31:28] = 0x0 
+
+        <vseg name = "seg_reset_code"     vbase = "0x00000000" mode = "CX__" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "preloader"      type = "BUFFER" length  = "0x00010000" /> 
+        </vseg>
+
+*** 4 global vsegs for replicated ICUS / A[31:24] = 0xF0 / Increment = 0x10000 / Identity mapping in cluster (0,0)            
+
+        <vseg name = "seg_icu_0"          vbase = "0xF0000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_XCU" ident = "1" > 
+            <vobj name = "icu_0"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_1"          vbase = "0xF0010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_1"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_2"          vbase = "0xF0100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_2"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_3"          vbase = "0xF0110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_3"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+
+*** 4 global vsegs for replicated MMC / A[31:24] = 0xE0 / Increment = 0x10000 / Identity mapping in cluster 0
+
+        <vseg name = "seg_memc_0"         vbase = "0xE0000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_MMC" ident = "1" >
+            <vobj name = "memc_0"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_1"         vbase = "0xE0010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_MMC" >
+            <vobj name = "memc_1"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_2"         vbase = "0xE0100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_MMC" >
+            <vobj name = "memc_2"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_3"         vbase = "0xE0110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_MMC" >
+            <vobj name = "memc_3"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+
+*** 4 global vsegs for replicated schedulers / A[31:28] = 0xC / Increment = 0x10000
+
+        <vseg name = "seg_sched_0"        vbase = "0xC0000000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" >
+            <vobj name = "sched_0"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_1"        vbase = "0xC0010000" mode = "C_W_" x = "0" y = "1" psegname = "PSEG_RAM" >
+            <vobj name = "sched_1"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_2"        vbase = "0xC0100000" mode = "C_W_" x = "1" y = "0" psegname = "PSEG_RAM" >
+            <vobj name = "sched_2"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_3"        vbase = "0xC0110000" mode = "C_W_" x = "1" y = "1" psegname = "PSEG_RAM" >
+            <vobj name = "sched_3"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+
+    </globalset> 
+
+    <vspaceset>
+
+*** For each vspace, the startname field is the name of the vobj containing the start_vector (entry point array)
+*** For each task, the startid field define the task entry point as an index in the start_vector
+*** For each task, the x,y and proclocid arguments define the task static placement
+*** For each task, the stackname field is the name of the vobj containing the task stack 
+*** For each task, the heapname field is the name of the vobj containing the task heap 
+
+
+        <vspace name = "hello" startname = "data" >
+            <vseg name = "seg_code"        vbase = "0x00400000" mode = "CXWU" x = "0" y = "1" psegname = "PSEG_RAM" > 
+                <vobj name = "code"	       type	= "ELF" length = "0x00010000" binpath = "build/hello/hello.elf" />
+            </vseg>
+            <vseg name = "seg_data"        vbase = "0x00500000" mode = "C_WU" x = "0" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "data"        type	= "ELF" length = "0x00010000" binpath = "build/hello/hello.elf" />
+            </vseg>
+            <vseg name = "seg_ptab"        vbase = "0x00600000" mode = "C_W_" x = "0" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "ptab"        type	= "PTAB" length = "0x00012000" align = "13" /> 
+            </vseg>
+            <vseg name = "seg_stack"       vbase = "0x00700000" mode = "C_WU" x = "0" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "stack"       type	= "BUFFER" length = "0x00010000" />
+                <vobj name = "heap"        type	= "BUFFER" length = "0x00010000" />
+            </vseg>
+
+            <task name = "main_hello" x = "0" y = "1" proclocid = "0" stackname = "stack" heapname = "heap" startid = "0" usetty = "1" />
+        </vspace>
+
+        <vspace name = "pgcd" startname = "data" >
+            <vseg name = "seg_code"        vbase = "0x00400000" mode = "CXWU" x = "1" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "code"        type = "ELF" length = "0x00010000" binpath = "build/pgcd/pgcd.elf" />
+            </vseg>
+            <vseg name = "seg_data"        vbase = "0x00500000" mode = "C_WU" x = "1" y = "0" psegname = "PSEG_RAM" >
+                <vobj name	= "data"       type	= "ELF" length = "0x00010000" binpath = "build/pgcd/pgcd.elf" />
+            </vseg>
+            <vseg name = "seg_ptab"        vbase = "0x00600000" mode = "C_W_" x = "1" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "ptab"        type	= "PTAB" length = "0x00012000" align = "13" />
+            </vseg>
+            <vseg name = "seg_stack"       vbase = "0x00700000" mode = "C_WU" x = "1" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "stack"       type = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "heap"        type = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+
+            <task name = "main_pgcd" x = "1" y = "0" proclocid = "0" stackname = "stack" heapname = "heap" startid = "0" usetty = "1" />
+        </vspace>
+
+        <vspace name = "display" startname = "data" >
+            <vseg name = "seg_code"        vbase = "0x00400000" mode = "CXWU" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "code"        type	= "ELF" length = "0x00010000" binpath = "build/display/display.elf" />
+            </vseg>
+            <vseg name = "seg_data"        vbase = "0x00500000" mode = "C_WU" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "data"        type	= "ELF" length = "0x00010000" binpath = "build/display/display.elf" />
+			   </vseg>
+            <vseg name = "seg_ptab"        vbase = "0x00600000" mode = "C_W_" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "ptab"        type	= "PTAB" length  = "0x00012000" align   = "13" />
+            </vseg>
+            <vseg name = "seg_stack"       vbase = "0x00700000" mode = "C_WU" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "stack"       type	= "BUFFER" length = "0x00010000" />
+                <vobj name = "heap"        type	= "BUFFER" length = "0x00010000" />
+            </vseg>
+
+            <task name = "main_display" x = "1" y = "1" proclocid = "0" stackname = "stack" heapname = "heap" startid = "0" usetty = "1" usecma = "1" />
+        </vspace>
+
+        <vspace name = "router" startname = "data" > 
+            <vseg name = "seg_code"        vbase = "0x00400000" mode = "CXWU" x = "0" y = "0" psegname = "PSEG_RAM" > 
+                <vobj name = "code"        type	= "ELF" length = "0x00010000" binpath = "build/router/router.elf" /> 
+            </vseg>
+            <vseg name = "seg_data"        vbase = "0x00500000" mode = "C_WU" x = "0" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "data"        type	= "ELF" length = "0x00010000" binpath = "build/router/router.elf" />
+            </vseg>
+            <vseg name = "seg_ptab"        vbase = "0x00600000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+                <vobj name = "ptab"        type	= "PTAB" length  = "0x00012000" align   = "13" />
+            </vseg>
+            <vseg name = "seg_stack_prod"  vbase = "0x00700000" mode = "C_WU" x = "0" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "stack_prod"  type	= "BUFFER" length = "0x00010000" /> 
+                <vobj name = "heap_prod"   type	= "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_stack_cons"  vbase = "0x00800000" mode = "C_WU" x = "0" y = "1" psegname = "PSEG_RAM" > 
+                <vobj name = "stack_cons"  type	= "BUFFER" length = "0x00010000" />
+                <vobj name = "heap_cons"   type	= "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_stack_routA" vbase = "0x00900000" mode = "C_WU" x = "1" y = "0" psegname = "PSEG_RAM" > 
+                <vobj name = "stack_routA" type	= "BUFFER" length = "0x00010000" />
+                <vobj name = "heap_routA"  type	= "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_stack_routB" vbase = "0x00A00000" mode = "C_WU" x = "1" y = "1" psegname = "PSEG_RAM" > 
+                <vobj name = "stack_routB" type	= "BUFFER" length = "0x00010000" />
+                <vobj name = "heap_routB"  type	= "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_mwmrs"       vbase = "0x00B00000" mode = "C_WU" x = "0" y = "0" psegname = "PSEG_RAM" > 
+                <vobj name = "mwmr_in"     type = "MWMR" length = "0x00000020" init = "1" />
+                <vobj name = "mwmr_out"    type = "MWMR" length = "0x00000020" init = "1" />
+		    </vseg>
+
+            <task name = "producer" x = "0" y = "0" proclocid = "0" stackname = "stack_prod"  heapname = "heap_prod"  startid = "0" usetty = "1" />
+            <task name = "consumer" x = "0" y = "1" proclocid = "0" stackname = "stack_cons"  heapname = "heap_cons"  startid = "1" usetty = "1" />
+            <task name = "router_A" x = "1" y = "0" proclocid = "0" stackname = "stack_routA" heapname = "heap_routA" startid = "2" usetty = "1" />
+            <task name = "router_B" x = "1" y = "1" proclocid = "0" stackname = "stack_routB" heapname = "heap_routB" startid = "2" usetty = "1" />
+        </vspace>
+
+    </vspaceset>
+</mapping_info>
Index: /soft/giet_vm/mappings/4c_1p_sort_iob.xml
===================================================================
--- /soft/giet_vm/mappings/4c_1p_sort_iob.xml	(revision 311)
+++ /soft/giet_vm/mappings/4c_1p_sort_iob.xml	(revision 311)
@@ -0,0 +1,347 @@
+<?xml version="1.0"?>
+
+<mapping_info signature    = "0xdace2014" 
+              name         = "4c_1p_sort_iob"
+              x_size       = "2" 
+              y_size       = "2" 
+              x_width      = "4"
+              y_width      = "4"
+			  irq_per_proc = "1" 
+              x_io         = "0" 
+              y_io         = "0" >
+
+*** This mapping is for the "tsar_generic_iob" hardware architecture,
+*** with 4 clusters containing processors and 1 processor per cluster,
+*** 40 bits physical address, and 16 Mbytes per cluster.
+*** External peripherals are accessed (through IOB) in cluster(0,0)
+*** HWI interrupts from external peripherals are translated to WTI interrupts
+*** by an external IOPIC component.
+The parallel application "sort" is launched on the 4 processors.
+
+    <clusterset>
+
+        <cluster x = "0" y = "0" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0000000000" length = "0x0400000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x00B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x00B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x00B2000000" length = "0x0000001000" />
+
+*** Physical segments for external peripherals (including the ROM containing the preloader code)
+
+            <pseg name = "PSEG_IOB"  type = "PERI" base = "0x00BE000000" length = "0x0000001000" />
+            <pseg name = "PSEG_IOC"  type = "PERI" base = "0x00B3000000" length = "0x0000001000" /> 
+            <pseg name = "PSEG_TTY"  type = "PERI" base = "0x00B4000000" length = "0x0000001000" /> 
+            <pseg name = "PSEG_NIC"  type = "PERI" base = "0x00B5000000" length = "0x0000080000" />
+            <pseg name = "PSEG_CMA"  type = "PERI" base = "0x00B6000000" length = "0x0000008000" />
+            <pseg name = "PSEG_FBF"  type = "PERI" base = "0x00B7000000" length = "0x0000004000" /> 
+            <pseg name = "PSEG_PIC"  type = "PERI" base = "0x00B8000000" length = "0x0000001000" />
+            <pseg name = "PSEG_ROM"  type = "PERI" base = "0x00BFC00000" length = "0x0000004000" />
+
+            <proc index  = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" > 
+            </periph>
+            <periph type = "IOB"  psegname = "PSEG_IOB" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16"  >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "4"  isr = "ISR_NIC_RX" channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "5"  isr = "ISR_NIC_RX" channel = "1" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "6"  isr = "ISR_NIC_TX" channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "7"  isr = "ISR_NIC_TX" channel = "1" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "8"  isr = "ISR_CMA"    channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "9"  isr = "ISR_CMA"    channel = "2" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "10" isr = "ISR_CMA"    channel = "2" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "11" isr = "ISR_CMA"    channel = "3" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "12" isr = "ISR_BDV"                  dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "13" isr = "ISR_TTY_RX" channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "14" isr = "ISR_TTY_RX" channel = "1" dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+
+*** external peripherals
+
+            <periph type = "IOC"  psegname = "PSEG_IOC"  subtype = "BDV" > 
+            </periph>
+            <periph type = "TTY"  psegname = "PSEG_TTY"  channels = "1" > 
+            </periph>
+            <periph type = "NIC"  psegname = "PSEG_NIC"  channels = "2" >
+            </periph>
+            <periph type = "CMA"  psegname = "PSEG_CMA"  channels = "4" >
+            </periph>
+            <periph type = "FBF"  psegname = "PSEG_FBF" >
+            </periph>
+            <periph type = "ROM"  psegname = "PSEG_ROM" >
+            </periph>
+            <periph type = "PIC"  psegname = "PSEG_PIC"  channels = "32" >
+                <irq srcid = "0"  dstx = "0"  dsty = "0"  dstid = "4"  />
+                <irq srcid = "1"  dstx = "0"  dsty = "0"  dstid = "5"  />
+                <irq srcid = "2"  dstx = "0"  dsty = "0"  dstid = "6"  />
+                <irq srcid = "3"  dstx = "0"  dsty = "0"  dstid = "7"  />
+                <irq srcid = "4"  dstx = "0"  dsty = "0"  dstid = "8"  />
+                <irq srcid = "5"  dstx = "0"  dsty = "0"  dstid = "9"  />
+                <irq srcid = "6"  dstx = "0"  dsty = "0"  dstid = "10" />
+                <irq srcid = "7"  dstx = "0"  dsty = "0"  dstid = "11" />
+                <irq srcid = "8"  dstx = "0"  dsty = "0"  dstid = "12" />
+                <irq srcid = "16" dstx = "0"  dsty = "0"  dstid = "13" />
+                <irq srcid = "17" dstx = "0"  dsty = "0"  dstid = "14" />
+                <irq srcid = "18" dstx = "0"  dsty = "1"  dstid = "13" />
+                <irq srcid = "19" dstx = "0"  dsty = "1"  dstid = "14" />
+                <irq srcid = "20" dstx = "1"  dsty = "0"  dstid = "13" />
+                <irq srcid = "21" dstx = "1"  dsty = "0"  dstid = "14" />
+                <irq srcid = "21" dstx = "1"  dsty = "1"  dstid = "13" />
+                <irq srcid = "22" dstx = "1"  dsty = "1"  dstid = "14" />
+            </periph>
+        </cluster>
+
+        <cluster x = "0" y = "1" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0100000000" length = "0x0010000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x01B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x01B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x01B2000000" length = "0x0000001000" />
+
+            <proc index = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+        </cluster>
+
+        <cluster x = "1" y = "0" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1000000000" length = "0x0010000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x10B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x10B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x10B2000000" length = "0x0000001000" />
+
+            <proc index = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+        </cluster>
+
+        <cluster x = "1" y = "1" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1100000000" length = "0x0010000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x11B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x11B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x11B2000000" length = "0x0000001000" />
+
+            <proc index = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+        </cluster>
+    </clusterset>
+
+    <globalset> 
+
+*** Global vsegs associated to peripherals  replicated in all clusters (XCU, MMC, SCHED, DMA)
+*** must respect the following policy (checked by the XML parser) :
+*** vbase[x,y] = vbase[0,0] + 64K * cluster_xy
+*** pbase[x,y] = pbase[0,0] + 4G  * cluster_xy 
+*** ( with cluster_xy = x*16 + y )
+*** the vseg type is entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster index must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+*** 5 global vsegs used by the boot code / A[31:28] = 0x0 / Identity mapping
+*** seg_boot_mapping is loaded by the boot-loader. It contains the mapping info. Reused by the kernel.
+*** seg_boot_code and seg_boot data are loaded by the preloader, used by the boot-loader Not reused by the kernel.
+*** seg_boot_stack is contains the stacks used by all processors during reset and boot. Not reused by the Kernel.
+*** seg_boot_buffer is used by the boot-loader. It can contain a complete .elf file. Not reused by the kernel.
+
+        <vseg name = "seg_boot_mapping"   vbase = "0x00000000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_mapping"   type = "BLOB"   length = "0x00010000" binpath	= "map.bin" />
+        </vseg>
+        <vseg name = "seg_boot_code"      vbase = "0x00010000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_code"      type = "BUFFER" length = "0x00020000" />
+        </vseg>
+        <vseg name = "seg_boot_data"      vbase = "0x00030000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_data"      type = "BUFFER" length = "0x00010000" />
+        </vseg>
+        <vseg name = "seg_boot_buffer"    vbase = "0x00040000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_buffer"    type = "BUFFER" length = "0x00060000" />
+        </vseg>
+        <vseg name = "seg_boot_stack"     vbase = "0x000A0000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_stack"     type = "BUFFER" length = "0x00050000" />
+        </vseg>
+
+*** 4 global vsegs used by the kernel / A[31:28] = 0x8 
+  
+        <vseg name = "seg_kernel_code"    vbase = "0x80000000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_code"    type = "ELF" length = "0x00020000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name = "seg_kernel_data"    vbase = "0x80020000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_data"    type = "ELF" length = "0x00060000" binpath = "build/kernel/kernel.elf" />
+		</vseg>
+        <vseg name = "seg_kernel_uncdata" vbase = "0x80080000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_uncdata" type = "ELF" length = "0x00040000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name = "seg_kernel_init"    vbase = "0x800C0000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_init"    type = "ELF" length = "0x00010000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+
+*** 8 Global vsegs for external peripherals / A[31:28] = 0xB / Identity mapping
+
+        <vseg name = "seg_iob"            vbase = "0xBE000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_IOB" ident = "1" >
+            <vobj name = "iob"            type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_ioc"            vbase = "0xB3000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_IOC" ident = "1" >
+            <vobj name = "ioc"            type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_tty"            vbase = "0xB4000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_TTY" ident = "1" >
+   			<vobj name = "tty"            type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_nic"            vbase = "0xB5000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_NIC" ident = "1" >
+            <vobj name = "nic"            type = "PERI" length  = "0x00080000" /> 
+        </vseg>
+        <vseg name = "seg_cma"            vbase = "0xB6000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_CMA" ident = "1" >
+            <vobj name = "cma"            type = "PERI" length  = "0x00008000" /> 
+        </vseg>
+        <vseg name = "seg_fbf"            vbase = "0xB7000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_FBF" ident = "1" >
+            <vobj name = "fbf"            type = "PERI" length  = "0x00004000" /> 
+        </vseg>
+        <vseg name = "seg_pic"            vbase = "0xB8000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_PIC" ident = "1" >
+            <vobj name = "pic"            type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_rom"            vbase = "0xBFC00000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_ROM" ident = "1" >
+            <vobj name = "rom"            type = "PERI" length  = "0x00004000" /> 
+        </vseg>
+
+*** 4 global vsegs for replicated ICUS / A[31:24] = 0xB0 / Increment = 0x10000 / Identity mapping in cluster 0            
+
+        <vseg name = "seg_icu_0"          vbase = "0xB0000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_XCU" ident = "1" > 
+            <vobj name = "icu_0"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_1"          vbase = "0xB0010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_1"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_2"          vbase = "0xB0100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_2"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_3"          vbase = "0xB0110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_3"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+
+*** 4 global vsegs for replicated DMAs / A[31:24] = 0xB1 / Increment = 0x10000 / Tdentity mapping in cluster 0
+*** The peripheral type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+        <vseg name = "seg_dma_0"          vbase = "0xB1000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_DMA" ident = "1" >
+            <vobj name = "dma_0"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+        <vseg name = "seg_dma_1"          vbase = "0xB1010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_DMA" >
+            <vobj name = "dma_1"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+        <vseg name = "seg_dma_2"          vbase = "0xB1100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_DMA" >
+            <vobj name = "dma_2"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+        <vseg name = "seg_dma_3"          vbase = "0xB1110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_DMA" >
+            <vobj name = "dma_3"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+
+*** 4 global segs for replicated MMC / A[31:24] = 0xB2 / Increment = 0x10000 / Identity mapping in cluster 0
+*** The peripheral type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+        <vseg name = "seg_memc_0"         vbase = "0xB2000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_MMC" ident = "1" >
+            <vobj name = "memc_0"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_1"         vbase = "0xB2010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_MMC" >
+            <vobj name = "memc_1"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_2"         vbase = "0xB2100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_MMC" >
+            <vobj name = "memc_2"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_3"         vbase = "0xB2110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_MMC" >
+            <vobj name = "memc_3"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+
+*** 4 global vsegs for replicated schedulers / A[31:28] = 0xF / Increment = 0x10000
+*** The type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+        <vseg name = "seg_sched_0"        vbase = "0xF0000000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" >
+            <vobj name = "sched_0"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_1"        vbase = "0xF0010000" mode = "C_W_" x = "0" y = "1" psegname = "PSEG_RAM" >
+            <vobj name = "sched_1"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_2"        vbase = "0xF0100000" mode = "C_W_" x = "1" y = "0" psegname = "PSEG_RAM" >
+            <vobj name = "sched_2"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_3"        vbase = "0xF0110000" mode = "C_W_" x = "1" y = "1" psegname = "PSEG_RAM" >
+            <vobj name = "sched_3"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+
+    </globalset> 
+
+    <vspaceset>
+
+*** For each vspace, the startname field is the name of the vobj containing the start_vector (entry point array)
+*** For each task, the startid field define the task entry point as an index in the start_vector
+*** For each task, the clusterid and proclocid arguments define the task static placement
+*** For each task, the stackname field is the name of the vobj containing the task stack 
+*** For each task, the heapname field is the name of the vobj containing the task heap 
+
+        <vspace name = "sort" startname = "sort_data" > 
+            <vseg name = "seg_sort_code"   vbase = "0x00400000" mode = "CXWU" x = "1" y = "1" psegname = "PSEG_RAM" > 
+                <vobj name = "sort_code"   type	 = "ELF" length = "0x00010000" binpath = "build/sort/sort.elf" /> 
+            </vseg>
+            <vseg name = "seg_sort_data"   vbase = "0x00500000" mode = "__WU" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "sort_data"   type	 = "ELF" length = "0x00010000" binpath = "build/sort/sort.elf" />
+            </vseg>
+            <vseg name = "seg_sort_ptab"   vbase = "0x00600000" mode = "C_W_" x = "1" y = "1" psegname = "PSEG_RAM" > 
+                <vobj name = "sort_ptab"   type	 = "PTAB" length  = "0x00020000" align   = "13" />
+            </vseg>
+            <vseg name = "seg_sort_stack0" vbase = "0x00800000" mode = "C_WU" x = "0" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "sort_stack0" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "sort_heap0"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_sort_stack1" vbase = "0x00A00000" mode = "C_WU" x = "0" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "sort_stack1" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "sort_heap1"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_sort_stack2" vbase = "0x00C00000" mode = "C_WU" x = "1" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "sort_stack2" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "sort_heap2"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_sort_stack3" vbase = "0x00E00000" mode = "C_WU" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "sort_stack3" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "sort_heap3"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+
+*** This vobj emulates a command line argument for the sort application
+
+			<vseg name = "seg_params"       vbase = "0x00100000" mode = "C_WU" x = "0" y = "0" psegname = "PSEG_RAM" >
+				<vobj name = "nb_thread"    type  = "CONST"  length = "0x4" init = "4" />
+			</vseg>
+
+            <task name = "sort_0" trdid = "0" x = "0" y = "0" proclocid = "0" stackname = "sort_stack0" heapname = "sort_heap0" startid = "0" usetty = "1" />
+            <task name = "sort_1" trdid = "1" x = "0" y = "1" proclocid = "0" stackname = "sort_stack1" heapname = "sort_heap1" startid = "0" usetty = "1" />
+            <task name = "sort_2" trdid = "2" x = "1" y = "0" proclocid = "0" stackname = "sort_stack2" heapname = "sort_heap2" startid = "0" usetty = "1" />
+            <task name = "sort_3" trdid = "3" x = "1" y = "1" proclocid = "0" stackname = "sort_stack3" heapname = "sort_heap3" startid = "0" usetty = "1" />
+        </vspace>
+    </vspaceset>
+</mapping_info>
Index: /soft/giet_vm/mappings/4c_1p_transpose_iob.xml
===================================================================
--- /soft/giet_vm/mappings/4c_1p_transpose_iob.xml	(revision 311)
+++ /soft/giet_vm/mappings/4c_1p_transpose_iob.xml	(revision 311)
@@ -0,0 +1,341 @@
+<?xml version="1.0"?>
+
+<mapping_info signature    = "0xdace2014" 
+              name         = "4c_1p_transpose_iob"
+              x_size       = "2" 
+              y_size       = "2" 
+              x_width      = "4"
+              y_width      = "4"
+			  irq_per_proc = "1" 
+              x_io         = "0" 
+              y_io         = "0" >
+
+*** This mapping is for the "tsar_generic_iob" hardware architecture,
+*** with 4 clusters containing processors, 1 processor per cluster,
+*** 40 bits physical address, and 16 Mbytes per cluster.
+*** External peripherals are accessed (through IOB) in cluster(0,0)
+*** HWI interrupts from external peripherals are translated to WTI interrupts
+*** by an external IOPIC component.
+The parallel application "transpose" is launched on the 4 processors.
+
+    <clusterset>
+
+        <cluster x = "0" y = "0" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0000000000" length = "0x0010000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x00B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x00B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x00B2000000" length = "0x0000001000" />
+
+*** Physical segments for external peripherals (including the ROM containing the preloader code)
+
+            <pseg name = "PSEG_IOB"  type = "PERI" base = "0x00BE000000" length = "0x0000100000" />
+            <pseg name = "PSEG_IOC"  type = "PERI" base = "0x00B3000000" length = "0x0000001000" /> 
+            <pseg name = "PSEG_TTY"  type = "PERI" base = "0x00B4000000" length = "0x0000001000" /> 
+            <pseg name = "PSEG_NIC"  type = "PERI" base = "0x00B5000000" length = "0x0000080000" />
+            <pseg name = "PSEG_CMA"  type = "PERI" base = "0x00B6000000" length = "0x0000008000" />
+            <pseg name = "PSEG_FBF"  type = "PERI" base = "0x00B7000000" length = "0x0000004000" /> 
+            <pseg name = "PSEG_PIC"  type = "PERI" base = "0x00B8000000" length = "0x0000001000" />
+            <pseg name = "PSEG_ROM"  type = "PERI" base = "0x00BFC00000" length = "0x0000004000" />
+
+            <proc index  = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" > 
+            </periph>
+            <periph type = "IOB"  psegname = "PSEG_IOB" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16"  >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "4"  isr = "ISR_NIC_RX" channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "5"  isr = "ISR_NIC_RX" channel = "1" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "6"  isr = "ISR_NIC_TX" channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "7"  isr = "ISR_NIC_TX" channel = "1" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "8"  isr = "ISR_CMA"    channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "9"  isr = "ISR_CMA"    channel = "1" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "10" isr = "ISR_CMA"    channel = "2" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "11" isr = "ISR_CMA"    channel = "3" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "12" isr = "ISR_BDV"                  dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "13" isr = "ISR_TTY_RX" channel = "0" dstid = "0" /> 
+                <irq srctype = "WTI" srcid = "14" isr = "ISR_TTY_RX" channel = "1" dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+
+*** external peripherals
+
+            <periph type = "IOC"  psegname = "PSEG_IOC"  subtype = "BDV" > 
+            </periph>
+            <periph type = "TTY"  psegname = "PSEG_TTY"  channels = "5" > 
+            </periph>
+            <periph type = "NIC"  psegname = "PSEG_NIC"  channels = "2" >
+            </periph>
+            <periph type = "CMA"  psegname = "PSEG_CMA"  channels = "4" >
+            </periph>
+            <periph type = "FBF"  psegname = "PSEG_FBF" >
+            </periph>
+            <periph type = "ROM"  psegname = "PSEG_ROM" >
+            </periph>
+            <periph type = "PIC"  psegname = "PSEG_PIC"  channels = "32" >
+                <irq srcid = "0"  dstx = "0"  dsty = "0"  dstid = "4"  />
+                <irq srcid = "1"  dstx = "0"  dsty = "0"  dstid = "5"  />
+                <irq srcid = "2"  dstx = "0"  dsty = "0"  dstid = "6"  />
+                <irq srcid = "3"  dstx = "0"  dsty = "0"  dstid = "7"  />
+                <irq srcid = "4"  dstx = "0"  dsty = "0"  dstid = "8"  />
+                <irq srcid = "5"  dstx = "0"  dsty = "0"  dstid = "9"  />
+                <irq srcid = "6"  dstx = "0"  dsty = "0"  dstid = "10" />
+                <irq srcid = "7"  dstx = "0"  dsty = "0"  dstid = "11" />
+                <irq srcid = "8"  dstx = "0"  dsty = "0"  dstid = "12" />
+                <irq srcid = "16" dstx = "0"  dsty = "0"  dstid = "13" />
+                <irq srcid = "17" dstx = "0"  dsty = "0"  dstid = "14" />
+                <irq srcid = "18" dstx = "0"  dsty = "1"  dstid = "13" />
+                <irq srcid = "19" dstx = "0"  dsty = "1"  dstid = "14" />
+                <irq srcid = "20" dstx = "1"  dsty = "0"  dstid = "13" />
+                <irq srcid = "21" dstx = "1"  dsty = "0"  dstid = "14" />
+                <irq srcid = "21" dstx = "1"  dsty = "1"  dstid = "13" />
+                <irq srcid = "22" dstx = "1"  dsty = "1"  dstid = "14" />
+            </periph>
+        </cluster>
+
+        <cluster x = "0" y = "1" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0100000000" length = "0x0010000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x01B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x01B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x01B2000000" length = "0x0000001000" />
+
+            <proc index = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+        </cluster>
+
+        <cluster x = "1" y = "0" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1000000000" length = "0x0010000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x10B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x10B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x10B2000000" length = "0x0000001000" />
+
+            <proc index = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+        </cluster>
+
+        <cluster x = "1" y = "1" >
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1100000000" length = "0x0010000000" />
+            <pseg name = "PSEG_XCU"  type = "PERI" base = "0x11B0000000" length = "0x0000002000" />
+            <pseg name = "PSEG_DMA"  type = "PERI" base = "0x11B1000000" length = "0x0000004000" />
+            <pseg name = "PSEG_MMC"  type = "PERI" base = "0x11B2000000" length = "0x0000001000" />
+
+            <proc index = "0" />
+
+            <periph type = "MMC"  psegname = "PSEG_MMC" >
+            </periph>
+            <periph type = "DMA"  psegname = "PSEG_DMA"  channels = "1" >
+            </periph>
+            <periph type = "XCU"  psegname = "PSEG_XCU"  channels = "16" >
+                <irq srctype = "WTI" srcid = "0"  isr = "ISR_WAKUP"                dstid = "0" /> 
+                <irq srctype = "PTI" srcid = "0"  isr = "ISR_TICK"                 dstid = "0" /> 
+                <irq srctype = "HWI" srcid = "0"  isr = "ISR_MMC"                  dstid = "0" /> 
+            </periph>
+        </cluster>
+    </clusterset>
+
+    <globalset> 
+
+*** Global vsegs associated to peripherals  replicated in all clusters (XCU, MMC, SCHED, DMA)
+*** must respect the following policy (checked by the XML parser) :
+*** vbase[x,y] = vbase[0,0] + 64K * cluster_xy
+*** pbase[x,y] = pbase[0,0] + 4G  * cluster_xy 
+*** ( with cluster_xy = x*16 + y )
+*** the vseg type is entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster index must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+*** 5 global vsegs used by the boot code / A[31:28] = 0x0 / Identity mapping
+*** seg_boot_mapping is loaded by the boot-loader. It contains the mapping info. Reused by the kernel.
+*** seg_boot_code and seg_boot data are loaded by the preloader, used by the boot-loader Not reused by the kernel.
+*** seg_boot_stack is contains the stacks used by all processors during reset and boot. Not reused by the Kernel.
+*** seg_boot_buffer is used by the boot-loader. It can contain a complete .elf file. Not reused by the kernel.
+
+        <vseg name = "seg_boot_mapping"   vbase = "0x00000000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_mapping"   type = "BLOB"   length = "0x00010000" binpath	= "map.bin" />
+        </vseg>
+        <vseg name = "seg_boot_code"      vbase = "0x00010000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_code"      type = "BUFFER" length = "0x00020000" />
+        </vseg>
+        <vseg name = "seg_boot_data"      vbase = "0x00030000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_data"      type = "BUFFER" length = "0x00010000" />
+        </vseg>
+        <vseg name = "seg_boot_buffer"    vbase = "0x00040000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_buffer"    type = "BUFFER" length = "0x00060000" />
+        </vseg>
+        <vseg name = "seg_boot_stack"     vbase = "0x000A0000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" ident = "1" >
+            <vobj name = "boot_stack"     type = "BUFFER" length = "0x00050000" />
+        </vseg>
+
+*** 4 global vsegs used by the kernel / A[31:28] = 0x8 
+  
+        <vseg name = "seg_kernel_code"    vbase = "0x80000000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_code"    type = "ELF" length = "0x00020000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name = "seg_kernel_data"    vbase = "0x80020000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_data"    type = "ELF" length = "0x00060000" binpath = "build/kernel/kernel.elf" />
+		</vseg>
+        <vseg name = "seg_kernel_uncdata" vbase = "0x80080000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_uncdata" type = "ELF" length = "0x00040000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name = "seg_kernel_init"    vbase = "0x800C0000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_RAM" > 
+            <vobj name = "kernel_init"    type = "ELF" length = "0x00010000" binpath = "build/kernel/kernel.elf" />
+        </vseg>
+
+*** 8 Global vsegs for external peripherals / A[31:28] = 0xB / Identity mapping
+
+        <vseg name = "seg_iob"            vbase = "0xBE000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_IOB" ident = "1" >
+            <vobj name = "iob"            type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_ioc"            vbase = "0xB3000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_IOC" ident = "1" >
+            <vobj name = "ioc"            type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_tty"            vbase = "0xB4000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_TTY" ident = "1" >
+   			<vobj name = "tty"            type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_nic"            vbase = "0xB5000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_NIC" ident = "1" >
+            <vobj name = "nic"            type = "PERI" length  = "0x00080000" /> 
+        </vseg>
+        <vseg name = "seg_cma"            vbase = "0xB6000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_CMA" ident = "1" >
+            <vobj name = "cma"            type = "PERI" length  = "0x00008000" /> 
+        </vseg>
+        <vseg name = "seg_fbf"            vbase = "0xB7000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_FBF" ident = "1" >
+            <vobj name = "fbf"            type = "PERI" length  = "0x00004000" /> 
+        </vseg>
+        <vseg name = "seg_pic"            vbase = "0xB8000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_PIC" ident = "1" >
+            <vobj name = "pic"            type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_rom"            vbase = "0xBFC00000" mode = "CXW_" x = "0" y = "0" psegname = "PSEG_ROM" ident = "1" >
+            <vobj name = "rom"            type = "PERI" length  = "0x00004000" /> 
+        </vseg>
+
+*** 4 global vsegs for replicated ICUS / A[31:24] = 0xB0 / Increment = 0x10000 / Identity mapping in cluster 0            
+
+        <vseg name = "seg_icu_0"          vbase = "0xB0000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_XCU" ident = "1" > 
+            <vobj name = "icu_0"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_1"          vbase = "0xB0010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_1"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_2"          vbase = "0xB0100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_2"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+        <vseg name = "seg_icu_3"          vbase = "0xB0110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_XCU" > 
+            <vobj name = "icu_3"          type = "PERI" length  = "0x00001000" /> 
+        </vseg>
+
+*** 4 global vsegs for replicated DMAs / A[31:24] = 0xB1 / Increment = 0x10000 / Tdentity mapping in cluster 0
+*** The peripheral type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+        <vseg name = "seg_dma_0"          vbase = "0xB1000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_DMA" ident = "1" >
+            <vobj name = "dma_0"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+        <vseg name = "seg_dma_1"          vbase = "0xB1010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_DMA" >
+            <vobj name = "dma_1"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+        <vseg name = "seg_dma_2"          vbase = "0xB1100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_DMA" >
+            <vobj name = "dma_2"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+        <vseg name = "seg_dma_3"          vbase = "0xB1110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_DMA" >
+            <vobj name = "dma_3"          type = "PERI" length  = "0x00004000" />
+        </vseg>
+
+*** 4 global segs for replicated MMC / A[31:24] = 0xB2 / Increment = 0x10000 / Identity mapping in cluster 0
+*** The peripheral type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+        <vseg name = "seg_memc_0"         vbase = "0xB2000000" mode = "__W_" x = "0" y = "0" psegname = "PSEG_MMC" ident = "1" >
+            <vobj name = "memc_0"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_1"         vbase = "0xB2010000" mode = "__W_" x = "0" y = "1" psegname = "PSEG_MMC" >
+            <vobj name = "memc_1"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_2"         vbase = "0xB2100000" mode = "__W_" x = "1" y = "0" psegname = "PSEG_MMC" >
+            <vobj name = "memc_2"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+        <vseg name = "seg_memc_3"         vbase = "0xB2110000" mode = "__W_" x = "1" y = "1" psegname = "PSEG_MMC" >
+            <vobj name = "memc_3"         type = "PERI" length  = "0x00001000" />
+        </vseg>
+
+*** 4 global vsegs for replicated schedulers / A[31:28] = 0xF / Increment = 0x10000
+*** The type must be entirely defined by the 8 virtual address MSB bits (mask_type = 0xFF000000)
+*** The cluster id must be encoded in the next 8 virtual address bits (cluster_mask = 0x00FF0000)
+
+        <vseg name = "seg_sched_0"        vbase = "0xF0000000" mode = "C_W_" x = "0" y = "0" psegname = "PSEG_RAM" >
+            <vobj name = "sched_0"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_1"        vbase = "0xF0010000" mode = "C_W_" x = "0" y = "1" psegname = "PSEG_RAM" >
+            <vobj name = "sched_1"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_2"        vbase = "0xF0100000" mode = "C_W_" x = "1" y = "0" psegname = "PSEG_RAM" >
+            <vobj name = "sched_2"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+        <vseg name = "seg_sched_3"        vbase = "0xF0110000" mode = "C_W_" x = "1" y = "1" psegname = "PSEG_RAM" >
+            <vobj name = "sched_3"        type = "SCHED" length  = "0x00008000" />
+        </vseg>
+
+    </globalset> 
+
+    <vspaceset>
+
+*** For each vspace, the startname field is the name of the vobj containing the start_vector (entry point array)
+*** For each task, the startid field define the task entry point as an index in the start_vector
+*** For each task, the clusterid and proclocid arguments define the task static placement
+*** For each task, the stackname field is the name of the vobj containing the task stack 
+*** For each task, the heapname field is the name of the vobj containing the task heap 
+
+        <vspace name = "transpose" startname = "trsp_data" > 
+            <vseg name = "seg_trsp_code"   vbase = "0x00400000" mode = "CXWU" x = "1" y = "1" psegname = "PSEG_RAM" > 
+                <vobj name = "trsp_code"   type	 = "ELF" length = "0x00010000" binpath = "build/transpose/transpose.elf" /> 
+            </vseg>
+            <vseg name = "seg_trsp_data"   vbase = "0x00500000" mode = "__WU" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "trsp_data"   type	 = "ELF" length = "0x00010000" binpath = "build/transpose/transpose.elf" />
+            </vseg>
+            <vseg name = "seg_trsp_ptab"   vbase = "0x00600000" mode = "C_W_" x = "1" y = "1" psegname = "PSEG_RAM" > 
+                <vobj name = "trsp_ptab"   type	 = "PTAB" length  = "0x00020000" align   = "13" />
+            </vseg>
+            <vseg name = "seg_trsp_stack0" vbase = "0x00800000" mode = "C_WU" x = "0" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "trsp_stack0" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "trsp_heap_0"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_trsp_stack1" vbase = "0x00A00000" mode = "C_WU" x = "0" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "trsp_stack1" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "trsp_heap_1"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_trsp_stack2" vbase = "0x00C00000" mode = "C_WU" x = "1" y = "0" psegname = "PSEG_RAM" >
+                <vobj name = "trsp_stack2" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "trsp_heap_2"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+            <vseg name = "seg_trsp_stack3" vbase = "0x00E00000" mode = "C_WU" x = "1" y = "1" psegname = "PSEG_RAM" >
+                <vobj name = "trsp_stack3" type	 = "BUFFER" length = "0x00010000" /> 
+                <vobj name = "trsp_heap_3"  type	 = "BUFFER" length = "0x00010000" /> 
+            </vseg>
+
+            <task name = "trsp_0" trdid = "0" x = "0" y = "0" proclocid = "0" stackname = "trsp_stack0" heapname = "trsp_heap_0" startid = "0" usetty = "1" />
+            <task name = "trsp_1" trdid = "1" x = "0" y = "1" proclocid = "0" stackname = "trsp_stack1" heapname = "trsp_heap_1" startid = "0" usetty = "1" />
+            <task name = "trsp_2" trdid = "2" x = "1" y = "0" proclocid = "0" stackname = "trsp_stack2" heapname = "trsp_heap_2" startid = "0" usetty = "1" />
+            <task name = "trsp_3" trdid = "3" x = "1" y = "1" proclocid = "0" stackname = "trsp_stack3" heapname = "trsp_heap_3" startid = "0" usetty = "1" />
+        </vspace>
+    </vspaceset>
+</mapping_info>
Index: /soft/giet_vm/mappings/4c_4p_sort_leti.xml
===================================================================
--- /soft/giet_vm/mappings/4c_4p_sort_leti.xml	(revision 310)
+++ /soft/giet_vm/mappings/4c_4p_sort_leti.xml	(revision 311)
@@ -22,5 +22,5 @@
     <clusterset>
         <cluster x = "0" y = "0" >
-            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0000000000" length = "0x0400000000" />
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0000000000" length = "0x0040000000" />
             <pseg name = "PSEG_XCU"  type = "PERI" base = "0x00F0000000" length = "0x0000002000" />
             <pseg name = "PSEG_MMC"  type = "PERI" base = "0x00E0000000" length = "0x0000001000" />
@@ -67,5 +67,5 @@
 
         <cluster x = "0" y = "1" >
-            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0100000000" length = "0x0400000000" />
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x0100000000" length = "0x0040000000" />
             <pseg name = "PSEG_XCU"  type = "PERI" base = "0x01F0000000" length = "0x0000002000" />
             <pseg name = "PSEG_MMC"  type = "PERI" base = "0x01E0000000" length = "0x0000001000" />
@@ -94,5 +94,5 @@
 
         <cluster x = "1" y = "0" >
-            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1000000000" length = "0x0400000000" />
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1000000000" length = "0x0040000000" />
             <pseg name = "PSEG_XCU"  type = "PERI" base = "0x10F0000000" length = "0x0000002000" />
             <pseg name = "PSEG_MMC"  type = "PERI" base = "0x10E0000000" length = "0x0000001000" />
@@ -121,5 +121,5 @@
 
         <cluster x = "1" y = "1" >
-            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1100000000" length = "0x0400000000" />
+            <pseg name = "PSEG_RAM"  type = "RAM"  base = "0x1100000000" length = "0x0040000000" />
             <pseg name = "PSEG_XCU"  type = "PERI" base = "0x11F0000000" length = "0x0000002000" />
             <pseg name = "PSEG_MMC"  type = "PERI" base = "0x11E0000000" length = "0x0000001000" />
Index: /soft/giet_vm/mappings/tsar_leti_4_4_4_sort.xml
===================================================================
--- /soft/giet_vm/mappings/tsar_leti_4_4_4_sort.xml	(revision 311)
+++ /soft/giet_vm/mappings/tsar_leti_4_4_4_sort.xml	(revision 311)
@@ -0,0 +1,880 @@
+<?xml version="1.0"?>
+
+<mapping_info signature    = "0xDACE2014"
+              name         = "tsar_leti_4_4_4_sort"
+              x_size       = "4"
+              y_size       = "4"
+              x_width      = "4"
+              y_width      = "4"
+              irq_per_proc = "4"
+              use_ram_disk = "1"
+              x_io         = "0"
+              y_io         = "0" >
+    <clusterset>
+        <cluster x="0" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x0" length="0x4000000" />
+            <pseg name="PSEG_BDV" type="PERI" base="0xf2000000" length="0x1000" />
+            <pseg name="PSEG_TTY" type="PERI" base="0xf4000000" length="0x1000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0xe0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0xf0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="IOC" subtype="BDV" psegname="PSEG_BDV" channels="1" >
+            </periph>
+            <periph type="TTY" subtype="NONE" psegname="PSEG_TTY" channels="1" >
+            </periph>
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+                <irq srctype="HWI" srcid="9" isr="ISR_BDV" channel="0" dstid="0" />
+                <irq srctype="HWI" srcid="10" isr="ISR_TTY_RX" channel="0" dstid="0" />
+            </periph>
+        </cluster>
+        <cluster x="0" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x1e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x1f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="0" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x2e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x2f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="0" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x3e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x3f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1000000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x10e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x10f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x11e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x11f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x12e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x12f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x13e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x13f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2000000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x20e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x20f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x21e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x21f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x22e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x22f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x23e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x23f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3000000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x30e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x30f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x31e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x31f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x32e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x32f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x33e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x33f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+    </clusterset>
+    <globalset>
+        <vseg name="seg_reset_code" vbase="0x0" mode="CX__" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="reset_code" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_ram_disk" vbase="0x2000000" mode="CX__" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="reset_code" type="BUFFER" length="0x2000000" />
+        </vseg>
+        <vseg name="seg_boot_mapping" vbase="0xf0000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_mapping" type="BLOB" length="0x10000" binpath="map.bin" />
+        </vseg>
+        <vseg name="seg_boot_code" vbase="0x10000" mode="CXW_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_code" type="BUFFER" length="0x20000" />
+        </vseg>
+        <vseg name="seg_boot_data" vbase="0x30000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_data" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_boot_buffer" vbase="0x40000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_buffer" type="BUFFER" length="0x60000" />
+        </vseg>
+        <vseg name="seg_boot_stack" vbase="0xa0000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_stack" type="BUFFER" length="0x50000" />
+        </vseg>
+        <vseg name="seg_kernel_code" vbase="0x80000000" mode="CXW_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_code" type="ELF" length="0x20000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_kernel_data" vbase="0x80020000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_data" type="ELF" length="0x60000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_kernel_uncdata" vbase="0x80080000" mode="__W_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_uncdata" type="ELF" length="0x40000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_kernel_init" vbase="0x800c0000" mode="CXW_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_init" type="ELF" length="0x10000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_bdv" vbase="0xf2000000" mode="__W_" x="0" y="0" psegname="PSEG_BDV" >
+            <vobj name="bdv" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_tty" vbase="0xf4000000" mode="__W_" x="0" y="0" psegname="PSEG_TTY" >
+            <vobj name="tty" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_xcu_0_0" vbase="0xf0000000" mode="__W_" x="0" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_0" vbase="0xe0000000" mode="__W_" x="0" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_0" vbase="0x800d0000" mode="__W_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_0_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_0_1" vbase="0xf0010000" mode="__W_" x="0" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_1" vbase="0xe0010000" mode="__W_" x="0" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_1" vbase="0x800e0000" mode="__W_" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_0_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_0_2" vbase="0xf0020000" mode="__W_" x="0" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_2" vbase="0xe0020000" mode="__W_" x="0" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_2" vbase="0x800f0000" mode="__W_" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_0_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_0_3" vbase="0xf0030000" mode="__W_" x="0" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_3" vbase="0xe0030000" mode="__W_" x="0" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_3" vbase="0x80100000" mode="__W_" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_0_3" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_0" vbase="0xf0100000" mode="__W_" x="1" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_0" vbase="0xe0100000" mode="__W_" x="1" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_0" vbase="0x801d0000" mode="__W_" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_1_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_1" vbase="0xf0110000" mode="__W_" x="1" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_1" vbase="0xe0110000" mode="__W_" x="1" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_1" vbase="0x801e0000" mode="__W_" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_1_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_2" vbase="0xf0120000" mode="__W_" x="1" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_2" vbase="0xe0120000" mode="__W_" x="1" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_2" vbase="0x801f0000" mode="__W_" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_1_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_3" vbase="0xf0130000" mode="__W_" x="1" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_3" vbase="0xe0130000" mode="__W_" x="1" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_3" vbase="0x80200000" mode="__W_" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_1_3" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_0" vbase="0xf0200000" mode="__W_" x="2" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_0" vbase="0xe0200000" mode="__W_" x="2" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_0" vbase="0x802d0000" mode="__W_" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_2_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_1" vbase="0xf0210000" mode="__W_" x="2" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_1" vbase="0xe0210000" mode="__W_" x="2" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_1" vbase="0x802e0000" mode="__W_" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_2_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_2" vbase="0xf0220000" mode="__W_" x="2" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_2" vbase="0xe0220000" mode="__W_" x="2" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_2" vbase="0x802f0000" mode="__W_" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_2_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_3" vbase="0xf0230000" mode="__W_" x="2" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_3" vbase="0xe0230000" mode="__W_" x="2" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_3" vbase="0x80300000" mode="__W_" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_2_3" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_0" vbase="0xf0300000" mode="__W_" x="3" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_0" vbase="0xe0300000" mode="__W_" x="3" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_0" vbase="0x803d0000" mode="__W_" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_3_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_1" vbase="0xf0310000" mode="__W_" x="3" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_1" vbase="0xe0310000" mode="__W_" x="3" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_1" vbase="0x803e0000" mode="__W_" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_3_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_2" vbase="0xf0320000" mode="__W_" x="3" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_2" vbase="0xe0320000" mode="__W_" x="3" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_2" vbase="0x803f0000" mode="__W_" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_3_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_3" vbase="0xf0330000" mode="__W_" x="3" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_3" vbase="0xe0330000" mode="__W_" x="3" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_3" vbase="0x80400000" mode="__W_" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_3_3" type="SCHED" length="0x4000" />
+        </vseg>
+    </globalset>
+    <vspaceset>
+        <vspace name="sort" startname="data" >
+        <vseg name="seg_code" vbase="0x10000000" mode="CXWU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="code" type="ELF" length="0x10000" binpath="build/sort/sort.elf" />
+        </vseg>
+        <vseg name="seg_data" vbase="0x20000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="data" type="ELF" length="0x10000" binpath="build/sort/sort.elf" />
+        </vseg>
+        <vseg name="seg_ptab" vbase="0x30000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="ptab" type="PTAB" length="0x40000" align="13" />
+        </vseg>
+        <vseg name="seg_args" vbase="0x60000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="args" type="CONST" length="0x4" init="16" />
+        </vseg>
+        <vseg name="seg_heap_0_0" vbase="0x50000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_0" vbase="0x40000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_1" vbase="0x40040000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_2" vbase="0x40080000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_3" vbase="0x400c0000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_0_1" vbase="0x50100000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_0" vbase="0x40100000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_1" vbase="0x40140000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_2" vbase="0x40180000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_3" vbase="0x401c0000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_0_2" vbase="0x50200000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_0" vbase="0x40200000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_1" vbase="0x40240000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_2" vbase="0x40280000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_3" vbase="0x402c0000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_0_3" vbase="0x50300000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_0" vbase="0x40300000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_1" vbase="0x40340000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_2" vbase="0x40380000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_3" vbase="0x403c0000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_0" vbase="0x51000000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_0" vbase="0x41000000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_1" vbase="0x41040000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_2" vbase="0x41080000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_3" vbase="0x410c0000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_1" vbase="0x51100000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_0" vbase="0x41100000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_1" vbase="0x41140000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_2" vbase="0x41180000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_3" vbase="0x411c0000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_2" vbase="0x51200000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_0" vbase="0x41200000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_1" vbase="0x41240000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_2" vbase="0x41280000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_3" vbase="0x412c0000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_3" vbase="0x51300000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_0" vbase="0x41300000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_1" vbase="0x41340000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_2" vbase="0x41380000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_3" vbase="0x413c0000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_0" vbase="0x52000000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_0" vbase="0x42000000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_1" vbase="0x42040000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_2" vbase="0x42080000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_3" vbase="0x420c0000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_1" vbase="0x52100000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_0" vbase="0x42100000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_1" vbase="0x42140000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_2" vbase="0x42180000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_3" vbase="0x421c0000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_2" vbase="0x52200000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_0" vbase="0x42200000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_1" vbase="0x42240000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_2" vbase="0x42280000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_3" vbase="0x422c0000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_3" vbase="0x52300000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_0" vbase="0x42300000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_1" vbase="0x42340000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_2" vbase="0x42380000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_3" vbase="0x423c0000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_0" vbase="0x53000000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_0" vbase="0x43000000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_1" vbase="0x43040000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_2" vbase="0x43080000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_3" vbase="0x430c0000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_1" vbase="0x53100000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_0" vbase="0x43100000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_1" vbase="0x43140000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_2" vbase="0x43180000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_3" vbase="0x431c0000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_2" vbase="0x53200000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_0" vbase="0x43200000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_1" vbase="0x43240000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_2" vbase="0x43280000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_3" vbase="0x432c0000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_3" vbase="0x53300000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_0" vbase="0x43300000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_1" vbase="0x43340000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_2" vbase="0x43380000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_3" vbase="0x433c0000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <task name="sort_0_0_0" trdid="0" x="0" y="0" p="0" stackname="stack_0_0_0" heapname="heap_0_0" startid="0" />
+        <task name="sort_0_0_1" trdid="1" x="0" y="0" p="1" stackname="stack_0_0_1" heapname="heap_0_0" startid="0" />
+        <task name="sort_0_0_2" trdid="2" x="0" y="0" p="2" stackname="stack_0_0_2" heapname="heap_0_0" startid="0" />
+        <task name="sort_0_0_3" trdid="3" x="0" y="0" p="3" stackname="stack_0_0_3" heapname="heap_0_0" startid="0" />
+        <task name="sort_0_1_0" trdid="4" x="0" y="1" p="0" stackname="stack_0_1_0" heapname="heap_0_1" startid="0" />
+        <task name="sort_0_1_1" trdid="5" x="0" y="1" p="1" stackname="stack_0_1_1" heapname="heap_0_1" startid="0" />
+        <task name="sort_0_1_2" trdid="6" x="0" y="1" p="2" stackname="stack_0_1_2" heapname="heap_0_1" startid="0" />
+        <task name="sort_0_1_3" trdid="7" x="0" y="1" p="3" stackname="stack_0_1_3" heapname="heap_0_1" startid="0" />
+        <task name="sort_0_2_0" trdid="8" x="0" y="2" p="0" stackname="stack_0_2_0" heapname="heap_0_2" startid="0" />
+        <task name="sort_0_2_1" trdid="9" x="0" y="2" p="1" stackname="stack_0_2_1" heapname="heap_0_2" startid="0" />
+        <task name="sort_0_2_2" trdid="10" x="0" y="2" p="2" stackname="stack_0_2_2" heapname="heap_0_2" startid="0" />
+        <task name="sort_0_2_3" trdid="11" x="0" y="2" p="3" stackname="stack_0_2_3" heapname="heap_0_2" startid="0" />
+        <task name="sort_0_3_0" trdid="12" x="0" y="3" p="0" stackname="stack_0_3_0" heapname="heap_0_3" startid="0" />
+        <task name="sort_0_3_1" trdid="13" x="0" y="3" p="1" stackname="stack_0_3_1" heapname="heap_0_3" startid="0" />
+        <task name="sort_0_3_2" trdid="14" x="0" y="3" p="2" stackname="stack_0_3_2" heapname="heap_0_3" startid="0" />
+        <task name="sort_0_3_3" trdid="15" x="0" y="3" p="3" stackname="stack_0_3_3" heapname="heap_0_3" startid="0" />
+        <task name="sort_1_0_0" trdid="16" x="1" y="0" p="0" stackname="stack_1_0_0" heapname="heap_1_0" startid="0" />
+        <task name="sort_1_0_1" trdid="17" x="1" y="0" p="1" stackname="stack_1_0_1" heapname="heap_1_0" startid="0" />
+        <task name="sort_1_0_2" trdid="18" x="1" y="0" p="2" stackname="stack_1_0_2" heapname="heap_1_0" startid="0" />
+        <task name="sort_1_0_3" trdid="19" x="1" y="0" p="3" stackname="stack_1_0_3" heapname="heap_1_0" startid="0" />
+        <task name="sort_1_1_0" trdid="20" x="1" y="1" p="0" stackname="stack_1_1_0" heapname="heap_1_1" startid="0" />
+        <task name="sort_1_1_1" trdid="21" x="1" y="1" p="1" stackname="stack_1_1_1" heapname="heap_1_1" startid="0" />
+        <task name="sort_1_1_2" trdid="22" x="1" y="1" p="2" stackname="stack_1_1_2" heapname="heap_1_1" startid="0" />
+        <task name="sort_1_1_3" trdid="23" x="1" y="1" p="3" stackname="stack_1_1_3" heapname="heap_1_1" startid="0" />
+        <task name="sort_1_2_0" trdid="24" x="1" y="2" p="0" stackname="stack_1_2_0" heapname="heap_1_2" startid="0" />
+        <task name="sort_1_2_1" trdid="25" x="1" y="2" p="1" stackname="stack_1_2_1" heapname="heap_1_2" startid="0" />
+        <task name="sort_1_2_2" trdid="26" x="1" y="2" p="2" stackname="stack_1_2_2" heapname="heap_1_2" startid="0" />
+        <task name="sort_1_2_3" trdid="27" x="1" y="2" p="3" stackname="stack_1_2_3" heapname="heap_1_2" startid="0" />
+        <task name="sort_1_3_0" trdid="28" x="1" y="3" p="0" stackname="stack_1_3_0" heapname="heap_1_3" startid="0" />
+        <task name="sort_1_3_1" trdid="29" x="1" y="3" p="1" stackname="stack_1_3_1" heapname="heap_1_3" startid="0" />
+        <task name="sort_1_3_2" trdid="30" x="1" y="3" p="2" stackname="stack_1_3_2" heapname="heap_1_3" startid="0" />
+        <task name="sort_1_3_3" trdid="31" x="1" y="3" p="3" stackname="stack_1_3_3" heapname="heap_1_3" startid="0" />
+        <task name="sort_2_0_0" trdid="32" x="2" y="0" p="0" stackname="stack_2_0_0" heapname="heap_2_0" startid="0" />
+        <task name="sort_2_0_1" trdid="33" x="2" y="0" p="1" stackname="stack_2_0_1" heapname="heap_2_0" startid="0" />
+        <task name="sort_2_0_2" trdid="34" x="2" y="0" p="2" stackname="stack_2_0_2" heapname="heap_2_0" startid="0" />
+        <task name="sort_2_0_3" trdid="35" x="2" y="0" p="3" stackname="stack_2_0_3" heapname="heap_2_0" startid="0" />
+        <task name="sort_2_1_0" trdid="36" x="2" y="1" p="0" stackname="stack_2_1_0" heapname="heap_2_1" startid="0" />
+        <task name="sort_2_1_1" trdid="37" x="2" y="1" p="1" stackname="stack_2_1_1" heapname="heap_2_1" startid="0" />
+        <task name="sort_2_1_2" trdid="38" x="2" y="1" p="2" stackname="stack_2_1_2" heapname="heap_2_1" startid="0" />
+        <task name="sort_2_1_3" trdid="39" x="2" y="1" p="3" stackname="stack_2_1_3" heapname="heap_2_1" startid="0" />
+        <task name="sort_2_2_0" trdid="40" x="2" y="2" p="0" stackname="stack_2_2_0" heapname="heap_2_2" startid="0" />
+        <task name="sort_2_2_1" trdid="41" x="2" y="2" p="1" stackname="stack_2_2_1" heapname="heap_2_2" startid="0" />
+        <task name="sort_2_2_2" trdid="42" x="2" y="2" p="2" stackname="stack_2_2_2" heapname="heap_2_2" startid="0" />
+        <task name="sort_2_2_3" trdid="43" x="2" y="2" p="3" stackname="stack_2_2_3" heapname="heap_2_2" startid="0" />
+        <task name="sort_2_3_0" trdid="44" x="2" y="3" p="0" stackname="stack_2_3_0" heapname="heap_2_3" startid="0" />
+        <task name="sort_2_3_1" trdid="45" x="2" y="3" p="1" stackname="stack_2_3_1" heapname="heap_2_3" startid="0" />
+        <task name="sort_2_3_2" trdid="46" x="2" y="3" p="2" stackname="stack_2_3_2" heapname="heap_2_3" startid="0" />
+        <task name="sort_2_3_3" trdid="47" x="2" y="3" p="3" stackname="stack_2_3_3" heapname="heap_2_3" startid="0" />
+        <task name="sort_3_0_0" trdid="48" x="3" y="0" p="0" stackname="stack_3_0_0" heapname="heap_3_0" startid="0" />
+        <task name="sort_3_0_1" trdid="49" x="3" y="0" p="1" stackname="stack_3_0_1" heapname="heap_3_0" startid="0" />
+        <task name="sort_3_0_2" trdid="50" x="3" y="0" p="2" stackname="stack_3_0_2" heapname="heap_3_0" startid="0" />
+        <task name="sort_3_0_3" trdid="51" x="3" y="0" p="3" stackname="stack_3_0_3" heapname="heap_3_0" startid="0" />
+        <task name="sort_3_1_0" trdid="52" x="3" y="1" p="0" stackname="stack_3_1_0" heapname="heap_3_1" startid="0" />
+        <task name="sort_3_1_1" trdid="53" x="3" y="1" p="1" stackname="stack_3_1_1" heapname="heap_3_1" startid="0" />
+        <task name="sort_3_1_2" trdid="54" x="3" y="1" p="2" stackname="stack_3_1_2" heapname="heap_3_1" startid="0" />
+        <task name="sort_3_1_3" trdid="55" x="3" y="1" p="3" stackname="stack_3_1_3" heapname="heap_3_1" startid="0" />
+        <task name="sort_3_2_0" trdid="56" x="3" y="2" p="0" stackname="stack_3_2_0" heapname="heap_3_2" startid="0" />
+        <task name="sort_3_2_1" trdid="57" x="3" y="2" p="1" stackname="stack_3_2_1" heapname="heap_3_2" startid="0" />
+        <task name="sort_3_2_2" trdid="58" x="3" y="2" p="2" stackname="stack_3_2_2" heapname="heap_3_2" startid="0" />
+        <task name="sort_3_2_3" trdid="59" x="3" y="2" p="3" stackname="stack_3_2_3" heapname="heap_3_2" startid="0" />
+        <task name="sort_3_3_0" trdid="60" x="3" y="3" p="0" stackname="stack_3_3_0" heapname="heap_3_3" startid="0" />
+        <task name="sort_3_3_1" trdid="61" x="3" y="3" p="1" stackname="stack_3_3_1" heapname="heap_3_3" startid="0" />
+        <task name="sort_3_3_2" trdid="62" x="3" y="3" p="2" stackname="stack_3_3_2" heapname="heap_3_3" startid="0" />
+        <task name="sort_3_3_3" trdid="63" x="3" y="3" p="3" stackname="stack_3_3_3" heapname="heap_3_3" startid="0" />
+        </vspace>
+    </vspaceset>
+</mapping_info>
Index: /soft/giet_vm/mappings/tsar_leti_4_4_4_transpose.xml
===================================================================
--- /soft/giet_vm/mappings/tsar_leti_4_4_4_transpose.xml	(revision 311)
+++ /soft/giet_vm/mappings/tsar_leti_4_4_4_transpose.xml	(revision 311)
@@ -0,0 +1,877 @@
+<?xml version="1.0"?>
+
+<mapping_info signature    = "0xDACE2014"
+              name         = "tsar_leti_4_4_4_transpose"
+              x_size       = "4"
+              y_size       = "4"
+              x_width      = "4"
+              y_width      = "4"
+              irq_per_proc = "4"
+              use_ram_disk = "1"
+              x_io         = "0"
+              y_io         = "0" >
+    <clusterset>
+        <cluster x="0" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x0" length="0x4000000" />
+            <pseg name="PSEG_BDV" type="PERI" base="0xf2000000" length="0x1000" />
+            <pseg name="PSEG_TTY" type="PERI" base="0xf4000000" length="0x1000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0xe0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0xf0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="IOC" subtype="BDV" psegname="PSEG_BDV" channels="1" >
+            </periph>
+            <periph type="TTY" subtype="NONE" psegname="PSEG_TTY" channels="1" >
+            </periph>
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+                <irq srctype="HWI" srcid="9" isr="ISR_BDV" channel="0" dstid="0" />
+                <irq srctype="HWI" srcid="10" isr="ISR_TTY_RX" channel="0" dstid="0" />
+            </periph>
+        </cluster>
+        <cluster x="0" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x1e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x1f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="0" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x2e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x2f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="0" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x3e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x3f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1000000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x10e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x10f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x11e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x11f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x12e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x12f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="1" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x1300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x13e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x13f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2000000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x20e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x20f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x21e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x21f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x22e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x22f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="2" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x2300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x23e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x23f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="0" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3000000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x30e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x30f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="1" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3100000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x31e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x31f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="2" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3200000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x32e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x32f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+        <cluster x="3" y="3" >
+            <pseg name="PSEG_RAM" type="RAM" base="0x3300000000" length="0x4000000" />
+            <pseg name="PSEG_MMC" type="PERI" base="0x33e0000000" length="0x1000" />
+            <pseg name="PSEG_XCU" type="PERI" base="0x33f0000000" length="0x1000" />
+            <proc index="0" />
+            <proc index="1" />
+            <proc index="2" />
+            <proc index="3" />
+            <periph type="MMC" subtype="NONE" psegname="PSEG_MMC" channels="1" >
+            </periph>
+            <periph type="XCU" subtype="NONE" psegname="PSEG_XCU" channels="16" >
+                <irq srctype="HWI" srcid="8" isr="ISR_MMC" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="0" isr="ISR_WAKUP" channel="0" dstid="0" />
+                <irq srctype="PTI" srcid="0" isr="ISR_TICK" channel="0" dstid="0" />
+                <irq srctype="WTI" srcid="1" isr="ISR_WAKUP" channel="0" dstid="1" />
+                <irq srctype="PTI" srcid="1" isr="ISR_TICK" channel="0" dstid="1" />
+                <irq srctype="WTI" srcid="2" isr="ISR_WAKUP" channel="0" dstid="2" />
+                <irq srctype="PTI" srcid="2" isr="ISR_TICK" channel="0" dstid="2" />
+                <irq srctype="WTI" srcid="3" isr="ISR_WAKUP" channel="0" dstid="3" />
+                <irq srctype="PTI" srcid="3" isr="ISR_TICK" channel="0" dstid="3" />
+            </periph>
+        </cluster>
+    </clusterset>
+    <globalset>
+        <vseg name="seg_reset_code" vbase="0x0" mode="CX__" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="reset_code" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_ram_disk" vbase="0x2000000" mode="CX__" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="reset_code" type="BUFFER" length="0x2000000" />
+        </vseg>
+        <vseg name="seg_boot_mapping" vbase="0xf0000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_mapping" type="BLOB" length="0x10000" binpath="map.bin" />
+        </vseg>
+        <vseg name="seg_boot_code" vbase="0x10000" mode="CXW_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_code" type="BUFFER" length="0x20000" />
+        </vseg>
+        <vseg name="seg_boot_data" vbase="0x30000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_data" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_boot_buffer" vbase="0x40000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_buffer" type="BUFFER" length="0x60000" />
+        </vseg>
+        <vseg name="seg_boot_stack" vbase="0xa0000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" ident="1" >
+            <vobj name="boot_stack" type="BUFFER" length="0x50000" />
+        </vseg>
+        <vseg name="seg_kernel_code" vbase="0x80000000" mode="CXW_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_code" type="ELF" length="0x20000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_kernel_data" vbase="0x80020000" mode="C_W_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_data" type="ELF" length="0x60000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_kernel_uncdata" vbase="0x80080000" mode="__W_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_uncdata" type="ELF" length="0x40000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_kernel_init" vbase="0x800c0000" mode="CXW_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="kernel_init" type="ELF" length="0x10000" binpath="build/kernel/kernel.elf" />
+        </vseg>
+        <vseg name="seg_bdv" vbase="0xf2000000" mode="__W_" x="0" y="0" psegname="PSEG_BDV" >
+            <vobj name="bdv" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_tty" vbase="0xf4000000" mode="__W_" x="0" y="0" psegname="PSEG_TTY" >
+            <vobj name="tty" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_xcu_0_0" vbase="0xf0000000" mode="__W_" x="0" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_0" vbase="0xe0000000" mode="__W_" x="0" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_0" vbase="0x800d0000" mode="__W_" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_0_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_0_1" vbase="0xf0010000" mode="__W_" x="0" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_1" vbase="0xe0010000" mode="__W_" x="0" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_1" vbase="0x800e0000" mode="__W_" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_0_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_0_2" vbase="0xf0020000" mode="__W_" x="0" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_2" vbase="0xe0020000" mode="__W_" x="0" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_2" vbase="0x800f0000" mode="__W_" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_0_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_0_3" vbase="0xf0030000" mode="__W_" x="0" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_0_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_0_3" vbase="0xe0030000" mode="__W_" x="0" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_0_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_0_3" vbase="0x80100000" mode="__W_" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_0_3" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_0" vbase="0xf0100000" mode="__W_" x="1" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_0" vbase="0xe0100000" mode="__W_" x="1" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_0" vbase="0x801d0000" mode="__W_" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_1_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_1" vbase="0xf0110000" mode="__W_" x="1" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_1" vbase="0xe0110000" mode="__W_" x="1" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_1" vbase="0x801e0000" mode="__W_" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_1_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_2" vbase="0xf0120000" mode="__W_" x="1" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_2" vbase="0xe0120000" mode="__W_" x="1" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_2" vbase="0x801f0000" mode="__W_" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_1_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_1_3" vbase="0xf0130000" mode="__W_" x="1" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_1_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_1_3" vbase="0xe0130000" mode="__W_" x="1" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_1_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_1_3" vbase="0x80200000" mode="__W_" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_1_3" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_0" vbase="0xf0200000" mode="__W_" x="2" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_0" vbase="0xe0200000" mode="__W_" x="2" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_0" vbase="0x802d0000" mode="__W_" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_2_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_1" vbase="0xf0210000" mode="__W_" x="2" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_1" vbase="0xe0210000" mode="__W_" x="2" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_1" vbase="0x802e0000" mode="__W_" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_2_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_2" vbase="0xf0220000" mode="__W_" x="2" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_2" vbase="0xe0220000" mode="__W_" x="2" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_2" vbase="0x802f0000" mode="__W_" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_2_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_2_3" vbase="0xf0230000" mode="__W_" x="2" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_2_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_2_3" vbase="0xe0230000" mode="__W_" x="2" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_2_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_2_3" vbase="0x80300000" mode="__W_" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_2_3" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_0" vbase="0xf0300000" mode="__W_" x="3" y="0" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_0" vbase="0xe0300000" mode="__W_" x="3" y="0" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_0" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_0" vbase="0x803d0000" mode="__W_" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="sch_3_0" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_1" vbase="0xf0310000" mode="__W_" x="3" y="1" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_1" vbase="0xe0310000" mode="__W_" x="3" y="1" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_1" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_1" vbase="0x803e0000" mode="__W_" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="sch_3_1" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_2" vbase="0xf0320000" mode="__W_" x="3" y="2" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_2" vbase="0xe0320000" mode="__W_" x="3" y="2" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_2" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_2" vbase="0x803f0000" mode="__W_" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="sch_3_2" type="SCHED" length="0x4000" />
+        </vseg>
+        <vseg name="seg_xcu_3_3" vbase="0xf0330000" mode="__W_" x="3" y="3" psegname="PSEG_XCU" >
+            <vobj name="xcu_3_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_mmc_3_3" vbase="0xe0330000" mode="__W_" x="3" y="3" psegname="PSEG_MMC" >
+            <vobj name="mmc_3_3" type="PERI" length="0x1000" />
+        </vseg>
+        <vseg name="seg_sch_3_3" vbase="0x80400000" mode="__W_" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="sch_3_3" type="SCHED" length="0x4000" />
+        </vseg>
+    </globalset>
+    <vspaceset>
+        <vspace name="transpose" startname="data" >
+        <vseg name="seg_code" vbase="0x10000000" mode="CXWU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="code" type="ELF" length="0x10000" binpath="build/transpose/transpose.elf" />
+        </vseg>
+        <vseg name="seg_data" vbase="0x20000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="data" type="ELF" length="0x10000" binpath="build/transpose/transpose.elf" />
+        </vseg>
+        <vseg name="seg_ptab" vbase="0x30000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="ptab" type="PTAB" length="0x40000" align="13" />
+        </vseg>
+        <vseg name="seg_heap_0_0" vbase="0x50000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_0" vbase="0x40000000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_1" vbase="0x40040000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_2" vbase="0x40080000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_0_3" vbase="0x400c0000" mode="C_WU" x="0" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_0_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_0_1" vbase="0x50100000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_0" vbase="0x40100000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_1" vbase="0x40140000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_2" vbase="0x40180000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_1_3" vbase="0x401c0000" mode="C_WU" x="0" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_0_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_0_2" vbase="0x50200000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_0" vbase="0x40200000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_1" vbase="0x40240000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_2" vbase="0x40280000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_2_3" vbase="0x402c0000" mode="C_WU" x="0" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_0_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_0_3" vbase="0x50300000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_0" vbase="0x40300000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_1" vbase="0x40340000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_2" vbase="0x40380000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_0_3_3" vbase="0x403c0000" mode="C_WU" x="0" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_0_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_0" vbase="0x51000000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_0" vbase="0x41000000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_1" vbase="0x41040000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_2" vbase="0x41080000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_0_3" vbase="0x410c0000" mode="C_WU" x="1" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_1_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_1" vbase="0x51100000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_0" vbase="0x41100000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_1" vbase="0x41140000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_2" vbase="0x41180000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_1_3" vbase="0x411c0000" mode="C_WU" x="1" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_1_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_2" vbase="0x51200000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_0" vbase="0x41200000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_1" vbase="0x41240000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_2" vbase="0x41280000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_2_3" vbase="0x412c0000" mode="C_WU" x="1" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_1_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_1_3" vbase="0x51300000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_0" vbase="0x41300000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_1" vbase="0x41340000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_2" vbase="0x41380000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_1_3_3" vbase="0x413c0000" mode="C_WU" x="1" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_1_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_0" vbase="0x52000000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_0" vbase="0x42000000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_1" vbase="0x42040000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_2" vbase="0x42080000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_0_3" vbase="0x420c0000" mode="C_WU" x="2" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_2_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_1" vbase="0x52100000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_0" vbase="0x42100000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_1" vbase="0x42140000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_2" vbase="0x42180000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_1_3" vbase="0x421c0000" mode="C_WU" x="2" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_2_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_2" vbase="0x52200000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_0" vbase="0x42200000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_1" vbase="0x42240000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_2" vbase="0x42280000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_2_3" vbase="0x422c0000" mode="C_WU" x="2" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_2_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_2_3" vbase="0x52300000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_0" vbase="0x42300000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_1" vbase="0x42340000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_2" vbase="0x42380000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_2_3_3" vbase="0x423c0000" mode="C_WU" x="2" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_2_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_0" vbase="0x53000000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="heap_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_0" vbase="0x43000000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_1" vbase="0x43040000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_2" vbase="0x43080000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_0_3" vbase="0x430c0000" mode="C_WU" x="3" y="0" psegname="PSEG_RAM" >
+            <vobj name="stack_3_0_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_1" vbase="0x53100000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="heap_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_0" vbase="0x43100000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_1" vbase="0x43140000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_2" vbase="0x43180000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_1_3" vbase="0x431c0000" mode="C_WU" x="3" y="1" psegname="PSEG_RAM" >
+            <vobj name="stack_3_1_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_2" vbase="0x53200000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="heap_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_0" vbase="0x43200000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_1" vbase="0x43240000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_2" vbase="0x43280000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_2_3" vbase="0x432c0000" mode="C_WU" x="3" y="2" psegname="PSEG_RAM" >
+            <vobj name="stack_3_2_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_heap_3_3" vbase="0x53300000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="heap_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_0" vbase="0x43300000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_0" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_1" vbase="0x43340000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_1" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_2" vbase="0x43380000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_2" type="BUFFER" length="0x10000" />
+        </vseg>
+        <vseg name="seg_stack_3_3_3" vbase="0x433c0000" mode="C_WU" x="3" y="3" psegname="PSEG_RAM" >
+            <vobj name="stack_3_3_3" type="BUFFER" length="0x10000" />
+        </vseg>
+        <task name="trsp_0_0_0" trdid="0" x="0" y="0" p="0" stackname="stack_0_0_0" heapname="heap_0_0" startid="0" />
+        <task name="trsp_0_0_1" trdid="1" x="0" y="0" p="1" stackname="stack_0_0_1" heapname="heap_0_0" startid="0" />
+        <task name="trsp_0_0_2" trdid="2" x="0" y="0" p="2" stackname="stack_0_0_2" heapname="heap_0_0" startid="0" />
+        <task name="trsp_0_0_3" trdid="3" x="0" y="0" p="3" stackname="stack_0_0_3" heapname="heap_0_0" startid="0" />
+        <task name="trsp_0_1_0" trdid="4" x="0" y="1" p="0" stackname="stack_0_1_0" heapname="heap_0_1" startid="0" />
+        <task name="trsp_0_1_1" trdid="5" x="0" y="1" p="1" stackname="stack_0_1_1" heapname="heap_0_1" startid="0" />
+        <task name="trsp_0_1_2" trdid="6" x="0" y="1" p="2" stackname="stack_0_1_2" heapname="heap_0_1" startid="0" />
+        <task name="trsp_0_1_3" trdid="7" x="0" y="1" p="3" stackname="stack_0_1_3" heapname="heap_0_1" startid="0" />
+        <task name="trsp_0_2_0" trdid="8" x="0" y="2" p="0" stackname="stack_0_2_0" heapname="heap_0_2" startid="0" />
+        <task name="trsp_0_2_1" trdid="9" x="0" y="2" p="1" stackname="stack_0_2_1" heapname="heap_0_2" startid="0" />
+        <task name="trsp_0_2_2" trdid="10" x="0" y="2" p="2" stackname="stack_0_2_2" heapname="heap_0_2" startid="0" />
+        <task name="trsp_0_2_3" trdid="11" x="0" y="2" p="3" stackname="stack_0_2_3" heapname="heap_0_2" startid="0" />
+        <task name="trsp_0_3_0" trdid="12" x="0" y="3" p="0" stackname="stack_0_3_0" heapname="heap_0_3" startid="0" />
+        <task name="trsp_0_3_1" trdid="13" x="0" y="3" p="1" stackname="stack_0_3_1" heapname="heap_0_3" startid="0" />
+        <task name="trsp_0_3_2" trdid="14" x="0" y="3" p="2" stackname="stack_0_3_2" heapname="heap_0_3" startid="0" />
+        <task name="trsp_0_3_3" trdid="15" x="0" y="3" p="3" stackname="stack_0_3_3" heapname="heap_0_3" startid="0" />
+        <task name="trsp_1_0_0" trdid="16" x="1" y="0" p="0" stackname="stack_1_0_0" heapname="heap_1_0" startid="0" />
+        <task name="trsp_1_0_1" trdid="17" x="1" y="0" p="1" stackname="stack_1_0_1" heapname="heap_1_0" startid="0" />
+        <task name="trsp_1_0_2" trdid="18" x="1" y="0" p="2" stackname="stack_1_0_2" heapname="heap_1_0" startid="0" />
+        <task name="trsp_1_0_3" trdid="19" x="1" y="0" p="3" stackname="stack_1_0_3" heapname="heap_1_0" startid="0" />
+        <task name="trsp_1_1_0" trdid="20" x="1" y="1" p="0" stackname="stack_1_1_0" heapname="heap_1_1" startid="0" />
+        <task name="trsp_1_1_1" trdid="21" x="1" y="1" p="1" stackname="stack_1_1_1" heapname="heap_1_1" startid="0" />
+        <task name="trsp_1_1_2" trdid="22" x="1" y="1" p="2" stackname="stack_1_1_2" heapname="heap_1_1" startid="0" />
+        <task name="trsp_1_1_3" trdid="23" x="1" y="1" p="3" stackname="stack_1_1_3" heapname="heap_1_1" startid="0" />
+        <task name="trsp_1_2_0" trdid="24" x="1" y="2" p="0" stackname="stack_1_2_0" heapname="heap_1_2" startid="0" />
+        <task name="trsp_1_2_1" trdid="25" x="1" y="2" p="1" stackname="stack_1_2_1" heapname="heap_1_2" startid="0" />
+        <task name="trsp_1_2_2" trdid="26" x="1" y="2" p="2" stackname="stack_1_2_2" heapname="heap_1_2" startid="0" />
+        <task name="trsp_1_2_3" trdid="27" x="1" y="2" p="3" stackname="stack_1_2_3" heapname="heap_1_2" startid="0" />
+        <task name="trsp_1_3_0" trdid="28" x="1" y="3" p="0" stackname="stack_1_3_0" heapname="heap_1_3" startid="0" />
+        <task name="trsp_1_3_1" trdid="29" x="1" y="3" p="1" stackname="stack_1_3_1" heapname="heap_1_3" startid="0" />
+        <task name="trsp_1_3_2" trdid="30" x="1" y="3" p="2" stackname="stack_1_3_2" heapname="heap_1_3" startid="0" />
+        <task name="trsp_1_3_3" trdid="31" x="1" y="3" p="3" stackname="stack_1_3_3" heapname="heap_1_3" startid="0" />
+        <task name="trsp_2_0_0" trdid="32" x="2" y="0" p="0" stackname="stack_2_0_0" heapname="heap_2_0" startid="0" />
+        <task name="trsp_2_0_1" trdid="33" x="2" y="0" p="1" stackname="stack_2_0_1" heapname="heap_2_0" startid="0" />
+        <task name="trsp_2_0_2" trdid="34" x="2" y="0" p="2" stackname="stack_2_0_2" heapname="heap_2_0" startid="0" />
+        <task name="trsp_2_0_3" trdid="35" x="2" y="0" p="3" stackname="stack_2_0_3" heapname="heap_2_0" startid="0" />
+        <task name="trsp_2_1_0" trdid="36" x="2" y="1" p="0" stackname="stack_2_1_0" heapname="heap_2_1" startid="0" />
+        <task name="trsp_2_1_1" trdid="37" x="2" y="1" p="1" stackname="stack_2_1_1" heapname="heap_2_1" startid="0" />
+        <task name="trsp_2_1_2" trdid="38" x="2" y="1" p="2" stackname="stack_2_1_2" heapname="heap_2_1" startid="0" />
+        <task name="trsp_2_1_3" trdid="39" x="2" y="1" p="3" stackname="stack_2_1_3" heapname="heap_2_1" startid="0" />
+        <task name="trsp_2_2_0" trdid="40" x="2" y="2" p="0" stackname="stack_2_2_0" heapname="heap_2_2" startid="0" />
+        <task name="trsp_2_2_1" trdid="41" x="2" y="2" p="1" stackname="stack_2_2_1" heapname="heap_2_2" startid="0" />
+        <task name="trsp_2_2_2" trdid="42" x="2" y="2" p="2" stackname="stack_2_2_2" heapname="heap_2_2" startid="0" />
+        <task name="trsp_2_2_3" trdid="43" x="2" y="2" p="3" stackname="stack_2_2_3" heapname="heap_2_2" startid="0" />
+        <task name="trsp_2_3_0" trdid="44" x="2" y="3" p="0" stackname="stack_2_3_0" heapname="heap_2_3" startid="0" />
+        <task name="trsp_2_3_1" trdid="45" x="2" y="3" p="1" stackname="stack_2_3_1" heapname="heap_2_3" startid="0" />
+        <task name="trsp_2_3_2" trdid="46" x="2" y="3" p="2" stackname="stack_2_3_2" heapname="heap_2_3" startid="0" />
+        <task name="trsp_2_3_3" trdid="47" x="2" y="3" p="3" stackname="stack_2_3_3" heapname="heap_2_3" startid="0" />
+        <task name="trsp_3_0_0" trdid="48" x="3" y="0" p="0" stackname="stack_3_0_0" heapname="heap_3_0" startid="0" />
+        <task name="trsp_3_0_1" trdid="49" x="3" y="0" p="1" stackname="stack_3_0_1" heapname="heap_3_0" startid="0" />
+        <task name="trsp_3_0_2" trdid="50" x="3" y="0" p="2" stackname="stack_3_0_2" heapname="heap_3_0" startid="0" />
+        <task name="trsp_3_0_3" trdid="51" x="3" y="0" p="3" stackname="stack_3_0_3" heapname="heap_3_0" startid="0" />
+        <task name="trsp_3_1_0" trdid="52" x="3" y="1" p="0" stackname="stack_3_1_0" heapname="heap_3_1" startid="0" />
+        <task name="trsp_3_1_1" trdid="53" x="3" y="1" p="1" stackname="stack_3_1_1" heapname="heap_3_1" startid="0" />
+        <task name="trsp_3_1_2" trdid="54" x="3" y="1" p="2" stackname="stack_3_1_2" heapname="heap_3_1" startid="0" />
+        <task name="trsp_3_1_3" trdid="55" x="3" y="1" p="3" stackname="stack_3_1_3" heapname="heap_3_1" startid="0" />
+        <task name="trsp_3_2_0" trdid="56" x="3" y="2" p="0" stackname="stack_3_2_0" heapname="heap_3_2" startid="0" />
+        <task name="trsp_3_2_1" trdid="57" x="3" y="2" p="1" stackname="stack_3_2_1" heapname="heap_3_2" startid="0" />
+        <task name="trsp_3_2_2" trdid="58" x="3" y="2" p="2" stackname="stack_3_2_2" heapname="heap_3_2" startid="0" />
+        <task name="trsp_3_2_3" trdid="59" x="3" y="2" p="3" stackname="stack_3_2_3" heapname="heap_3_2" startid="0" />
+        <task name="trsp_3_3_0" trdid="60" x="3" y="3" p="0" stackname="stack_3_3_0" heapname="heap_3_3" startid="0" />
+        <task name="trsp_3_3_1" trdid="61" x="3" y="3" p="1" stackname="stack_3_3_1" heapname="heap_3_3" startid="0" />
+        <task name="trsp_3_3_2" trdid="62" x="3" y="3" p="2" stackname="stack_3_3_2" heapname="heap_3_3" startid="0" />
+        <task name="trsp_3_3_3" trdid="63" x="3" y="3" p="3" stackname="stack_3_3_3" heapname="heap_3_3" startid="0" />
+        </vspace>
+    </vspaceset>
+</mapping_info>
