Changeset 433
- Timestamp:
- Oct 12, 2014, 6:53:47 PM (10 years ago)
- Location:
- soft/giet_vm
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/giet_boot/boot.c
r427 r433 568 568 { 569 569 // allocate contiguous big physical pages 570 ppn = _get_big_ppn( palloc, npages ); 570 ppn = _get_big_ppn( palloc, npages ); 571 571 } 572 572 else // BPP already allocated 573 573 { 574 // test if new vseg has the same mode bits than 575 // the other vsegs in the same big page 576 unsigned int pte1_mode = 0; 577 if (pte1 & PTE_C) pte1_mode |= C_MODE_MASK; 578 if (pte1 & PTE_X) pte1_mode |= X_MODE_MASK; 579 if (pte1 & PTE_W) pte1_mode |= W_MODE_MASK; 580 if (pte1 & PTE_U) pte1_mode |= U_MODE_MASK; 581 if (vseg->mode != pte1_mode) { 582 _puts("\n[BOOT ERROR] in boot_vseg_map() : vseg "); 583 _puts( vseg->name ); 584 _puts(" has different flags ("); 585 _putx( vseg->mode ); 586 _puts(") than other vsegs sharing the same big page ("); 587 _putx( pte1_mode ); 588 _puts(")"); 589 _exit(); 590 } 591 574 592 ppn = ((pte1 << 9) & 0x0FFFFE00); 575 593 } … … 613 631 // compute max_pt2 614 632 _ptabs_max_pt2 = ((nsp<<12) - PT1_SIZE) / PT2_SIZE; 615 633 616 634 for ( vs = 0 ; vs < nspaces ; vs++ ) 617 635 { 618 _ptabs_vaddr [vs][x_dest][y_dest] = (vpn + offset) << 12; 636 _ptabs_vaddr [vs][x_dest][y_dest] = (vpn + offset) << 12; 619 637 _ptabs_paddr [vs][x_dest][y_dest] = ((paddr_t)(ppn + offset)) << 12; 620 638 _ptabs_next_pt2[vs][x_dest][y_dest] = 0; 621 639 offset += nsp; 622 /* 640 623 641 // reset all entries in PT1 (8 Kbytes) 624 642 _physical_memset( _ptabs_paddr[vs][x_dest][y_dest], PT1_SIZE, 0 ); 625 626 */627 643 } 628 644 } … … 630 646 #if BOOT_DEBUG_PT 631 647 _puts("[BOOT DEBUG] "); 632 _puts( vseg->name ); 648 _puts( vseg->name ); 633 649 _puts(" in cluster["); 634 650 _putd( x_dest ); -
soft/giet_vm/giet_common/utils.c
r430 r433 348 348 { 349 349 // check alignment constraints 350 if ( (paddr & 3) || (size & 3) )350 if ( (paddr & 3) || (size & 7) ) 351 351 { 352 352 _printf("\n[GIET ERROR] in _physical_memset() : buffer unaligned\n"); … … 360 360 _it_disable(&sr); 361 361 362 asm volatile( "move $4, %0 \n" /* $4 < lsb */ 363 "move $5, %1 \n" /* $5 < msb */ 364 "move $6, %2 \n" /* $6 < size */ 365 "move $7, %3 \n" /* $7 < data */ 366 367 "mfc2 $2, $1 \n" /* $2 <= current MMU_MODE */ 368 "andi $3, $2, 0xb \n" /* $3 <= new MMU_MODE */ 369 "mtc2 $3, $1 \n" /* DTLB off */ 370 "mtc2 $5, $24 \n" /* PADDR_EXT <= msb */ 371 372 "ph_memset_loop: \n" 373 "sw $7, 0($4) \n" /* data <= *src_paddr */ 374 "addi $4, $4, 4 \n" /* iter = iter - 1 */ 375 "bne $4, $6, ph_memcpy_loop \n" 376 "nop \n" 377 378 "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ 379 "mtc2 $2, $1 \n" /* restore MMU_MODE */ 380 : "=r" (data) 381 : "r" (lsb), "r" (msb), "r" (size), "r"(data) 382 : "$2", "$3", "$4", "$5", "$6", "$7" ); 362 asm volatile( "mfc2 $8, $1 \n" /* $8 <= current MMU_MODE */ 363 "andi $9, $8, 0xb \n" /* $9 <= new MMU_MODE */ 364 "mtc2 $9, $1 \n" /* DTLB off */ 365 "mtc2 %3, $24 \n" /* PADDR_EXT <= msb */ 366 367 "1: \n" /* set 8 bytes per iter */ 368 "sw %2, 0(%0) \n" /* *src_paddr = data */ 369 "sw %2, 4(%0) \n" /* *(src_paddr+4) = data */ 370 "addi %1, %1, -8 \n" /* size -= 8 */ 371 "addi %0, %0, 8 \n" /* src_paddr += 8 */ 372 "bnez %1, 1b \n" /* loop while size != 0 */ 373 374 "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ 375 "mtc2 $8, $1 \n" /* restore MMU_MODE */ 376 : "+r"(lsb), "+r"(size) 377 : "r"(data), "r" (msb) 378 : "$8", "$9", "memory" ); 383 379 384 380 _it_restore(&sr); 385 } // _p ysical_memset()381 } // _physical_memset() 386 382 387 383 ///////////////////////////////////////////////////////////////////////////////////
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