- Timestamp:
- Dec 5, 2014, 3:41:22 PM (10 years ago)
- Location:
- soft/giet_vm/applications
- Files:
-
- 5 added
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/applications/convol/convol.py
r432 r457 65 65 for p in xrange( nprocs ): 66 66 proc_id = (((x * y_size) + y) * nprocs) + p 67 size = stack_size / nprocs67 size = (stack_size / nprocs) & 0xFFFFF000 68 68 base = stack_base + (proc_id * size) 69 69 mapping.addVseg( vspace, 'conv_stack_%d_%d_%d' % (x,y,p), base, size, -
soft/giet_vm/applications/router/main.c
r451 r457 38 38 #define DEPTH 20 // MWMR channels depth 39 39 40 //////////////// MWMR channels /////////////////////////////////////////////40 //////////////// MWMR channels and associated buffers ///////////////////// 41 41 42 42 __attribute__((section (".data_in"))) mwmr_channel_t fifo_in; 43 __attribute__((section (".data_in"))) unsigned int buf_in[DEPTH]; 44 43 45 __attribute__((section (".data_out"))) mwmr_channel_t fifo_out; 46 __attribute__((section (".data_out"))) unsigned int buf_out[DEPTH]; 44 47 45 48 //////////////// Instrumentation Counters ////////////////////////////////// … … 67 70 68 71 // initializes fifo_in 69 mwmr_init( &fifo_in, 1 , DEPTH );72 mwmr_init( &fifo_in, buf_in, 1 , DEPTH ); 70 73 71 74 // main loop : display token value = source index … … 96 99 97 100 // initializes fifo_out 98 mwmr_init( &fifo_out, 1 , DEPTH );101 mwmr_init( &fifo_out, buf_out, 1 , DEPTH ); 99 102 100 103 // main loop : register token arrival index and value -
soft/giet_vm/applications/router/router.py
r451 r457 4 4 5 5 ###################################################################################### 6 # file : router.py (for the router application)6 # file : router.py 7 7 # date : november 2014 8 8 # author : Alain Greiner … … 68 68 mapping.addVseg( vspace, 'router_code_%d_%d' %(x,y), code_base , code_size, 69 69 'CXWU', vtype = 'ELF', x = x, y = y, pseg = 'RAM', 70 binpath = 'build/ transpose/transpose.elf',70 binpath = 'build/router/router.elf', 71 71 local = True ) 72 72 … … 108 108 if __name__ == '__main__': 109 109 110 vspace = transpose( Mapping( 'test', 2, 2, 4 ) )110 vspace = router( Mapping( 'test', 2, 2, 4 ) ) 111 111 print vspace.xml() 112 112 -
soft/giet_vm/applications/transpose/transpose.py
r444 r457 64 64 for p in xrange( nprocs ): 65 65 proc_id = (((x * y_size) + y) * nprocs) + p 66 size = stack_size / nprocs66 size = (stack_size / nprocs) & 0xFFFFF000 67 67 base = stack_base + (proc_id * size) 68 68 mapping.addVseg( vspace, 'trsp_stack_%d_%d_%d' % (x,y,p), base, size,
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