Changeset 488 for soft/giet_vm/applications/classif
- Timestamp:
- Jan 8, 2015, 11:55:26 AM (10 years ago)
- Location:
- soft/giet_vm/applications/classif
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
soft/giet_vm/applications/classif/Makefile
r457 r488 1 APP_NAME= router1 APP_NAME=classif 2 2 3 3 USE+= stdio.o -
soft/giet_vm/applications/classif/classif.py
r473 r488 12 12 # The mapping of tasks on processors is the following: 13 13 # - one "load" task per cluster, 14 # - (nprocs-1) "analyse" task per cluster. 14 # - one "store" task per cluster, 15 # - (nprocs-2) "analyse" task per cluster. 15 16 # The mapping of virtual segments on the clusters is the following: 16 17 # - The code vsegs are replicated on all clusters. … … 25 26 # - nprocs : number of processors per cluster 26 27 # 27 # WARNING: The target architecture cannot contain more than (4*4) clusters28 # and must contain at least 2processors per cluster.28 # WARNING: The target architecture cannot contain less 29 # than 3 processors per cluster. 29 30 #################################################################################### 30 31 … … 38 39 y_width = mapping.y_width 39 40 40 assert (nprocs >= 2)41 assert (nprocs >= 3) 41 42 42 43 # define vsegs base & size … … 100 101 task_index = 0 101 102 task_name = 'load_%d_%d_%d' %(x,y,p) 103 elif ( p== 1 ): # task store 104 task_index = 1 105 task_name = 'store_%d_%d_%d' %(x,y,p) 102 106 else : # task analyse 103 task_index = 1107 task_index = 2 104 108 task_name = 'analyse_%d_%d_%d' % (x,y,p) 105 109 -
soft/giet_vm/applications/classif/main.c
r480 r488 1 ///////////////////////////////////////////////////////////////////////////////////////// ////1 ///////////////////////////////////////////////////////////////////////////////////////// 2 2 // File : main.c (for classif application) 3 3 // Date : november 2014 4 4 // author : Alain Greiner 5 ///////////////////////////////////////////////////////////////////////////////////////// ////5 ///////////////////////////////////////////////////////////////////////////////////////// 6 6 // This multi-threaded application takes a stream of Gigabit Ethernet packets, 7 7 // and makes packet analysis and classification, based on the source MAC address. 8 // It uses the NIC peripheral, and the distributed kernel chbuf filled by the CMA9 // component to consumepackets on the Gigabit Ethernet port.8 // It uses the NIC peripheral, and the distributed kernel chbufs accessed by the CMA 9 // component to receive and send packets on the Gigabit Ethernet port. 10 10 // 11 11 // This application is described as a TCG (Task and Communication Graph) containing 12 // - one "load" task per cluster. 13 // - from one to three "analyse" tasks per cluster. 14 // In each cluster, the "load" task communicates with the local "analyse" tasks through 12 // (N+2) tasks per cluster: 13 // - one "load" task 14 // - N "analyse" tasks 15 // - one "store" task 16 // The 4 Kbytes containers are diributed (N+2 containers per cluster): 17 // - one RX container (part of the kernel rx_chbuf), in the kernel heap. 18 // - one TX container (part of the kernel tx-chbuf), in the kernel heap. 19 // - N working containers (one per analysis task), in the user heap. 20 // In each cluster, the "load", analysis" and "store" tasks communicates through 21 // three local MWMR fifos: 22 // - fifo_l2a : tranfer a full container from "load" to "analyse" task. 23 // - fifo_a2s : transfer a full container from "analyse" to "store" task. 24 // - fifo_s2l : transfer an empty container from "store" to "load" task. 25 // For each fifo, one item is a 32 bits word defining the index of an 26 // available working container. 27 // The pointers on the working containers, and the pointers on the MWMR fifos 28 // are global arrays stored in cluster[0][0]. 15 29 // a local MWMR fifo containing NB_PROCS_MAX containers (one item = one container). 16 30 // The MWMR fifo descriptors array is defined as a global variable in cluster[0][0]. … … 20 34 // the barrier between all "load" tasks. Other "load" tasks are waiting on the 21 35 // global_sync synchronisation variable. 22 // - In each cluster[x][y], the "load" task allocates the MWMR fifo descriptor and23 // the data buffer in the local heap, and initializes the MWMR descriptor.36 // - In each cluster[x][y], the "load" task allocates the working containers 37 // and the MWMR fifos descriptors in the local heap. 24 38 // The "analyse" tasks are waiting on the sync[x][y] variables. 39 // 40 // Instrumentation results display is done by the "store" task in cluster[0][0] 41 // when all "store" tasks completed the number of clusters specified by the 42 // CONTAINERS_MAX parameter. 25 43 // 26 // When initialisation is completed, all "load and "analyse" tasks loop on containers: 27 // 1) The "load" task transfer containers from the kernel chbuf associated to the 28 // NIC_RX channel (in cluster[0][0]), to the local MWMR fifo (in cluster[x][y]), 29 // after an in termediate copy in a private stack buffer. 30 // Each "load" task loads CONTAINERS_MAX containers before exit, and the 31 // task in cluster[0,0] displays the results stored in global counters filled 32 // by the "analyse" tasks when all "load" tasks reach the barrier. 44 // When initialisation is completed, all tasks loop on containers: 45 // 1) The "load" task get an empty working container from the fifo_s2l, 46 // transfer one container from the kernel rx_chbuf to this user container, 47 // and transfer ownership of this container to one "analysis" task by writing 48 // into the fifo_l2a. 33 49 // 34 // 2) The "analyse" task transfer one container from the local MWMR fifo to a private 35 // local buffer. It analyse each packet contained in the container, compute the 36 // packet type, depending on the source MAC address, and increment the counters. 50 // 2) The "analyse" task get one working container from the fifo_l2a, analyse 51 // each packet header, compute the packet type (depending on the SRC MAC address), 52 // increment the correspondint classification counter, and transpose the SRC 53 // and the DST MAC addresses fot TX tranmission. 37 54 // 38 // It uses the he following hardware parameters, defined in the hard_config.h file: 55 // 3) The "store" task transfer get a full working container from the fifo_a2s, 56 // transfer this user container content to the the kernel tx_chbuf, 57 // and transfer ownership of this empty container to the "load" task by writing 58 // into the fifo_s2l. 59 // 60 // This application uses the following hardware parameters (hard_config.h file): 39 61 // - X_SIZE : number of clusters in a row 40 62 // - Y_SIZE : number of clusters in a column 41 63 // - NB_PROCS_MAX : number of processors per cluster 42 ///////////////////////////////////////////////////////////////////////////////////////// ////64 ///////////////////////////////////////////////////////////////////////////////////////// 43 65 44 66 #include "stdio.h" … … 49 71 #include "hard_config.h" 50 72 51 #define CONTAINERS_MAX 10 52 53 /////////////////////////////////////////////////////////////////////////////////////////// 73 #define CONTAINERS_MAX 5 74 #define VERBOSE_ANALYSE 1 75 #define ANALYSIS_TASKS (NB_PROCS_MAX - 2) 76 77 ///////////////////////////////////////////////////////////////////////////////////////// 54 78 // Global variables 55 // The MWMR channels (descriptors and buffers) are distributed in the clusters, 56 // but the pointers array is stored in cluster[0][0] 57 /////////////////////////////////////////////////////////////////////////////////////////// 58 59 mwmr_channel_t* mwmr[X_SIZE][Y_SIZE]; // distributed MWMR fifos pointers 60 61 unsigned int local_sync[X_SIZE][Y_SIZE]; // distributed synchros "load" / "analyse" 62 63 unsigned int global_sync = 0; // global synchro between "load" tasks 64 65 unsigned int count[16]; // instrumentation counters 66 67 giet_barrier_t barrier; // barrier between "load" (instrumentation) 68 69 unsigned int nic_channel; // allocated NIC channel index 79 // The MWMR channels (descriptors and buffers), as well as the working containers 80 // used by the "analysis" tasks are distributed in clusters. 81 // But the pointers on these distributed structures are shared arrays 82 // stored in cluster[0][0]. 83 ///////////////////////////////////////////////////////////////////////////////////////// 84 85 // pointers on distributed temp[x][y][n] containers 86 unsigned int* container[X_SIZE][Y_SIZE][ANALYSIS_TASKS]; 87 88 // pointers on distributed mwmr fifos containing : temp[x][y][l] container descriptors 89 mwmr_channel_t* mwmr_l2a[X_SIZE][Y_SIZE]; 90 mwmr_channel_t* mwmr_a2s[X_SIZE][Y_SIZE]; 91 mwmr_channel_t* mwmr_s2l[X_SIZE][Y_SIZE]; 92 93 // local synchros signaling local MWMR fifos initialisation completion 94 unsigned int local_sync[X_SIZE][Y_SIZE]; 95 96 // global synchro signaling global initialisation completion 97 unsigned int load_sync = 0; 98 unsigned int store_sync = 0; 99 100 // instrumentation counters 101 unsigned int counter[16]; 102 103 // distributed barriers (between "load" and "store" tasks) 104 giet_sbt_barrier_t rx_barrier; 105 giet_sbt_barrier_t tx_barrier; 106 107 // NIC_RX and NIC_TX channel index 108 unsigned int nic_rx_channel; 109 unsigned int nic_tx_channel; 70 110 71 111 ///////////////////////////////////////// 72 112 __attribute__ ((constructor)) void load() 73 113 ///////////////////////////////////////// 114 { 115 // each "load" task get processor identifiers 116 unsigned int x; 117 unsigned int y; 118 unsigned int l; 119 giet_proc_xyp( &x, &y, &l ); 120 121 // "load" task[0][0] initialises barrier between load tasks, 122 // allocates the NIC & CMA RX channels, and start the NIC_CMA RX transfer. 123 // Other "load" tasks wait completion 124 if ( (x==0) && (y==0) ) 125 { 126 giet_shr_printf("\n*** Task load on P[%d][%d][%d] starts at cycle %d\n", 127 x , y , l , giet_proctime() ); 128 129 sbt_barrier_init( &rx_barrier, X_SIZE*Y_SIZE , 1 ); 130 nic_rx_channel = giet_nic_rx_alloc(); 131 giet_nic_rx_start( nic_rx_channel ); 132 load_sync = 1; 133 } 134 else 135 { 136 while ( load_sync == 0 ) asm volatile ("nop"); 137 } 138 139 // all load tasks allocate containers[x][y][n] (from local heap) 140 // and register pointers in the local stack 141 unsigned int n; 142 unsigned int* cont[ANALYSIS_TASKS]; 143 144 for ( n = 0 ; n < ANALYSIS_TASKS ; n++ ) 145 { 146 container[x][y][n] = malloc( 4096 ); 147 cont[n] = container[x][y][n]; 148 } 149 150 // all load tasks allocate data buffers for mwmr fifos (from local heap) 151 unsigned int* data_l2a = malloc( ANALYSIS_TASKS<<2 ); 152 unsigned int* data_a2s = malloc( ANALYSIS_TASKS<<2 ); 153 unsigned int* data_s2l = malloc( ANALYSIS_TASKS<<2 ); 154 155 // all load tasks allocate mwmr fifos descriptors (from local heap) 156 mwmr_l2a[x][y] = malloc( sizeof(mwmr_channel_t) ); 157 mwmr_a2s[x][y] = malloc( sizeof(mwmr_channel_t) ); 158 mwmr_s2l[x][y] = malloc( sizeof(mwmr_channel_t) ); 159 160 // all "load" tasks register local pointers on mwmr fifos in local stack 161 mwmr_channel_t* fifo_l2a = mwmr_l2a[x][y]; 162 mwmr_channel_t* fifo_a2s = mwmr_a2s[x][y]; 163 mwmr_channel_t* fifo_s2l = mwmr_s2l[x][y]; 164 165 // all "load" tasks initialise local mwmr fifos descriptors 166 // ( width = 4 bytes / depth = number of analysis tasks ) 167 mwmr_init( fifo_l2a , data_l2a , 1 , ANALYSIS_TASKS ); 168 mwmr_init( fifo_a2s , data_a2s , 1 , ANALYSIS_TASKS ); 169 mwmr_init( fifo_s2l , data_s2l , 1 , ANALYSIS_TASKS ); 170 171 172 // all "load" tasks initialise local containers as empty in fifo_s2l 173 for ( n = 0 ; n < ANALYSIS_TASKS ; n++ ) mwmr_write( fifo_s2l , &n , 1 ); 174 175 // each "load" task[x][y] signals mwmr fifos initialisation completion 176 // to other tasks in same cluster[x][y] 177 local_sync[x][y] = 1; 178 179 // "load" task[0][0] displays status 180 if ( (x==0) && (y==0) ) 181 giet_shr_printf("\n*** Task load on P[%d,%d,%d] enters main loop at cycle %d\n" 182 " nic_rx_channel = %d / nic_tx_channel = %d\n" 183 " &mwmr_l2a = %x / &data_l2a = %x\n" 184 " &mwmr_a2s = %x / &data_a2s = %x\n" 185 " &mwmr_s2l = %x / &data_s2l = %x\n" 186 " &cont[0] = %x\n" 187 " x_size = %d / y_size = %d / nprocs = %d\n", 188 x , y , l , giet_proctime(), 189 nic_rx_channel , nic_tx_channel, 190 (unsigned int)fifo_l2a, (unsigned int)data_l2a, 191 (unsigned int)fifo_a2s, (unsigned int)data_a2s, 192 (unsigned int)fifo_s2l, (unsigned int)data_s2l, 193 (unsigned int)cont[0], 194 X_SIZE, Y_SIZE, NB_PROCS_MAX ); 195 196 ///////////////////////////////////////////////////////////// 197 // All "load" tasks enter the main loop (on containers) 198 unsigned int count = 0; // loaded containers count 199 unsigned int index; // available container index 200 unsigned int* temp; // pointer on available container 201 202 while ( count < CONTAINERS_MAX ) 203 { 204 // get one empty count index from fifo_s2l 205 mwmr_read( fifo_s2l , &index , 1 ); 206 temp = cont[index]; 207 208 // get one count from kernel rx_chbuf 209 giet_nic_rx_move( nic_rx_channel, temp ); 210 211 // get packets number 212 unsigned int npackets = temp[0] & 0x0000FFFF; 213 unsigned int nwords = temp[0] >> 16; 214 215 if ( (x==X_SIZE-1) && (y==Y_SIZE-1) ) 216 giet_shr_printf("\n*** Task load on P[%d,%d,%d] get container %d at cycle %d" 217 " : %d packets / %d words\n", 218 x, y, l, count, giet_proctime(), npackets, nwords ); 219 220 // put the full count index to fifo_l2a 221 mwmr_write( fifo_l2a, &index , 1 ); 222 223 count++; 224 } 225 226 // all "load" tasks synchronise before stats 227 sbt_barrier_wait( &rx_barrier ); 228 229 // "load" task[0][0] stops the NIC_CMA RX transfer and displays stats 230 if ( (x==0) && (y==0) ) 231 { 232 giet_nic_rx_stop( nic_rx_channel ); 233 giet_nic_rx_stats( nic_rx_channel ); 234 } 235 236 // all "load" task exit 237 giet_exit("Task completed"); 238 239 } // end load() 240 241 242 ////////////////////////////////////////// 243 __attribute__ ((constructor)) void store() 244 ////////////////////////////////////////// 74 245 { 75 246 // get processor identifiers … … 79 250 giet_proc_xyp( &x, &y, &l ); 80 251 81 // local buffer to store one container in private stack 82 unsigned int temp[1024]; 83 84 // allocates data buffer for MWMR fifo in local heap 85 unsigned int* data = malloc( NB_PROCS_MAX<<12 ); 86 87 // allocates MWMR fifo descriptor in local heap 88 mwmr[x][y] = malloc( sizeof(mwmr_channel_t) ); 89 mwmr_channel_t* fifo = mwmr[x][y]; 90 91 // initialises local MWMR fifo : width = 4kbytes / depth = NB_PROCS_MAX 92 mwmr_init( fifo , data , 1024 , NB_PROCS_MAX ); 93 94 // display for cluster[X_SIZE-1][Y_SIZE-1] 95 if ( (x==X_SIZE-1) && (y==Y_SIZE-1) ) 96 giet_shr_printf("\n*** Task load starts on P[%d,%d,%d] at cycle %d\n" 97 " &mwmr = %x / &data = %x / &sync = %x\n" 98 " x_size = %d / y_size = %d / nprocs = %d\n", 99 x , y , l , giet_proctime() , 100 (unsigned int)fifo, (unsigned int)data, (unsigned int)(&local_sync[x][y]), 101 X_SIZE, Y_SIZE, NB_PROCS_MAX ); 102 103 // Task load on cluster[0,0] makes global initialisation: 104 // - NIC & CMA channels allocation & initialisation. 105 // - barrier for load tasks initialisation. 106 // Other load task wait completion. 107 if ( (x==0) && (y==0) ) 108 { 109 // get NIC_RX channel 110 nic_channel = giet_nic_rx_alloc(); 111 112 // start CMA transfer 113 giet_nic_rx_start(); 114 115 // barrier init 116 barrier_init( &barrier, X_SIZE * Y_SIZE ); 117 118 global_sync = 1; 252 253 // "store" task[0][0] initialises the barrier between all "store" tasks, 254 // allocates NIC & CMA TX channels, and starts the NIC_CMA TX transfer. 255 // Other "store" tasks wait completion. 256 if ( (x==0) && (y==0) ) 257 { 258 giet_shr_printf("\n*** Task store on P[%d][%d][%d] starts at cycle %d\n", 259 x , y , l , giet_proctime() ); 260 261 sbt_barrier_init( &tx_barrier , X_SIZE*Y_SIZE , 1 ); 262 nic_tx_channel = giet_nic_tx_alloc(); 263 giet_nic_tx_start( nic_tx_channel ); 264 store_sync = 1; 119 265 } 120 266 else 121 267 { 122 while ( global_sync == 0 ) asm volatile ("nop");268 while ( store_sync == 0 ) asm volatile ("nop"); 123 269 } 124 270 125 // "load" task signals MWMR initialisation to "analyse" tasks 126 local_sync[x][y] = 1; 127 128 // main loop (on containers) 129 unsigned int container = 0; 130 while ( container < CONTAINERS_MAX ) 271 // all "store" tasks wait mwmr channels initialisation 272 while ( local_sync[x][y] == 0 ) asm volatile ("nop"); 273 274 // all "store" tasks register pointers on working containers in local stack 275 unsigned int n; 276 unsigned int* cont[ANALYSIS_TASKS]; 277 for ( n = 0 ; n < ANALYSIS_TASKS ; n++ ) 278 { 279 cont[n] = container[x][y][n]; 280 } 281 282 // all "store" tasks register pointers on mwmr fifos in local stack 283 mwmr_channel_t* fifo_l2a = mwmr_l2a[x][y]; 284 mwmr_channel_t* fifo_a2s = mwmr_a2s[x][y]; 285 mwmr_channel_t* fifo_s2l = mwmr_s2l[x][y]; 286 287 // "store" task[0][0] displays status 288 if ( (x==0) && (y==0) ) 289 giet_shr_printf("\n*** Task store on P[%d,%d,%d] enters main loop at cycle %d\n" 290 " &mwmr_l2a = %x\n" 291 " &mwmr_a2s = %x\n" 292 " &mwmr_s2l = %x\n" 293 " &cont[0] = %x\n", 294 x , y , l , giet_proctime(), 295 (unsigned int)fifo_l2a, 296 (unsigned int)fifo_a2s, 297 (unsigned int)fifo_s2l, 298 (unsigned int)cont[0] ); 299 300 301 ///////////////////////////////////////////////////////////// 302 // all "store" tasks enter the main loop (on containers) 303 unsigned int count = 0; // stored containers count 304 unsigned int index; // empty container index 305 unsigned int* temp; // pointer on empty container 306 307 while ( count < CONTAINERS_MAX ) 131 308 { 132 // get one container from kernel chbuf 133 giet_nic_rx_move( nic_channel, temp ); 309 // get one working container index from fifo_a2s 310 mwmr_read( fifo_a2s , &index , 1 ); 311 temp = cont[index]; 312 313 // put one container to kernel tx_chbuf 314 giet_nic_tx_move( nic_tx_channel, temp ); 134 315 135 316 // get packets number … … 138 319 139 320 if ( (x==X_SIZE-1) && (y==Y_SIZE-1) ) 140 giet_shr_printf("\n Task loadon P[%d,%d,%d] get container %d at cycle %d"321 giet_shr_printf("\n*** Task store on P[%d,%d,%d] get container %d at cycle %d" 141 322 " : %d packets / %d words\n", 142 x, y, l, co ntainer, giet_proctime(), npackets, nwords );143 144 // put container to MWMR channel145 mwmr_write( fifo , temp, 1 );146 147 co ntainer++;148 } 149 150 // all loadtasks synchronise before result display151 barrier_wait( &barrier );152 153 // Task load in cluster[0,0] stops NICand displays results154 if ( (x==0) && (y==0) ) 155 { 156 giet_nic_ rx_stop();323 x, y, l, count, giet_proctime(), npackets, nwords ); 324 325 // put the working container index to fifo_s2l 326 mwmr_write( fifo_s2l, &index , 1 ); 327 328 count++; 329 } 330 331 // all "store" tasks synchronise before result display 332 sbt_barrier_wait( &tx_barrier ); 333 334 // "store" task[0,0] stops NIC_CMA TX transfer and displays results 335 if ( (x==0) && (y==0) ) 336 { 337 giet_nic_tx_stop( nic_tx_channel ); 157 338 158 339 giet_shr_printf("\n@@@@ Classification Results @@@\n" … … 172 353 " - TYPE D : %d packets\n" 173 354 " - TYPE E : %d packets\n" 174 " - TYPE F : %d packets\n", 175 count[0x0], count[0x1], count[0x2], count[0x3], 176 count[0x4], count[0x5], count[0x6], count[0x7], 177 count[0x8], count[0x9], count[0xA], count[0xB], 178 count[0xC], count[0xD], count[0xE], count[0xF] ); 179 180 giet_nic_rx_stats(); 181 182 } 183 184 // all load tasks synchronise before exit 185 barrier_wait( &barrier ); 186 355 " - TYPE F : %d packets\n" 356 " TOTAL = %d packets\n", 357 counter[0x0], counter[0x1], counter[0x2], counter[0x3], 358 counter[0x4], counter[0x5], counter[0x6], counter[0x7], 359 counter[0x8], counter[0x9], counter[0xA], counter[0xB], 360 counter[0xC], counter[0xD], counter[0xE], counter[0xF], 361 counter[0x0]+ counter[0x1]+ counter[0x2]+ counter[0x3]+ 362 counter[0x4]+ counter[0x5]+ counter[0x6]+ counter[0x7]+ 363 counter[0x8]+ counter[0x9]+ counter[0xA]+ counter[0xB]+ 364 counter[0xC]+ counter[0xD]+ counter[0xE]+ counter[0xF] ); 365 366 giet_nic_tx_stats( nic_tx_channel ); 367 } 368 369 // all "store" task exit 187 370 giet_exit("Task completed"); 188 189 } // end load() 371 372 } // end store() 373 190 374 191 375 //////////////////////////////////////////// … … 199 383 giet_proc_xyp( &x, &y, &l ); 200 384 201 // local buffer to store one container 202 unsigned int temp[1024]; 203 204 // wait MWMR channel initialisation (done by task load) 385 if ( (x==0) && (y==0) ) 386 { 387 giet_shr_printf("\n*** Task analyse on P[%d][%d][%d] starts at cycle %d\n", 388 x , y , l , giet_proctime() ); 389 } 390 391 // all "analyse" tasks wait mwmr channels initialisation 205 392 while ( local_sync[x][y] == 0 ) asm volatile ("nop"); 206 393 207 // get pointer on MWMR channel descriptor 208 mwmr_channel_t* fifo = mwmr[x][y]; 209 210 // display status for cluster[X_SIZE-1][Y_SIZE-1] 211 if ( (x==X_SIZE-1) && (y==Y_SIZE-1) ) 212 giet_shr_printf("\n*** Task analyse starts on P[%d,%d,%d] at cycle %d\n" 213 " &mwmr = %x / &sync = %x\n", 394 // all "analyse" tasks register pointers on working containers in local stack 395 unsigned int n; 396 unsigned int* cont[ANALYSIS_TASKS]; 397 for ( n = 0 ; n < ANALYSIS_TASKS ; n++ ) 398 { 399 cont[n] = container[x][y][n]; 400 } 401 402 // all "analyse" tasks register pointers on mwmr fifos in local stack 403 mwmr_channel_t* fifo_l2a = mwmr_l2a[x][y]; 404 mwmr_channel_t* fifo_a2s = mwmr_a2s[x][y]; 405 406 // "analyse" task[0][0] display status 407 if ( (x==0) && (y==0) ) 408 giet_shr_printf("\n*** Task analyse on P[%d,%d,%d] enters main loop at cycle %d\n" 409 " &mwmr_l2a = %x\n" 410 " &mwmr_a2s = %x\n" 411 " &cont[0] = %x\n", 214 412 x, y, l, giet_proctime(), 215 (unsigned int)fifo, (unsigned int)(&local_sync[x][y]) ); 216 217 // main loop (on containers) 218 unsigned int nwords; // number of words in container 219 unsigned int npackets; // number of packets in container 220 unsigned int length; // number of bytes in current packet 221 unsigned int word; // current packet first word in container 222 unsigned int type; // current packet type 223 unsigned int p; // current packet index 413 (unsigned int)fifo_l2a, 414 (unsigned int)fifo_a2s, 415 (unsigned int)cont[0] ); 416 417 ///////////////////////////////////////////////////////////// 418 // all "analyse" tasks enter the main loop (on containers) 419 unsigned int index; // available container index 420 unsigned int* temp; // pointer on available container 421 unsigned int nwords; // number of words in container 422 unsigned int npackets; // number of packets in container 423 unsigned int length; // number of bytes in current packet 424 unsigned int first; // current packet first word in container 425 unsigned int type; // current packet type 426 unsigned int p; // current packet index 427 428 #if VERBOSE_ANALYSE 429 unsigned int verbose_len[10]; // save length for all packets in one container 430 unsigned long long verbose_dst[10]; // save length for all packets in one container 431 unsigned long long verbose_src[10]; // save length for all packets in one container 432 #endif 433 224 434 while ( 1 ) 225 435 { 226 // get one container from MWMR fifo 227 mwmr_read( fifo, temp, 1 ); 228 229 // get packets number 436 437 #if VERBOSE_ANALYSE 438 for( p = 0 ; p < 10 ; p++ ) 439 { 440 verbose_len[p] = 0; 441 verbose_dst[p] = 0; 442 verbose_src[p] = 0; 443 } 444 #endif 445 // get one working container index from fifo_l2a 446 mwmr_read( fifo_l2a , &index , 1 ); 447 temp = cont[index]; 448 449 // get packets number and words number 230 450 npackets = temp[0] & 0x0000FFFF; 231 451 nwords = temp[0] >> 16; 232 452 233 if ( (x== X_SIZE-1) && (y==Y_SIZE-1) )234 giet_shr_printf("\n Task analyse on P[%d,%d,%d] get container at cycle %d"453 if ( (x==0) && (y==0) ) 454 giet_shr_printf("\n*** Task analyse on P[%d,%d,%d] get container at cycle %d" 235 455 " : %d packets / %d words\n", 236 456 x, y, l, giet_proctime(), npackets, nwords ); 237 457 238 458 // initialize word index in container 239 word= 34;459 first = 34; 240 460 241 461 // loop on packets … … 246 466 else length = temp[1+(p>>1)] & 0x0000FFFF; 247 467 248 // get packet type (source mac address) 249 type = (temp[word+1] & 0x0000000F); 250 251 // increment counter 252 atomic_increment( &count[type], 1 ); 253 254 // update word index 255 if ( length & 0x3 ) word += (length>>2)+1; 256 else word += (length>>2); 468 // compute packet DST and SRC MAC addresses 469 unsigned int word0 = temp[first]; 470 unsigned int word1 = temp[first + 1]; 471 unsigned int word2 = temp[first + 2]; 472 473 unsigned long long dst = ((unsigned long long)(word1 & 0xFFFF0000)>>16) | 474 (((unsigned long long)word0)<<16); 475 unsigned long long src = ((unsigned long long)(word1 & 0x0000FFFF)<<32) | 476 ((unsigned long long)word2); 477 #if VERBOSE_ANALYSE 478 if ( p < 10 ) 479 { 480 verbose_len[p] = length; 481 verbose_dst[p] = dst; 482 verbose_src[p] = src; 483 } 484 #endif 485 // compute type from SRC MAC address and increment counter 486 type = word1 & 0x0000000F; 487 atomic_increment( &counter[type], 1 ); 488 489 // exchange SRC & DST MAC addresses for TX 490 temp[first] = ((word1 & 0x0000FFFF)<<16) | ((word2 & 0xFFFF0000)>>16); 491 temp[first + 1] = ((word2 & 0x0000FFFF)<<16) | ((word0 & 0xFFFF0000)>>16); 492 temp[first + 2] = ((word0 & 0x0000FFFF)<<16) | ((word1 & 0xFFFF0000)>>16); 493 494 // update first word index 495 if ( length & 0x3 ) first += (length>>2)+1; 496 else first += (length>>2); 257 497 } 498 499 #if VERBOSE_ANALYSE 500 if ( (x==0) && (y==0) ) 501 giet_shr_printf("\n*** Task analyse on P[%d,%d,%d] completes at cycle %d\n" 502 " - Packet 0 : plen = %d / dst_mac = %l / src_mac = %l\n" 503 " - Packet 1 : plen = %d / dst_mac = %l / src_mac = %l\n" 504 " - Packet 2 : plen = %d / dst_mac = %l / src_mac = %l\n" 505 " - Packet 3 : plen = %d / dst_mac = %l / src_mac = %l\n" 506 " - Packet 4 : plen = %d / dst_mac = %l / src_mac = %l\n" 507 " - Packet 5 : plen = %d / dst_mac = %l / src_mac = %l\n" 508 " - Packet 6 : plen = %d / dst_mac = %l / src_mac = %l\n" 509 " - Packet 7 : plen = %d / dst_mac = %l / src_mac = %l\n" 510 " - Packet 8 : plen = %d / dst_mac = %l / src_mac = %l\n" 511 " - Packet 9 : plen = %d / dst_mac = %l / src_mac = %l\n", 512 x , y , l , giet_proctime() , 513 verbose_len[0] , verbose_dst[0] , verbose_src[0] , 514 verbose_len[1] , verbose_dst[1] , verbose_src[1] , 515 verbose_len[2] , verbose_dst[2] , verbose_src[2] , 516 verbose_len[3] , verbose_dst[3] , verbose_src[3] , 517 verbose_len[4] , verbose_dst[4] , verbose_src[4] , 518 verbose_len[5] , verbose_dst[5] , verbose_src[5] , 519 verbose_len[6] , verbose_dst[6] , verbose_src[6] , 520 verbose_len[7] , verbose_dst[7] , verbose_src[7] , 521 verbose_len[8] , verbose_dst[8] , verbose_src[8] , 522 verbose_len[9] , verbose_dst[9] , verbose_src[9] ); 523 #endif 524 525 // pseudo-random delay 526 for( p = 0 ; p < (giet_rand()>>4) ; p++ ) asm volatile ("nop"); 527 528 // put the working container index to fifo_a2s 529 mwmr_write( fifo_a2s , &index , 1 ); 258 530 } 259 531 } // end analyse()
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