Index: soft/giet_vm/giet_common/kernel_locks.h =================================================================== --- soft/giet_vm/giet_common/kernel_locks.h (revision 522) +++ soft/giet_vm/giet_common/kernel_locks.h (revision 523) @@ -1,11 +1,11 @@ -/////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////// // File : kernel_locks.h // Date : 01/12/2014 // Author : alain greiner // Copyright (c) UPMC-LIP6 -/////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////// // The locks.c and locks.h files are part of the GIET-VM nano-kernel. // They define both atomic increment operations and three types of locks. -/////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////// #ifndef GIET_LOCKS_H @@ -14,7 +14,7 @@ #include "hard_config.h" -/////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////// // Simple lock structure and access functions -/////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////// typedef struct simple_lock_s @@ -28,7 +28,7 @@ extern void _simple_lock_release( simple_lock_t* lock ); -/////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////// // Queuing lock structure and access functions -/////////////////////////////////////////////////////////////////////////////////// +////////////////////////////////////////////////////////////////////////////// typedef struct spin_lock_s @@ -49,7 +49,7 @@ -////////////////////////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////////////////// // SQT lock structures and access functions -////////////////////////////////////////////////////////////////////////////////// +///////////////////////////////////////////////////////////////////////////// typedef struct sqt_lock_node_s Index: soft/giet_vm/giet_common/utils.c =================================================================== --- soft/giet_vm/giet_common/utils.c (revision 522) +++ soft/giet_vm/giet_common/utils.c (revision 523) @@ -1,10 +1,10 @@ -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// // File : utils.c // Date : 18/10/2013 // Author : alain greiner // Copyright (c) UPMC-LIP6 -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// // The utils.c and utils.h files are part of the GIET-VM nano-kernel. -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// #include @@ -16,10 +16,10 @@ #include -// This global variable is allocated in the boot.c file or in kernel_init.c file +// This variable is allocated in the boot.c file or in kernel_init.c file extern static_scheduler_t* _schedulers[X_SIZE][Y_SIZE][NB_PROCS_MAX]; -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// // CP0 registers access functions -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// ///////////////////////// @@ -119,7 +119,7 @@ -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// // CP2 registers access functions -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// //////////////////////////// @@ -165,7 +165,7 @@ -//////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// // Physical addressing related functions -//////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////// @@ -179,13 +179,13 @@ _it_disable(&sr); - asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ - "andi $3, $2, 0xb \n" - "mtc2 $3, $1 \n" /* DTLB off */ - - "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ - "lw %0, 0(%1) \n" /* value <= *paddr */ - "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ - - "mtc2 $2, $1 \n" /* restore MMU_MODE */ + asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ + "andi $3, $2, 0xb \n" + "mtc2 $3, $1 \n" /* DTLB off */ + + "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ + "lw %0, 0(%1) \n" /* value <= *paddr */ + "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ + + "mtc2 $2, $1 \n" /* restore MMU_MODE */ : "=r" (value) : "r" (lsb), "r" (msb) @@ -205,14 +205,14 @@ _it_disable(&sr); - asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ - "andi $3, $2, 0xb \n" - "mtc2 $3, $1 \n" /* DTLB off */ - - "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ - "sw %0, 0(%1) \n" /* *paddr <= value */ - "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ - - "mtc2 $2, $1 \n" /* restore MMU_MODE */ - "sync \n" + asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ + "andi $3, $2, 0xb \n" + "mtc2 $3, $1 \n" /* DTLB off */ + + "mtc2 %2, $24 \n" /* PADDR_EXT <= msb */ + "sw %0, 0(%1) \n" /* *paddr <= value */ + "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ + + "mtc2 $2, $1 \n" /* restore MMU_MODE */ + "sync \n" : : "r" (value), "r" (lsb), "r" (msb) @@ -233,14 +233,14 @@ _it_disable(&sr); - asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ - "andi $3, $2, 0xb \n" - "mtc2 $3, $1 \n" /* DTLB off */ - - "mtc2 %3, $24 \n" /* PADDR_EXT <= msb */ - "lw %0, 0(%2) \n" /* data_lsb <= *paddr */ - "lw %1, 4(%2) \n" /* data_msb <= *paddr+4 */ - "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ - - "mtc2 $2, $1 \n" /* restore MMU_MODE */ + asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ + "andi $3, $2, 0xb \n" + "mtc2 $3, $1 \n" /* DTLB off */ + + "mtc2 %3, $24 \n" /* PADDR_EXT <= msb */ + "lw %0, 0(%2) \n" /* data_lsb <= *paddr */ + "lw %1, 4(%2) \n" /* data_msb <= *paddr+4 */ + "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ + + "mtc2 $2, $1 \n" /* restore MMU_MODE */ : "=r" (data_lsb), "=r"(data_msb) : "r" (addr_lsb), "r" (addr_msb) @@ -265,17 +265,17 @@ _it_disable(&sr); - asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ - "andi $3, $2, 0xb \n" - "mtc2 $3, $1 \n" /* DTLB off */ - - "mtc2 %3, $24 \n" /* PADDR_EXT <= msb */ - "sw %0, 0(%2) \n" /* *paddr <= value */ - "sw %1, 4(%2) \n" /* *paddr+4 <= value */ - "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ - - "mtc2 $2, $1 \n" /* restore MMU_MODE */ - "sync \n" + asm volatile( "mfc2 $2, $1 \n" /* $2 <= MMU_MODE */ + "andi $3, $2, 0xb \n" + "mtc2 $3, $1 \n" /* DTLB off */ + + "mtc2 %3, $24 \n" /* PADDR_EXT <= msb */ + "sw %0, 0(%2) \n" /* *paddr <= value */ + "sw %1, 4(%2) \n" /* *paddr+4 <= value */ + "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ + + "mtc2 $2, $1 \n" /* restore MMU_MODE */ + "sync \n" : - : "r" (data_lsb), "r" (data_msb), "r" (addr_lsb), "r" (addr_msb) + : "r"(data_lsb),"r"(data_msb),"r"(addr_lsb),"r"(addr_msb) : "$2", "$3" ); @@ -284,5 +284,5 @@ //////////////////////////////////////////////////// -void _physical_memcpy( unsigned long long dst_paddr, // destination buffer paddr +void _physical_memcpy( unsigned long long dst_paddr, // dest buffer paddr unsigned long long src_paddr, // source buffer paddr unsigned int size ) // bytes @@ -305,28 +305,29 @@ _it_disable(&sr); - asm volatile( "mfc2 $2, $1 \n" /* $2 <= current MMU_MODE */ - "andi $3, $2, 0xb \n" /* $3 <= new MMU_MODE */ - "mtc2 $3, $1 \n" /* DTLB off */ - - "move $4, %5 \n" /* $4 < iter */ - "move $5, %1 \n" /* $5 < src_lsb */ - "move $6, %3 \n" /* $6 < src_lsb */ - - "ph_memcpy_loop: \n" - "mtc2 %2, $24 \n" /* PADDR_EXT <= src_msb */ - "lw %0, 0($5) \n" /* data <= *src_paddr */ - "mtc2 %4, $24 \n" /* PADDR_EXT <= dst_msb */ - "sw %0, 0($6) \n" /* *dst_paddr <= data */ - - "addi $4, $4, -1 \n" /* iter = iter - 1 */ - "addi $5, $5, 4 \n" /* src_lsb += 4 */ - "addi $6, $6, 4 \n" /* dst_lsb += 4 */ + asm volatile( "mfc2 $2, $1 \n" /* $2 <= current MMU_MODE */ + "andi $3, $2, 0xb \n" /* $3 <= new MMU_MODE */ + "mtc2 $3, $1 \n" /* DTLB off */ + + "move $4, %5 \n" /* $4 < iter */ + "move $5, %1 \n" /* $5 < src_lsb */ + "move $6, %3 \n" /* $6 < src_lsb */ + + "ph_memcpy_loop: \n" + "mtc2 %2, $24 \n" /* PADDR_EXT <= src_msb */ + "lw %0, 0($5) \n" /* data <= *src_paddr */ + "mtc2 %4, $24 \n" /* PADDR_EXT <= dst_msb */ + "sw %0, 0($6) \n" /* *dst_paddr <= data */ + + "addi $4, $4, -1 \n" /* iter = iter - 1 */ + "addi $5, $5, 4 \n" /* src_lsb += 4 */ + "addi $6, $6, 4 \n" /* dst_lsb += 4 */ "bne $4, $0, ph_memcpy_loop \n" - "nop \n" - - "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ - "mtc2 $2, $1 \n" /* restore MMU_MODE */ + "nop \n" + + "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ + "mtc2 $2, $1 \n" /* restore MMU_MODE */ : "=r" (data) - : "r" (src_lsb), "r" (src_msb), "r" (dst_lsb), "r"(dst_msb), "r"(iter) + : "r"(src_lsb),"r"(src_msb),"r"(dst_lsb), + "r"(dst_msb), "r"(iter) : "$2", "$3", "$4", "$5", "$6" ); @@ -335,5 +336,5 @@ //////////////////////////////////////////////// -void _physical_memset( unsigned long long paddr, // destination buffer paddr +void _physical_memset( unsigned long long paddr, // dest buffer paddr unsigned int size, // bytes unsigned int data ) // written value @@ -352,18 +353,18 @@ _it_disable(&sr); - asm volatile( "mfc2 $8, $1 \n" /* $8 <= current MMU_MODE */ - "andi $9, $8, 0xb \n" /* $9 <= new MMU_MODE */ - "mtc2 $9, $1 \n" /* DTLB off */ - "mtc2 %3, $24 \n" /* PADDR_EXT <= msb */ - - "1: \n" /* set 8 bytes per iter */ - "sw %2, 0(%0) \n" /* *src_paddr = data */ - "sw %2, 4(%0) \n" /* *(src_paddr+4) = data */ - "addi %1, %1, -8 \n" /* size -= 8 */ - "addi %0, %0, 8 \n" /* src_paddr += 8 */ - "bnez %1, 1b \n" /* loop while size != 0 */ - - "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ - "mtc2 $8, $1 \n" /* restore MMU_MODE */ + asm volatile( "mfc2 $8, $1 \n" /* $8 <= current MMU_MODE */ + "andi $9, $8, 0xb \n" /* $9 <= new MMU_MODE */ + "mtc2 $9, $1 \n" /* DTLB off */ + "mtc2 %3, $24 \n" /* PADDR_EXT <= msb */ + + "1: \n" /* set 8 bytes per iter */ + "sw %2, 0(%0) \n" /* *src_paddr = data */ + "sw %2, 4(%0) \n" /* *(src_paddr+4) = data */ + "addi %1, %1, -8 \n" /* size -= 8 */ + "addi %0, %0, 8 \n" /* src_paddr += 8 */ + "bnez %1, 1b \n" /* loop while size != 0 */ + + "mtc2 $0, $24 \n" /* PADDR_EXT <= 0 */ + "mtc2 $8, $1 \n" /* restore MMU_MODE */ : "+r"(lsb), "+r"(size) : "r"(data), "r" (msb) @@ -409,131 +410,7 @@ } -/////////////////////////////////////////////////////////////////////////////////// -// barrier functions -/////////////////////////////////////////////////////////////////////////////////// -void _barrier_init( _giet_barrier_t* barrier, - unsigned int ntasks ) -{ - barrier->ntasks = ntasks; - barrier->count = ntasks; - barrier->sense = 0; - - asm volatile ("sync" ::: "memory"); -} - -//////////////////////////////////////////// -void _barrier_wait( _giet_barrier_t* barrier ) -{ - - // compute expected sense value - unsigned int expected; - if ( barrier->sense == 0 ) expected = 1; - else expected = 0; - - // parallel decrement barrier counter using atomic instructions LL/SC - // - input : pointer on the barrier counter (pcount) - // - output : counter value (count) - volatile unsigned int* pcount = (unsigned int *)&barrier->count; - volatile unsigned int count = 0; // avoid a warning - - asm volatile( "addu $2, %1, $0 \n" - "barrier_llsc: \n" - "ll $8, 0($2) \n" - "addi $9, $8, -1 \n" - "sc $9, 0($2) \n" - "beqz $9, barrier_llsc \n" - "addu %0, $8, $0 \n" - : "=r" (count) - : "r" (pcount) - : "$2", "$8", "$9", "memory" ); - - // the last task re-initializes count and toggle sense, - // waking up all other waiting tasks - if (count == 1) // last task - { - barrier->count = barrier->ntasks; - barrier->sense = expected; - } - else // other tasks busy waiting the sense flag - { - // polling sense flag - // input: pointer on the sens flag (psense) - // input: expected sense value (expected) - volatile unsigned int* psense = (unsigned int *)&barrier->sense; - asm volatile ( "barrier_sense: \n" - "lw $3, 0(%0) \n" - "bne $3, %1, barrier_sense \n" - : - : "r"(psense), "r"(expected) - : "$3" ); - } - - asm volatile ("sync" ::: "memory"); -} - -/////////////////////////////////////////////////////////////////////////////////// -// Locks access functions -/////////////////////////////////////////////////////////////////////////////////// - -/////////////////////////////////// -void _get_lock( _giet_lock_t* lock ) -{ - unsigned int* plock = (unsigned int*)&(lock->value); - -#if NO_HARD_CC - - register unsigned int delay = (_get_proctime() ^ _get_procid() << 4) & 0xFF; - if (delay == 0) delay = 0x80; - - asm volatile ( - "_lock_llsc: \n" - " ll $2, 0(%0) \n" /* $2 <= lock current value */ - " bnez $2, _lock_delay \n" /* delay if lock already taken */ - " li $3, 1 \n" /* $3 <= argument for sc */ - " sc $3, 0(%0) \n" /* try to set lock */ - " bnez $3, _lock_ok \n" /* exit if atomic */ - " _lock_delay: \n" - " move $4, %1 \n" /* $4 <= delay */ - " _lock_loop: \n" - " addi $4, $4, -1 \n" /* $4 <= $4 - 1 */ - " bnez $4, _lock_loop \n" /* test end delay */ - " nop \n" - " j _lock_llsc \n" /* retry */ - " nop \n" - " _lock_ok: \n" - : - :"r"(plock), "r"(delay) - :"$2", "$3", "$4", "memory"); -#else - - asm volatile ( - "_lock_llsc: \n" - " lw $2, 0(%0) \n" /* $2 <= lock current value */ - " bnez $2, _lock_llsc \n" /* retry if lock already taken */ - " nop \n" - " ll $2, 0(%0) \n" /* ll_buffer <= lock current value */ - " bnez $2, _lock_llsc \n" /* retry if lock already taken */ - " li $3, 1 \n" /* $3 <= argument for sc */ - " sc $3, 0(%0) \n" /* try to set lock */ - " beqz $3, _lock_llsc \n" /* retry if sc failure */ - " nop \n" - : - :"r"(plock) - :"$2", "$3", "memory"); -#endif - -} - -/////////////////////////////////////// -void _release_lock( _giet_lock_t* lock ) -{ - asm volatile ( "sync\n" ::: "memory" ); - // sync is necessary because of the TSAR consistency model - lock->value = 0; -} - -//////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////// // Scheduler and tasks context access functions -//////////////////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////////// @@ -652,8 +529,8 @@ MAPPING_PROC_SIZE * header->procs); } -///////////////////////////////////////////////////////////// -mapping_coproc_t *_get_coproc_base(mapping_header_t * header) -{ - return (mapping_coproc_t *) ((char *) header + +/////////////////////////////////////////////////////////////// +mapping_periph_t *_get_periph_base(mapping_header_t * header) +{ + return (mapping_periph_t *) ((char *) header + MAPPING_HEADER_SIZE + MAPPING_CLUSTER_SIZE * X_SIZE * Y_SIZE + @@ -665,45 +542,16 @@ MAPPING_IRQ_SIZE * header->irqs); } -/////////////////////////////////////////////////////////////// -mapping_cp_port_t *_get_cp_port_base(mapping_header_t * header) -{ - return (mapping_cp_port_t *) ((char *) header + - MAPPING_HEADER_SIZE + - MAPPING_CLUSTER_SIZE * X_SIZE * Y_SIZE + - MAPPING_PSEG_SIZE * header->psegs + - MAPPING_VSPACE_SIZE * header->vspaces + - MAPPING_VSEG_SIZE * header->vsegs + - MAPPING_TASK_SIZE * header->tasks + - MAPPING_PROC_SIZE * header->procs + - MAPPING_IRQ_SIZE * header->irqs + - MAPPING_COPROC_SIZE * header->coprocs); -} -///////////////////////////////////////////////////////////// -mapping_periph_t *_get_periph_base(mapping_header_t * header) -{ - return (mapping_periph_t *) ((char *) header + - MAPPING_HEADER_SIZE + - MAPPING_CLUSTER_SIZE * X_SIZE * Y_SIZE + - MAPPING_PSEG_SIZE * header->psegs + - MAPPING_VSPACE_SIZE * header->vspaces + - MAPPING_VSEG_SIZE * header->vsegs + - MAPPING_TASK_SIZE * header->tasks + - MAPPING_PROC_SIZE * header->procs + - MAPPING_IRQ_SIZE * header->irqs + - MAPPING_COPROC_SIZE * header->coprocs + - MAPPING_CP_PORT_SIZE * header->cp_ports); -} - -/////////////////////////////////////////////////////////////////////////////////// + +/////////////////////////////////////////////////////////////////////////// // Miscelaneous functions -/////////////////////////////////////////////////////////////////////////////////// +/////////////////////////////////////////////////////////////////////////// ////////////////////////////////////// __attribute__((noreturn)) void _exit() { - unsigned int procid = _get_procid(); - unsigned int x = (procid >> (Y_WIDTH + P_WIDTH)) & ((1<> P_WIDTH) & ((1<> (Y_WIDTH + P_WIDTH)) & ((1<> P_WIDTH) & ((1<